#ifndef _M68HC11_H
#define _M68HC11_H

#include "interrupts.h"

static __inline__ void
sleep (void)
{
   __asm__ __volatile__ ("wai");
}

extern volatile unsigned char _io_ports[];
extern void _start (void);

extern void __attribute__((interrupt)) fatal_interrupt          (void);
extern void __attribute__((interrupt)) sci_interrupt            (void);
extern void __attribute__((interrupt)) spi_interrupt            (void);
extern void __attribute__((interrupt)) acc_input_interrupt      (void);
extern void __attribute__((interrupt)) acc_overflow_interrupt   (void);
extern void __attribute__((interrupt)) timer_overflow_interrupt (void);
extern void __attribute__((interrupt)) output5_interrupt        (void);
extern void __attribute__((interrupt)) output4_interrupt        (void);
extern void __attribute__((interrupt)) output3_interrupt        (void);
extern void __attribute__((interrupt)) output2_interrupt        (void);
extern void __attribute__((interrupt)) output1_interrupt        (void);
extern void __attribute__((interrupt)) capture3_interrupt       (void);
extern void __attribute__((interrupt)) capture2_interrupt       (void);
extern void __attribute__((interrupt)) capture1_interrupt       (void);
extern void __attribute__((interrupt)) rtii_interrupt           (void);
extern void __attribute__((interrupt)) irq_interrupt            (void);
extern void __attribute__((interrupt)) xirq_interrupt           (void);
extern void __attribute__((interrupt)) swi_interrupt            (void);
extern void __attribute__((interrupt)) illegal_interrupt        (void);
extern void __attribute__((interrupt)) cop_fail_interrupt       (void);
extern void __attribute__((interrupt)) cop_clock_interrupt      (void);
extern void __attribute__((interrupt)) reset_interrupt          (void);


typedef signed   char      int8;
typedef unsigned char      uint8;
typedef int                int16;
typedef unsigned int       uint16;
typedef long               int32;
typedef unsigned long      uint32;
typedef long long          int64;
typedef unsigned long long uint64;


#define _IO_BYTE(io_addr) (*(volatile uint8 *) (io_addr))
#define _IO_OFFSET  0x1000
#define _IO8(io_addr)  _IO_BYTE((io_addr + _IO_OFFSET))

#define M6811_S_BIT  0x80 // Stop disable
#define M6811_X_BIT  0x40 // X-interrupt mask
#define M6811_H_BIT  0x20 // Half carry flag
#define M6811_I_BIT  0x10 // I-interrupt mask
#define M6811_N_BIT  0x08 // Negative
#define M6811_Z_BIT  0x04 // Zero
#define M6811_V_BIT  0x02 // Overflow
#define M6811_C_BIT  0x01 // Carry

#define S_BIT  0x80 // Stop disable
#define X_BIT  0x40 // X-interrupt mask
#define H_BIT  0x20 // Half carry flag
#define I_BIT  0x10 // I-interrupt mask
#define N_BIT  0x08 // Negative
#define Z_BIT  0x04 // Zero
#define V_BIT  0x02 // Overflow
#define C_BIT  0x01 // Carry

#define M6811_PORTA  0x00 // Port A register
#define PORTA _IO8(M6811_PORTA)

#define M6811__RES1  0x01 // Unused/Reserved

#define M6811_PIOC   0x02 // Parallel I/O Control register
#define PIOC _IO8(M6811_PIOC)

#define M6811_PORTC  0x03 // Port C register
#define PORTC _IO8(M6811_PORTC)

#define M6811_PORTB  0x04 // Port B register
#define PORTB _IO8(M6811_PORTB)

#define M6811_PORTCL 0x05 // Alternate latched port C
#define PORTCL _IO8(M6811_PORTCL)

#define M6811__RES6  0x06 // Unused/Reserved

#define M6811_DDRC   0x07 // Data direction register for port C
#define DDRC _IO8(M6811_DDRC)

#define M6811_PORTD  0x08 // Port D register
#define PORTD _IO8(M6811_PORTD)

#define M6811_DDRD   0x09 // Data direction register for port D
#define DDRD _IO8(M6811_DDRD)

#define M6811_PORTE  0x0A // Port E input register
#define PORTE _IO8(M6811_PORTE)

#define M6811_CFORC  0x0B // Compare Force Register
#define CFORC _IO8(M6811_CFORC)

#define M6811_OC1M   0x0C // OC1 Action Mask register
#define OC1M _IO8(M6811_OC1M)

#define M6811_OC1D   0x0D // OC1 Action Data register
#define OC1D _IO8(M6811_OC1D)

#define M6811_TCNT   0x0E // Timer Counter Register

#define M6811_TCNT_H 0x0E // High part
#define TCNT_H _IO8(M6811_TCNT_H)

#define M6811_TCNT_L 0x0F // Low part
#define TCNT_L _IO8(M6811_TCNT_L)

#define M6811_TIC1   0x10 // Input capture 1 register

#define M6811_TIC1_H 0x10 // High part
#define TIC1_H _IO8(M6811_TIC1_H)

#define M6811_TIC1_L 0x11 // Low part
#define TIC1_L _IO8(M6811_TIC1_L)

#define M6811_TIC2   0x12 // Input capture 2 register

#define M6811_TIC2_H 0x12 // High part
#define TIC2_H _IO8(M6811_TIC2_H)

#define M6811_TIC2_L 0x13 // Low part
#define TIC2_L _IO8(M6811_TIC2_L)

#define M6811_TIC3   0x14 // Input capture 3 register

#define M6811_TIC3_H 0x14 // High part
#define TIC3_H _IO8(M6811_TIC3_H)

#define M6811_TIC3_L 0x15 // Low part
#define TIC3_L _IO8(M6811_TIC3_L)

#define M6811_TOC1   0x16 // Output Compare 1 register

#define M6811_TOC1_H 0x16 // High part
#define TOC1_H _IO8(M6811_TOC1_H)

#define M6811_TOC1_L 0x17 // Low part
#define TOC1_L _IO8(M6811_TOC1_L)

#define M6811_TOC2   0x18 // Output Compare 2 register

#define M6811_TOC2_H 0x18 // High part
#define TOC2_H _IO8(M6811_TOC2_H)

#define M6811_TOC2_L 0x19 // Low part
#define TOC2_L _IO8(M6811_TOC2_L)

#define M6811_TOC3   0x1A // Output Compare 3 register

#define M6811_TOC3_H 0x1A // High part
#define TOC3_H _IO8(M6811_TOC3_H)

#define M6811_TOC3_L 0x1B // Low part
#define TOC3_L _IO8(M6811_TOC3_L)

#define M6811_TOC4   0x1C // Output Compare 4 register

#define M6811_TOC4_H 0x1C // High part
#define TOC4_H _IO8(M6811_TOC4_H)

#define M6811_TOC4_L 0x1D // Low part
#define TOC4_L _IO8(M6811_TOC4_L)

#define M6811_TOC5   0x1E // Output Compare 5 register

#define M6811_TOC5_H 0x1E // High part
#define TOC5_H _IO8(M6811_TOC5_H)

#define M6811_TOC5_L 0x1F // Low part
#define TOC5_L _IO8(M6811_TOC5_L)

#define M6811_TCTL1  0x20 // Timer Control register 1
#define TCTL1 _IO8(M6811_TCTL1)

#define M6811_TCTL2  0x21 // Timer Control register 2
#define TCTL2 _IO8(M6811_TCTL2)

#define M6811_TMSK1  0x22 // Timer Interrupt Mask Register 1
#define TMSK1 _IO8(M6811_TMSK1)

#define M6811_TFLG1  0x23 // Timer Interrupt Flag Register 1
#define TFLG1 _IO8(M6811_TFLG1)

#define M6811_TMSK2  0x24 // Timer Interrupt Mask Register 2
#define TMSK2 _IO8(M6811_TMSK2)

#define M6811_TFLG2  0x25 // Timer Interrupt Flag Register 2
#define TFLG2 _IO8(M6811_TFLG2)

#define M6811_PACTL  0x26 // Pulse Accumulator Control Register
#define PACTL _IO8(M6811_PACTL)

#define M6811_PACNT  0x27 // Pulse Accumulator Count Register
#define PACNT _IO8(M6811_PACNT)

#define M6811_SPCR   0x28 // SPI Control register
#define SPCR _IO8(M6811_SPCR)

#define M6811_SPSR   0x29 // SPI Status register
#define SPSR _IO8(M6811_SPSR)

#define M6811_SPDR   0x2A // SPI Data register
#define SPDR _IO8(M6811_SPDR)

#define M6811_BAUD   0x2B // SCI Baud register
#define BAUD _IO8(M6811_BAUD)

#define M6811_SCCR1  0x2C // SCI Control register 1
#define SCCR1 _IO8(M6811_SCCR1)

#define M6811_SCCR2  0x2D // SCI Control register 2
#define SCCR2 _IO8(M6811_SCCR2)

#define M6811_SCSR   0x2E // SCI Status register
#define SCSR _IO8(M6811_SCSR)

#define M6811_SCDR   0x2F // SCI Data (Read => RDR, Write => TDR)
#define SCDR _IO8(M6811_SCDR)

#define M6811_ADCTL  0x30 // A/D Control register
#define ADCTL _IO8(M6811_ADCTL)

#define M6811_ADR1   0x31 // A/D, Analog Result register 1
#define ADR1 _IO8(M6811_ADR1)

#define M6811_ADR2   0x32 // A/D, Analog Result register 2
#define ADR2 _IO8(M6811_ADR2)

#define M6811_ADR3   0x33 // A/D, Analog Result register 3
#define ADR3 _IO8(M6811_ADR3)

#define M6811_ADR4   0x34 // A/D, Analog Result register 4
#define ADR4 _IO8(M6811_ADR4)

#define M6811__RES35 0x35 // Reserved
#define M6811__RES36 0x36 // Reserved
#define M6811__RES37 0x37 // Reserved
#define M6811__RES38 0x38 // Reserved

#define M6811_OPTION 0x39 // System Configuration Options
#define OPTION _IO8(M6811_OPTION)

#define M6811_COPRST 0x3A // Arm/Reset COP Timer Circuitry
#define COPRST _IO8(M6811_COPRST)

#define M6811_PPROG  0x3B // EEPROM Programming Control Register
#define PPROG _IO8(M6811_PPROG)

#define M6811_HPRIO  0x3C // Highest priority I-Bit int and misc
#define HPRIO _IO8(M6811_HPRIO)

#define M6811_INIT   0x3D // Ram and I/O mapping register
#define INIT _IO8(M6811_INIT)

#define M6811_TEST1  0x3E // Factory test control register
#define TEST1 _IO8(M6811_TEST1)

#define M6811_CONFIG 0x3F // COP, ROM and EEPROM enables
#define CONFIG _IO8(M6811_CONFIG)

// Flags of the CONFIG register.
#define M6811_NOSEC  0x08 // Security mode disable
#define M6811_NOCOP  0x04 // COP system disable
#define M6811_ROMON  0x02 // Enable on-chip rom
#define M6811_EEON   0x01 // Enable on-chip eeprom

#define NOSEC  0x08 // Security mode disable
#define NOCOP  0x04 // COP system disable
#define ROMON  0x02 // Enable on-chip rom
#define EEON   0x01 // Enable on-chip eeprom

// Flags of the PPROG register.
#define M6811_BYTE   0x10 // Byte mode
#define M6811_ROW    0x08 // Row mode
#define M6811_ERASE  0x04 // Erase mode select (1 = erase, 0 = read)
#define M6811_EELAT  0x02 // EEPROM Latch Control
#define M6811_EEPGM  0x01 // EEPROM Programming Voltage Enable

#define BYTE   0x10 // Byte mode
#define ROW    0x08 // Row mode
#define ERASE  0x04 // Erase mode select (1 = erase, 0 = read)
#define EELAT  0x02 // EEPROM Latch Control
#define EEPGM  0x01 // EEPROM Programming Voltage Enable

// Flags of the PIOC register.
#define M6811_STAF   0x80 // Strobe A Interrupt Status Flag
#define M6811_STAI   0x40 // Strobe A Interrupt Enable Mask
#define M6811_CWOM   0x20 // Port C Wire OR mode
#define M6811_HNDS   0x10 // Handshake mode
#define M6811_OIN    0x08 // Output or Input handshaking
#define M6811_PLS    0x04 // Pulse/Interlocked Handshake Operation
#define M6811_EGA    0x02 // Active Edge for Strobe A
#define M6811_INVB   0x01 // Invert Strobe B

#define STAF   0x80 // Strobe A Interrupt Status Flag
#define STAI   0x40 // Strobe A Interrupt Enable Mask
#define CWOM   0x20 // Port C Wire OR mode
#define HNDS   0x10 // Handshake mode
#define OIN    0x08 // Output or Input handshaking
#define PLS    0x04 // Pulse/Interlocked Handshake Operation
#define EGA    0x02 // Active Edge for Strobe A
#define INVB   0x01 // Invert Strobe B

// Flags of the SCCR1 register.
#define M6811_R8       0x80 // Receive Data bit 8
#define M6811_T8       0x40 // Transmit data bit 8
#define M6811__SCCR1_5 0x20 // Unused
#define M6811_M        0x10 // SCI Character length
#define M6811_WAKE     0x08 // Wake up method select (0=idle, 1=addr mark)

#define R8       0x80 // Receive Data bit 8
#define T8       0x40 // Transmit data bit 8
#define M        0x10 // SCI Character length
#define WAKE     0x08 // Wake up method select (0=idle, 1=addr mark)

// Flags of the SCCR2 register.
#define M6811_TIE     0x80 // Transmit Interrupt enable
#define M6811_TCIE    0x40 // Transmit Complete Interrupt Enable
#define M6811_RIE     0x20 // Receive Interrupt Enable
#define M6811_ILIE    0x10 // Idle Line Interrupt Enable
#define M6811_TE      0x08 // Transmit Enable
#define M6811_RE      0x04 // Receive Enable
#define M6811_RWU     0x02 // Receiver Wake Up
#define M6811_SBK     0x01 // Send Break

#define TIE     0x80 // Transmit Interrupt enable
#define TCIE    0x40 // Transmit Complete Interrupt Enable
#define RIE     0x20 // Receive Interrupt Enable
#define ILIE    0x10 // Idle Line Interrupt Enable
#define TE      0x08 // Transmit Enable
#define RE      0x04 // Receive Enable
#define RWU     0x02 // Receiver Wake Up
#define SBK     0x01 // Send Break

// Flags of the SCSR register.
#define TDRE    0x80 // Transmit Data Register Empty
#define TC      0x40 // Transmit Complete
#define RDRF    0x20 // Receive Data Register Full
#define IDLE    0x10 // Idle Line Detect
#define OR      0x08 // Overrun Error
#define NF      0x04 // Noise Flag
#define FE      0x02 // Framing Error

// Flags of the BAUD register.
#define M6811_TCLR    0x80 // Clear Baud Rate (TEST mode)
#define M6811__BAUD_6 0x40 // Not used
#define M6811_SCP1    0x20 // SCI Baud rate prescaler select
#define M6811_SCP0    0x10 //
#define M6811_RCKB    0x08 // Baud Rate Clock Check (TEST mode)
#define M6811_SCR2    0x04 // SCI Baud rate select
#define M6811_SCR1    0x02 //
#define M6811_SCR0    0x01 //

#define TCLR    0x80 // Clear Baud Rate (TEST mode)
#define SCP1    0x20 // SCI Baud rate prescaler select
#define SCP0    0x10 //
#define RCKB    0x08 // Baud Rate Clock Check (TEST mode)
#define SCR2    0x04 // SCI Baud rate select
#define SCR1    0x02 //
#define SCR0    0x01 //

// Flags of the SPCR register.
#define M6811_SPIE    0x80 // Serial Peripheral Interrupt Enable
#define M6811_SPE     0x40 // Serial Peripheral System Enable
#define M6811_DWOM    0x20 // Port D Wire-OR mode option
#define M6811_MSTR    0x10 // Master Mode Select
#define M6811_CPOL    0x08 // Clock Polarity
#define M6811_CPHA    0x04 // Clock Phase
#define M6811_SPR1    0x02 // SPI Clock Rate Select
#define M6811_SPR0    0x01

#define SPIE    0x80 // Serial Peripheral Interrupt Enable
#define SPE     0x40 // Serial Peripheral System Enable
#define DWOM    0x20 // Port D Wire-OR mode option
#define MSTR    0x10 // Master Mode Select
#define CPOL    0x08 // Clock Polarity
#define CPHA    0x04 // Clock Phase
#define SPR1    0x02 // SPI Clock Rate Select
#define SPR0    0x01

// Flags of the SPSR register.
#define M6811_SPIF    0x80 // SPI Transfer Complete flag
#define M6811_WCOL    0x40 // Write Collision
#define M6811_MODF    0x10 // Mode Fault

#define SPIF    0x80 // SPI Transfer Complete flag
#define WCOL    0x40 // Write Collision
#define MODF    0x10 // Mode Fault

// Flags of the ADCTL register.
#define M6811_CCF     0x80 // Conversions Complete Flag
#define M6811_SCAN    0x20 // Continuous Scan Control
#define M6811_MULT    0x10 // Multiple Channel/Single Channel Control
#define M6811_CD      0x08 // Channel Select D
#define M6811_CC      0x04 // Channel Select C
#define M6811_CB      0x02 // Channel Select B
#define M6811_CA      0x01 // Channel Select A

#define CCF     0x80 // Conversions Complete Flag
#define SCAN    0x20 // Continuous Scan Control
#define MULT    0x10 // Multiple Channel/Single Channel Control
#define CD      0x08 // Channel Select D
#define CC      0x04 // Channel Select C
#define CB      0x02 // Channel Select B
#define CA      0x01 // Channel Select A

// Flags of the CFORC register.
#define M6811_FOC1    0x80 // Force Output Compare 1
#define M6811_FOC2    0x40 // Force Output Compare 2
#define M6811_FOC3    0x20 // Force Output Compare 3
#define M6811_FOC4    0x10 // Force Output Compare 4
#define M6811_FOC5    0x08 //Force Output Compare 5

#define FOC1    0x80 // Force Output Compare 1
#define FOC2    0x40 // Force Output Compare 2
#define FOC3    0x20 // Force Output Compare 3
#define FOC4    0x10 // Force Output Compare 4
#define FOC5    0x08 //Force Output Compare 5

// Flags of the OC1M register.
#define OC1M7   0x80 // Output Compare 7
#define OC1M6   0x40 // Output Compare 6
#define OC1M5   0x20 // Output Compare 5
#define OC1M4   0x10 // Output Compare 4
#define OC1M3   0x08 // Output Compare 3

// Flags of the OC1D register.
#define M6811_OC1D7   0x80
#define M6811_OC1D6   0x40
#define M6811_OC1D5   0x20
#define M6811_OC1D4   0x10
#define M6811_OC1D3   0x08

#define OC1D7   0x80
#define OC1D6   0x40
#define OC1D5   0x20
#define OC1D4   0x10
#define OC1D3   0x08

// Flags of the TCTL1 register.
#define M6811_OM2     0x80 // Output Mode 2
#define M6811_OL2     0x40 // Output Level 2
#define M6811_OM3     0x20 //
#define M6811_OL3     0x10 //
#define M6811_OM4     0x08 //
#define M6811_OL4     0x04 //
#define M6811_OM5     0x02 //
#define M6811_OL5     0x01 //

#define OM2     0x80 // Output Mode 2
#define OL2     0x40 // Output Level 2
#define OM3     0x20 //
#define OL3     0x10 //
#define OM4     0x08 //
#define OL4     0x04 //
#define OM5     0x02 //
#define OL5     0x01 //

// Flags of the TCTL2 register.
#define M6811_EDG1B   0x20 // Input Edge Capture Control 1
#define M6811_EDG1A   0x10 //
#define M6811_EDG2B   0x08 // Input 2
#define M6811_EDG2A   0x04 //
#define M6811_EDG3B   0x02 // Input 3
#define M6811_EDG3A   0x01 //

#define EDG1B   0x20 // Input Edge Capture Control 1
#define EDG1A   0x10 //
#define EDG2B   0x08 // Input 2
#define EDG2A   0x04 //
#define EDG3B   0x02 // Input 3
#define EDG3A   0x01 //

// Flags of the TMSK1 register.
#define M6811_OC1I    0x80 // Output Compare 1 Interrupt
#define M6811_OC2I    0x40 // Output Compare 2 Interrupt
#define M6811_OC3I    0x20 // Output Compare 3 Interrupt
#define M6811_OC4I    0x10 // Output Compare 4 Interrupt
#define M6811_OC5I    0x08 // Output Compare 5 Interrupt
#define M6811_IC1I    0x04 // Input Capture  1 Interrupt
#define M6811_IC2I    0x02 // Input Capture  2 Interrupt
#define M6811_IC3I    0x01 // Input Capture  3 Interrupt

#define OC1I    0x80 // Output Compare 1 Interrupt
#define OC2I    0x40 // Output Compare 2 Interrupt
#define OC3I    0x20 // Output Compare 3 Interrupt
#define OC4I    0x10 // Output Compare 4 Interrupt
#define OC5I    0x08 // Output Compare 5 Interrupt
#define IC1I    0x04 // Input Capture  1 Interrupt
#define IC2I    0x02 // Input Capture  2 Interrupt
#define IC3I    0x01 // Input Capture  3 Interrupt

// Flags of the TFLG1 register.
#define M6811_OC1F    0x80 // Output Compare 1 Flag
#define M6811_OC2F    0x40 // Output Compare 2 Flag
#define M6811_OC3F    0x20 // Output Compare 3 Flag
#define M6811_OC4F    0x10 // Output Compare 4 Flag
#define M6811_OC5F    0x08 // Output Compare 5 Flag
#define M6811_IC1F    0x04 // Input Capture  1 Flag
#define M6811_IC2F    0x02 // Input Capture  2 Flag
#define M6811_IC3F    0x01 // Input Capture  3 Flag

#define OC1F    0x80 // Output Compare 1 Flag
#define OC2F    0x40 // Output Compare 2 Flag
#define OC3F    0x20 // Output Compare 3 Flag
#define OC4F    0x10 // Output Compare 4 Flag
#define OC5F    0x08 // Output Compare 5 Flag
#define IC1F    0x04 // Input Capture  1 Flag
#define IC2F    0x02 // Input Capture  2 Flag
#define IC3F    0x01 // Input Capture  3 Flag

// Flags of Timer Interrupt Mask Register 2 (TMSK2).
#define M6811_TOI     0x80 // Timer Overflow Interrupt Enable
#define M6811_RTII    0x40 // RTI Interrupt Enable
#define M6811_PAOVI   0x20 // Pulse Accumulator Overflow Interrupt En.
#define M6811_PAII    0x10 // Pulse Accumulator Interrupt Enable
#define M6811_PR1     0x02 // Timer prescaler
#define M6811_PR0     0x01 // Timer prescaler
#define M6811_TPR_1   0x00 // Timer prescale div 1
#define M6811_TPR_4   0x01 // Timer prescale div 4
#define M6811_TPR_8   0x02 // Timer prescale div 8
#define M6811_TPR_16  0x03 // Timer prescale div 16

#define TOI     0x80 // Timer Overflow Interrupt Enable
#define RTII    0x40 // RTI Interrupt Enable
#define PAOVI   0x20 // Pulse Accumulator Overflow Interrupt En.
#define PAII    0x10 // Pulse Accumulator Interrupt Enable
#define PR1     0x02 // Timer prescaler
#define PR0     0x01 // Timer prescaler
#define TPR_1   0x00 // Timer prescale div 1
#define TPR_4   0x01 // Timer prescale div 4
#define TPR_8   0x02 // Timer prescale div 8
#define TPR_16  0x03 // Timer prescale div 16

// Flags of Timer Interrupt Flag Register 2 (M6811_TFLG2).
#define M6811_TOF     0x80 // Timer overflow bit
#define M6811_RTIF    0x40 // Read time interrupt flag
#define M6811_PAOVF   0x20 // Pulse accumulator overflow Interrupt flag
#define M6811_PAIF    0x10 // Pulse accumulator Input Edge

#define TOF     0x80 // Timer overflow bit
#define RTIF    0x40 // Read time interrupt flag
#define PAOVF   0x20 // Pulse accumulator overflow Interrupt flag
#define PAIF    0x10 // Pulse accumulator Input Edge

// Flags of Pulse Accumulator Control Register (PACTL).
#define M6811_DDRA7   0x80 // Data direction for port A bit 7
#define M6811_PAEN    0x40 // Pulse accumulator system enable
#define M6811_PAMOD   0x20 // Pulse accumulator mode
#define M6811_PEDGE   0x10 // Pulse accumulator edge control
#define M6811_RTR1    0x02 // RTI Interrupt rates select
#define M6811_RTR0    0x01 //

#define DDRA7   0x80 // Data direction for port A bit 7
#define PAEN    0x40 // Pulse accumulator system enable
#define PAMOD   0x20 // Pulse accumulator mode
#define PEDGE   0x10 // Pulse accumulator edge control
#define RTR1    0x02 // RTI Interrupt rates select
#define RTR0    0x01 //

// Flags of the Options register.
#define M6811_ADPU    0x80 // A/D Powerup
#define M6811_CSEL    0x40 // A/D/EE Charge pump clock source select
#define M6811_IRQE    0x20 // IRQ Edge/Level sensitive
#define M6811_DLY     0x10 // Stop exit turn on delay
#define M6811_CME     0x08 // Clock Monitor enable
#define M6811_CR1     0x02 // COP timer rate select
#define M6811_CR0     0x01 // COP timer rate select

#define ADPU    0x80 // A/D Powerup
#define CSEL    0x40 // A/D/EE Charge pump clock source select
#define IRQE    0x20 // IRQ Edge/Level sensitive
#define DLY     0x10 // Stop exit turn on delay
#define CME     0x08 // Clock Monitor enable
#define CR1     0x02 // COP timer rate select
#define CR0     0x01 // COP timer rate select

// Flags of the HPRIO register.
#define M6811_RBOOT   0x80 // Read Bootstrap ROM
#define M6811_SMOD    0x40 // Special Mode
#define M6811_MDA     0x20 // Mode Select A
#define M6811_IRV     0x10 // Internal Read Visibility
#define M6811_PSEL3   0x08 // Priority Select
#define M6811_PSEL2   0x04 //
#define M6811_PSEL1   0x02 //
#define M6811_PSEL0   0x01 //

#define RBOOT   0x80 // Read Bootstrap ROM
#define SMOD    0x40 // Special Mode
#define MDA     0x20 // Mode Select A
#define IRV     0x10 // Internal Read Visibility
#define PSEL3   0x08 // Priority Select
#define PSEL2   0x04 //
#define PSEL1   0x02 //
#define PSEL0   0x01 //

#endif //_M68HC11_H
