#FILE = E2KCOMM.TXT   'EDWin 2000 Common Strings Eng'

991 ~  ~ #branch
992 ~  ~ % (<F10> to Cancel)
993 ~  ~ &Help
994 ~  ~ &Abort
995 ~  ~ &Absolute
996 ~  ~ &AC Sweep
997 ~  ~ &Accept
998 ~  ~ &Active layers
999 ~  ~ &Add
9910 ~  ~ &All
9911 ~  ~ &Auto
9912 ~  ~ &Block edit
9913 ~  ~ &Board datum
9914 ~  ~ &Break
9915 ~  ~ &Cancel
9916 ~  ~ &Centre
9917 ~  ~ &Close
9918 ~  ~ &Color
9919 ~  ~ &Colors
9920 ~  ~ &Common-units
9921 ~  ~ &Comp side
9922 ~  ~ &Components
9923 ~  ~ &Continue
9924 ~  ~ &Copper
9925 ~  ~ &Current
9926 ~  ~ &Project
9927 ~  ~ &DC Sweep
9928 ~  ~ &Delete
9929 ~  ~ &Description
9930 ~  ~ &Design notes
9931 ~  ~ &Part
9932 ~  ~ &Parts
9933 ~  ~ &Edit
9934 ~  ~ &Help
9935 ~  ~ &Entries
9936 ~  ~ &Execute
9937 ~  ~ &Exit
9938 ~  ~ &External index code
9939 ~  ~ &File
9940 ~  ~ &First
9941 ~  ~ &Format datum
9942 ~  ~ &Full name
9943 ~  ~ &Global parameters
9944 ~  ~ &Help
9945 ~  ~ &Inches
9946 ~  ~ &Layer
9947 ~  ~ &Layers
9948 ~  ~ &Layout
9949 ~  ~ &Packages
9950 ~  ~ &Library
9951 ~  ~ &Info
9952 ~  ~ &Millimeters
9953 ~  ~ &Mirror
9954 ~  ~ &Mode
9955 ~  ~ &Monochrome
9956 ~  ~ &Nets
9957 ~  ~ &New
9958 ~  ~ &Next
9959 ~  ~ &Nodes
9960 ~  ~ &Open
9961 ~  ~ &Options
9962 ~  ~ &Orientation prefix
9963 ~  ~ &Pad Frames
9964 ~  ~ &Page Notes
9965 ~  ~ &Print
9966 ~  ~ &Print Page
9967 ~  ~ &Ratsnest
9968 ~  ~ &Ref.Point
9969 ~  ~ &RefPoint
9970 ~  ~ &Restore
9971 ~  ~ &Return
9972 ~  ~ &Run
9973 ~  ~ &Save
9974 ~  ~ &Schematic
9975 ~  ~ &Symbol
9976 ~  ~ &Symbols
9977 ~  ~ &Symbols
9978 ~  ~ &Separated
9979 ~  ~ &Setup
9980 ~  ~ &Simulation reference
9981 ~  ~ &Solder Side
9982 ~  ~ &Stacked layers
9983 ~  ~ &Standard
9984 ~  ~ &Start
9985 ~  ~ &Traces
9986 ~  ~ &True size
9987 ~  ~ &Unbury vias
9988 ~  ~ &Unit
9989 ~  ~ &Update
9990 ~  ~ &Vector
9991 ~  ~ &View
9992 ~  ~ &Voltage
9993 ~  ~ &Widths/Vias/Preroutes
9994 ~  ~ rot=
9995 ~  ~ '@END' line missing or misplaced
9996 ~  ~ (#B=
9997 ~  ~ (<F10> to Cancel)
9998 ~  ~ (boundary
9999 ~  ~ (C(Net
99100 ~  ~ (Demo version)
99101 ~  ~ (hier:
99102 ~  ~ (in Bus:
99103 ~  ~ (inch)
99104 ~  ~ (inch):
99105 ~  ~ (L
99106 ~  ~ (lay:
99107 ~  ~ (Layout:
99108 ~  ~ (mm)
99109 ~  ~ (mm):
99110 ~  ~ (N
99111 ~  ~ (net
99112 ~  ~ (path
99113 ~  ~ (rect pcb
99114 ~  ~ (rule
99115 ~  ~ (sch:
99116 ~  ~ (Shortcut: *
99117 ~  ~ (Smb:
99118 ~  ~ (Stat: Hrf item)
99119 ~  ~ (Stat: normal)
99120 ~  ~ (Temp)
99121 ~  ~ (user.def.)
99122 ~  ~ (width
99123 ~  ~ *** Hierarchy stack: ***
99124 ~  ~ *** SUBCIRCUIT DEFINITION ***
99125 ~  ~ *Missing*
99126 ~  ~ *Msng*
99127 ~  ~ *Node
99128 ~  ~ , Pin
99129 ~  ~ , symbol:
99130 ~  ~ - all existing connections in one branch
99131 ~  ~ - All nodes have routed connections
99132 ~  ~ - Graphic Items
99133 ~  ~ - INP.
99134 ~  ~ - layers from:
99135 ~  ~ - no data
99136 ~  ~ - no routed connections
99137 ~  ~ - OUT.
99138 ~  ~ - pad locations
99139 ~  ~ - Padstack items
99140 ~  ~ - Save block file
99141 ~  ~ - Select block file to load
99142 ~  ~ - Select/define artwork file name
99143 ~  ~ .END
99144 ~  ~ .ENDS
99145 ~  ~ .FOUR
99146 ~  ~ .MODEL
99147 ~  ~ .NOISE
99148 ~  ~ .OPTIONS
99149 ~  ~ .PLOT
99150 ~  ~ .PRINT
99151 ~  ~ .TEMP
99152 ~  ~ .TRAN
99153 ~  ~ /Branches
99154 ~  ~ /Junction points
99155 ~  ~ /Sch. Comps
99156 ~  ~ :Connectivity test
99157 ~  ~ > as Circuit element
99158 ~  ~ ?Help
99159 ~  ~ {Enter}
99160 ~  ~ 10 mil
99161 ~  ~ 100 mil
99162 ~  ~ 20 mil
99163 ~  ~ 40 mil
99164 ~  ~ 50 mil
99165 ~  ~ 80 mil
99166 ~  ~ A(landscape),11,8.5)
99167 ~  ~ A(portrait),8.5,11)
99168 ~  ~ A,0,13
99169 ~  ~ A0,1189,841)
99170 ~  ~ A1,841,594)
99171 ~  ~ A2,594,420)
99172 ~  ~ A3,420,297)
99173 ~  ~ A4(landscape),297,210)
99174 ~  ~ A4(portrait),210,297)
99175 ~  ~ AboutBox
99176 ~  ~ ac
99177 ~  ~ Accept
99178 ~  ~ Active layer on &top
99179 ~  ~ Add
99180 ~  ~ Add point
99181 ~  ~ Add sizes
99182 ~  ~ admin
99183 ~  ~ Agap:
99184 ~  ~ AgapsLI
99185 ~  ~ Airgap:
99186 ~  ~ ALA
99187 ~  ~ alfa=
99188 ~  ~ All
99189 ~  ~ All currently routed traces will be deleted
99190 ~  ~ All nets?
99191 ~  ~ All pages
99192 ~  ~ All,
99193 ~  ~ All,UP
99194 ~  ~ AllAps
99195 ~  ~ already assigned
99196 ~  ~ already exists
99197 ~  ~ already loaded
99198 ~  ~ already loaded.
99199 ~  ~ Already selected
99200 ~  ~ AngleA
99201 ~  ~ AngleB
99202 ~  ~ AngleSnapTable
99203 ~  ~ Any
99204 ~  ~ Any orientation
99205 ~  ~ Aper
99206 ~  ~ Aperture & sizes Display
99207 ~  ~ Aperture table
99208 ~  ~ Apertures
99209 ~  ~ ARC
99210 ~  ~ Arc segments as lines
99211 ~  ~ ARC: r=
99212 ~  ~ are layout only - can't split
99213 ~  ~ are schematic only - can't split
99214 ~  ~ ARIZONA
99215 ~  ~ ART
99216 ~  ~ Artwork File - Incorrect format
99217 ~  ~ Artwork files (*.ART)|*.ART
99218 ~  ~ as #
99219 ~  ~ as defined
99220 ~  ~ As Setup
99221 ~  ~ ASC
99222 ~  ~ ASCII Load Error:
99223 ~  ~ Asnap:
99224 ~  ~ assign  for:
99225 ~  ~ Assign Comps to Patterns by Name prefixes
99226 ~  ~ Assign Element to this Symbol
99227 ~  ~ Element&&Model Code
99228 ~  ~ Assign Node to Entry #
99229 ~  ~ Associate Field (EID) :
99230 ~  ~ Associate operation takes time
99231 ~  ~ Association with EID (Part:
99232 ~  ~ Auto&place
99233 ~  ~ Autocad DXF file (*.DXF)|*.DXF
99234 ~  ~ Automatic
99235 ~  ~ B,0,13
99236 ~  ~ B,17,11)
99237 ~  ~ B_IT
99238 ~  ~ Background
99239 ~  ~ Background,0
99240 ~  ~ Background,15
99241 ~  ~ beta=
99242 ~  ~ Bit&maps
99243 ~  ~ Bitmap Preview
99244 ~  ~ Bitmaps
99245 ~  ~ BkgColor
99246 ~  ~ BLACK
99247 ~  ~ BLOCK
99248 ~  ~ Block:
99249 ~  ~ BLOCKS
99250 ~  ~ BLOCKS /Symbols and Notes
99251 ~  ~ BLUE
99252 ~  ~ Board
99253 ~  ~ Board corners:
99254 ~  ~ Board outline definition incomplete
99255 ~  ~ Board Outline Undefined
99256 ~  ~ Board Outline
99257 ~  ~ Board rectangle:
99258 ~  ~ Board size:
99259 ~  ~ Both components must be either packaged or unpackaged
99260 ~  ~ Browse Parts:
99261 ~  ~ Browse Symbols:
99262 ~  ~ Buried Vias not found
99263 ~  ~ Buried Vias: Layer Sandwich Map
99264 ~  ~ Bury Vias?
99265 ~  ~ Bus
99266 ~  ~ Bus Map
99267 ~  ~ Bus Member
99268 ~  ~ Bus Member
99269 ~  ~ Bus Name
99270 ~  ~ Bus Name
99271 ~  ~ Bus,2
99272 ~  ~ Bus:
99273 ~  ~ Buses
99274 ~  ~ Bus width
99275 ~  ~ Busy
99276 ~  ~ Button
99277 ~  ~ Can't access Circuit:
99278 ~  ~ Can't add expression to this component:
99279 ~  ~ Can't add instance parameters to this component:
99280 ~  ~ Can't add model parameters to this component:
99281 ~  ~ Can't add Polynomial parameters to this component:
99282 ~  ~ Can't add source function to this component:
99283 ~  ~ Can't add Spice Parameters to this symbol
99284 ~  ~ Can't add State File Name to this component:
99285 ~  ~ Can't assign Part:
99286 ~  ~ Can't assign Symbol:
99287 ~  ~ Can't change side of
99288 ~  ~ Can't connect
99289 ~  ~ Can't copy library element:
99290 ~  ~ Can't copy Model:
99291 ~  ~ Can't copy to existing part:
99292 ~  ~ Can't copy to existing symbol:
99293 ~  ~ Can't create ArcSegment
99294 ~  ~ Can't create B-point
99295 ~  ~ Can't create bending point
99296 ~  ~ Can't create Board Outline:
99297 ~  ~ Can't create Branch
99298 ~  ~ Can't Create Branch Segment
99299 ~  ~ Can't Create Bus:
99300 ~  ~ Can't create Component:
99301 ~  ~ Can't Create Database
99302 ~  ~ Can't create Part:
99303 ~  ~ Can't create gate within Component:
99304 ~  ~ Can't create group in Part:
99305 ~  ~ Can't create group within Component:
99306 ~  ~ Can't create input for Clearance Check
99307 ~  ~ Can't create item in symbol:
99308 ~  ~ Can't create Item:
99309 ~  ~ Can't create Model:
99310 ~  ~ Can't create more pages
99311 ~  ~ Can't create new page:
99312 ~  ~ Can't create Node Modifiers vector:
99313 ~  ~ Can't create node:
99314 ~  ~ Can't create P/S pin in Part:
99315 ~  ~ Can't create Pad Stack for Vias
99316 ~  ~ Can't create Padstack
99317 ~  ~ Can't create Padstack:
99318 ~  ~ Can't create Page Format:
99319 ~  ~ Can't create Pattern #
99320 ~  ~ Can't create Pattern by X axis. Too huge component size or clearance or value of alignment
99321 ~  ~ Can't create Pattern by Y axis. Too huge component size or clearance or value of alignment
99322 ~  ~ Can't create prototype of board frame
99323 ~  ~ Can't create signal pin in Part:
99324 ~  ~ Can't create Simulator Option Vector
99325 ~  ~ Can't create Subcircuit Nodes Vector
99326 ~  ~ Can't create symbol for keep off zones
99327 ~  ~ Can't create Symbol/Package:
99328 ~  ~ Can't create temporary Padstack Symbol
99329 ~  ~ Can't create Trace
99330 ~  ~ Can't create trace record
99331 ~  ~ Can't Create Trace Segment
99332 ~  ~ Can't Create Via
99333 ~  ~ Can't create Via Pad Stack Item
99334 ~  ~ Can't Create Via Padstack Item
99335 ~  ~ Can't create/write to file:
99336 ~  ~ Can't delete - part used by component(s) in hier:
99337 ~  ~ Can't delete - symbol
99338 ~  ~ Can't delete Part:
99339 ~  ~ Can't delete last entry/pad
99340 ~  ~ Can't delete Padstack:
99341 ~  ~ Can't delete Page:
99342 ~  ~ Can't delete Symbol/Package:
99343 ~  ~ Can't execute swap: -
99344 ~  ~ Can't find
99345 ~  ~ Can't find part:
99346 ~  ~ Can't find entry in Symbol/Package:
99347 ~  ~ Can't find Model:
99348 ~  ~ Can't find number for Net Name prefix:
99349 ~  ~ Can't find number for Net/Bus Name prefix:
99350 ~  ~ Can't find Symbol/Package:
99351 ~  ~ Can't load
99352 ~  ~ Can't load Project:
99353 ~  ~ Can't load Part:
99354 ~  ~ Can't Load file:
99355 ~  ~ Can't load Model:
99356 ~  ~ Can't load Padstack:
99357 ~  ~ Can't load Symbol/Package:
99358 ~  ~ Can't merge Pwr/Gnd with bus member
99359 ~  ~ Can't merge two bus members
99360 ~  ~ Can't move Symbol:
99361 ~  ~ Can't open library:
99362 ~  ~ Can't quit at this time
99363 ~  ~ Can't reacreate Model:
99364 ~  ~ Can't read Part:
99365 ~  ~ Can't read file:
99366 ~  ~ Can't read group in Part:
99367 ~  ~ Can't Read Menu Profile
99368 ~  ~ Can't read Net/Bus:
99369 ~  ~ Can't read Net/Node:
99370 ~  ~ Can't read Net:
99371 ~  ~ Can't read pin in Part:
99372 ~  ~ Can't rename Page:
99373 ~  ~ Can't renumber entries/pads
99374 ~  ~ Can't save Project
99375 ~  ~ Can't save Part:
99376 ~  ~ Can't save Model:
99377 ~  ~ Can't save orientation prefixes
99378 ~  ~ Can't save Padstack:
99379 ~  ~ Can't save Pattern prefixes
99380 ~  ~ Can't save Symbol/Package:
99381 ~  ~ Can't save Temporary Backup:
99382 ~  ~ Can't setup default parameters for Pattern #
99383 ~  ~ Can't split Bus Member
99384 ~  ~ Can't split Bus Member:
99385 ~  ~ Can't start:
99386 ~  ~ Can't swap - schematic components not on the same page
99387 ~  ~ Can't update Padstack:
99388 ~  ~ Cancel
99389 ~  ~ Canceled
99390 ~  ~ Cancelled
99391 ~  ~ Cannot Accept this row
99392 ~  ~ Cannot save Registration Form in file:
99393 ~  ~ Cannot select this row
99394 ~  ~ Cant Read Menu Profile
99395 ~  ~ Can't assign number to Prefix:
99396 ~  ~ Can't create Net:
99397 ~  ~ Can't load Temporary Backup:
99398 ~  ~ Can't read entry in Symbol/Package:
99399 ~  ~ CATEGORIES
99400 ~  ~ Center
99401 ~  ~ Centx,Centy,Radius,AngleA,AngleB,LWidth
99402 ~  ~ Centx,Centy,Radius,Filled,LWidth
99403 ~  ~ Change
99404 ~  ~ Change Item Layer
99405 ~  ~ Change Items Layer
99406 ~  ~ Check Board Size & Placement Patterns.
99407 ~  ~ Cir
99408 ~  ~ CIRCLE
99409 ~  ~ CIRCLE: r=
99410 ~  ~ Circuit Element:
99411 ~  ~ Circuit files(*.Cir)|*.Cir
99412 ~  ~ Circuits
99413 ~  ~ Circuits:
99414 ~  ~ Clear
99415 ~  ~ Clear all items
99416 ~  ~ Clear All Traces from the Board
99417 ~  ~ Clear connections
99418 ~  ~ Clear current Project: <
99419 ~  ~ Clearances:
99420 ~  ~ Click on column to select NC-drill output for sandwich:
99421 ~  ~ CLIP
99422 ~  ~ Close
99423 ~  ~ CLOSE
99424 ~  ~ CM DLLs Library
99425 ~  ~ CM DLLs Library:
99426 ~  ~ CML=
99427 ~  ~ Co&pper
99428 ~  ~ Code
99429 ~  ~ Colors
99430 ~  ~ Cols
99431 ~  ~ Columns:
99432 ~  ~ Combo1
99433 ~  ~ COMP
99434 ~  ~ Comp. Descript.
99435 ~  ~ Comp. Entry
99436 ~  ~ Comp. Entry
99437 ~  ~ Comp. name
99438 ~  ~ Comp. outline
99439 ~  ~ Comp. text
99440 ~  ~ Comp. value
99441 ~  ~ Comp.Desc.
99442 ~  ~ Comp.description
99443 ~  ~ Comp.entry
99444 ~  ~ COMP.LAYER
99445 ~  ~ COMP.MASK
99446 ~  ~ COMP.MASK ,1,11
99447 ~  ~ Comp.name
99448 ~  ~ Comp.name text
99449 ~  ~ Comp.outline
99450 ~  ~ COMP.PRINT
99451 ~  ~ COMP.PRINT,1,12
99452 ~  ~ Comp.text
99453 ~  ~ Comp.value
99454 ~  ~ Comp:
99455 ~  ~ COMPDESC
99456 ~  ~ Complete current iteration and exit.
99457 ~  ~ Completed
99458 ~  ~ Completed: 
99459 ~  ~ COMPNAME
99460 ~  ~ Component
99461 ~  ~ Component :
99462 ~  ~ Component block create
99463 ~  ~ Component is relocated by placement pattern :
99464 ~  ~ Component map
99465 ~  ~ Component must be mirrored
99466 ~  ~ Component must be unmirrored
99467 ~  ~ Component name
99468 ~  ~ Component name (
99469 ~  ~ Component parameters:
99470 ~  ~ Component side /
99471 ~  ~ Component value
99472 ~  ~ Component:
99473 ~  ~ component
99474 ~  ~ Componet
99475 ~  ~ Contents:
99476 ~  ~ Continue
99477 ~  ~ Continue ?
99478 ~  ~ Continue processing this Part?
99479 ~  ~ Continue?
99480 ~  ~ Conversion failed
99481 ~  ~ Conversion setup
99482 ~  ~ Convert
99483 ~  ~ coordmode = A then absolute
99484 ~  ~ coordmode = B then from board datum
99485 ~  ~ coordmode = R then from ref.point
99486 ~  ~ coordmode = V then vector from current pos.
99487 ~  ~ coordmode if present overrides set mode
99488 ~  ~ Copper
99489 ~  ~ Copper items
99490 ~  ~ Copper items
99491 ~  ~ Copy
99492 ~  ~ Copy screen to clipboard
99493 ~  ~ Creating symbol
99494 ~  ~ Current
99495 ~  ~ Current aperture table has been changed
99496 ~  ~ Current aperture table:
99497 ~  ~ Current association with External Info Project
99498 ~  ~ Current positions of the components will be changed.
99499 ~  ~ Current:
99500 ~  ~ Currently Selected Paths for:
99501 ~  ~ Custom Colors:
99502 ~  ~ CYAN
99503 ~  ~ D for x,y displacement from board datum.
99504 ~  ~ D for x,y displacement from page datum.
99505 ~  ~ D-Codes:
99506 ~  ~ D=
99507 ~  ~ Dash
99508 ~  ~ Dash1
99509 ~  ~ Dash2
99510 ~  ~ Dash3
99511 ~  ~ Dash4
99512 ~  ~ DashDot
99513 ~  ~ DashDotDot
99514 ~  ~ Project load failed - disk/data error
99515 ~  ~ DBLABEL
99516 ~  ~ DC Sweep in progress
99517 ~  ~ Dcode
99518 ~  ~ Dcode:
99519 ~  ~ Default
99520 ~  ~ Define pinout for group number #
99521 ~  ~ Delete
99522 ~  ~ Delete bitmap?
99523 ~  ~ Delete block
99524 ~  ~ Delete cell line ?
99525 ~  ~ Delete free trace points
99526 ~  ~ Delete item?
99527 ~  ~ Delete last
99528 ~  ~ Delete selected items
99529 ~  ~ Delete size
99530 ~  ~ Delete text?
99531 ~  ~ Delete trace toint
99532 ~  ~ Delete trace Segment
99533 ~  ~ Delete unused
99534 ~  ~ Delete whole trace
99535 ~  ~ Delete wires  not connected to nodes
99536 ~  ~ Delete wires connected to single node
99537 ~  ~ Delete wires with nonorthogonal segments
99538 ~  ~ Delete zone ?
99539 ~  ~ Delete:
99540 ~  ~ Delta X:
99541 ~  ~ Delta Y:
99542 ~  ~ Description
99543 ~  ~ Design notes
99544 ~  ~ Part Libraries (*.EDL)|*.EDL
99545 ~  ~ Part/Package:
99546 ~  ~ Part:
99547 ~  ~ Part
99548 ~  ~ Part description text invalid
99549 ~  ~ Part full name
99550 ~  ~ Part in use by component(s) in hier:
99551 ~  ~ Part info
99552 ~  ~ Part libraries:
99553 ~  ~ Part map
99554 ~  ~ Part name
99555 ~  ~ Part names Dic.(*.EDD)|*.EDD
99556 ~  ~ Part pinout
99557 ~  ~ Part text edit - syntax error
99558 ~  ~ Part with name:
99559 ~  ~ Part(s)
99560 ~  ~ Part/Component incompatible:
99561 ~  ~ Part/Symbol:
99562 ~  ~ Part:
99563 ~  ~ Parts
99564 ~  ~ PARTLIBS
99565 ~  ~ Waveform
99566 ~  ~ Waveform Viewer
99567 ~  ~ Waveform Viewer - %s
99568 ~  ~ Dictionary file for part names:
99569 ~  ~ Dictionary file for symbol names:
99570 ~  ~ Dimensions
99571 ~  ~ Direction
99572 ~  ~ disabled
99573 ~  ~ Display
99574 ~  ~ Display data files (*.MCR)\0
99575 ~  ~ Distance:
99576 ~  ~ disto
99577 ~  ~ Distributed by:
99578 ~  ~ Distributor code:
99579 ~  ~ Dm=
99580 ~  ~ Do you want to continue ?
99581 ~  ~ Do you want to execute autoplace?
99582 ~  ~ Do You wish to save changes ?
99583 ~  ~ Dot
99584 ~  ~ Double click column to change apeture size (inch/mm)
99585 ~  ~ Down
99586 ~  ~ dX=
99587 ~  ~ DXF
99588 ~  ~ DXF export file save cancelled
99589 ~  ~ DXF export file save failed - disk error
99590 ~  ~ DXF export file saved O.K
99591 ~  ~ dY=
99592 ~  ~ E&xecute
99593 ~  ~ E&xit
99594 ~  ~ Edit
99595 ~  ~ Edit comp. list create error
99596 ~  ~ Edit comp. relocate error
99597 ~  ~ Edit component list create in:
99598 ~  ~ Edit component relocation in:
99599 ~  ~ Edit/Type in dcodes:
99600 ~  ~ EDSpice - Circuit elements
99601 ~  ~ EDSpice - Subcircuits library
99602 ~  ~ EDSpice - Subdirectories
99603 ~  ~ EDSpice - Symbol: <
99604 ~  ~ EDSpice Reference:
99605 ~  ~ 
99606 ~  ~ Subdirectories
99607 ~  ~ -
99608 ~  ~ Aperture table
99609 ~  ~ Apertures & Sizes
99610 ~  ~ Apertures Tables
99611 ~  ~ AutoPlacer
99612 ~  ~ Board size
99613 ~  ~ Board statistics
99614 ~  ~ Create components (
99615 ~  ~ Create components (Part)
99616 ~  ~ Create components (Symbol)
99617 ~  ~ Project file Name:
99618 ~  ~ Edit & add text block
99619 ~  ~ Edit part
99620 ~  ~ Edit net
99621 ~  ~ EDSpice simulator (hier:
99622 ~  ~ Exchange component:
99623 ~  ~ Library  symbol update
99624 ~  ~ Library editor
99625 ~  ~ Library search sequence
99626 ~  ~ Loading ASCII project
99627 ~  ~ Nodes in split net
99628 ~  ~ Fabrication manager
99629 ~  ~ Rename net
99630 ~  ~ Select padstack
99631 ~  ~ Select symbol
99632 ~  ~ colors:
99633 ~  ~ project files (*.EDB)|*.EDB
99634 ~  ~ Import bitmap
99635 ~  ~ Info
99636 ~  ~ layers:
99637 ~  ~ 
99638 ~  ~ Lite
99639 ~  ~ Lite limits exceeded
99640 ~  ~ EED layers:
99641 ~  ~ EED3 files
99642 ~  ~ EED3 files:
99643 ~  ~ EED3JobDir
99644 ~  ~ Electronic engineering system
99645 ~  ~ Element
99646 ~  ~ Element code:
99647 ~  ~ Element profile file editor
99648 ~  ~ Element template file invalid.
99649 ~  ~ Enabled
99650 ~  ~ END
99651 ~  ~ EndDoc
99652 ~  ~ Ent.Name
99653 ~  ~ Enter symbol name
99654 ~  ~ ENTITIES
99655 ~  ~ Entries
99656 ~  ~ Entry
99657 ~  ~ Entry name
99658 ~  ~ Entry:
99659 ~  ~ Entry: #
99660 ~  ~ Error
99661 ~  ~ Error %d opening %s.
99662 ~  ~ Error function
99663 ~  ~ Error:
99664 ~  ~ Establishing connectivity for:
99665 ~  ~ event
99666 ~  ~ exchange of packinfo failed
99667 ~  ~ Execute
99668 ~  ~ Execute translation?
99669 ~  ~ existing wires in the schematics Project.
99670 ~  ~ Exit
99671 ~  ~ Export
99672 ~  ~ Ext Info Files (*.EID)|*.EID|All Files (*.*)|*.*
99673 ~  ~ External project field to associate
99674 ~  ~ External index
99675 ~  ~ External index code
99676 ~  ~ External index code for the part :
99677 ~  ~ External index code:
99678 ~  ~ External info project :
99679 ~  ~ Extracting components
99680 ~  ~ failed
99681 ~  ~ Failed to update Part
99682 ~  ~ False
99683 ~  ~ FCIRCLE
99684 ~  ~ File already exists
99685 ~  ~ File name:
99686 ~  ~ File:
99687 ~  ~ Find
99688 ~  ~ Finish current operation for:
99689 ~  ~ Finished.
99690 ~  ~ Fir
99691 ~  ~ First pin down orientation
99692 ~  ~ First pin left orientation
99693 ~  ~ First pin right orientation
99694 ~  ~ First pin up orientation
99695 ~  ~ &Fit Image
99696 ~  ~ Fixed
99697 ~  ~ for merge with:
99698 ~  ~ for:
99699 ~  ~ Format definition incomplete
99700 ~  ~ Format outline
99701 ~  ~ Format outline undefined
99702 ~  ~ Format:
99703 ~  ~ Format: x,y[,D]
99704 ~  ~ FORMATS
99705 ~  ~ found in place file but not in Project
99706 ~  ~ fourier
99707 ~  ~ FREC
99708 ~  ~ from disk library
99709 ~  ~ From hierarchy:
99710 ~  ~ from library:
99711 ~  ~ Full name
99712 ~  ~ Full name:
99713 ~  ~ Function template file invalid.
99714 ~  ~ Gap:
99715 ~  ~ Gap=
99716 ~  ~ Gate unpackaged - can't swap
99717 ~  ~ Gate:
99718 ~  ~ Gates :
99719 ~  ~ Gates of different type - can't swap
99720 ~  ~ gates on different board sides
99721 ~  ~ Global pattern parameters
99722 ~  ~ Gnd/Vcc
99723 ~  ~ Gnd/Vcc name
99724 ~  ~ Graphic import editor
99725 ~  ~ GRAY
99726 ~  ~ GREEN
99727 ~  ~ GRID
99728 ~  ~ Grid
99729 ~  ~ Grid,7
99730 ~  ~ Grid:
99731 ~  ~ GridSymbol
99732 ~  ~ Group
99733 ~  ~ Group name
99734 ~  ~ Group number: (
99735 ~  ~ Group:
99736 ~  ~ Groups:
99737 ~  ~ Groups: (
99738 ~  ~ Guidelines (Net)
99739 ~  ~ Guidelines (Next unconnected node)
99740 ~  ~ Handle to hier:
99741 ~  ~ has less pins
99742 ~  ~ has more pins
99743 ~  ~ HEADER
99744 ~  ~ Header and tables
99745 ~  ~ Height:
99746 ~  ~ Help
99747 ~  ~ hier:
99748 ~  ~ Circuit
99749 ~  ~ Hierarchy stack
99750 ~  ~ HIERSTCK
99751 ~  ~ HIGH
99752 ~  ~ Hole cat.:
99753 ~  ~ Hole cat:
99754 ~  ~ Hole category:
99755 ~  ~ Hole diam:
99756 ~  ~ Hole diameter:
99757 ~  ~ Hole outlines:
99758 ~  ~ HOOK
99759 ~  ~ Horizontal
99760 ~  ~ Horizontal orientation
99761 ~  ~ Image not found in the clipboard.
99762 ~  ~ in
99763 ~  ~ in automatic mode
99764 ~  ~ In Bus:
99765 ~  ~ in lib:
99766 ~  ~ in library:
99767 ~  ~ in Net:
99768 ~  ~ in schematics. pages(
99769 ~  ~ In schematics:
99770 ~  ~ inch
99771 ~  ~ inches
99772 ~  ~ Incomplete part description.
99773 ~  ~ Incorrect record sequence
99774 ~  ~ Info
99775 ~  ~ IniFile
99776 ~  ~ Input file:
99777 ~  ~ Insert
99778 ~  ~ Insert disk in drive
99779 ~  ~ Insert size
99780 ~  ~ Install from:
99781 ~  ~ Installation renumbering routine
99782 ~  ~ Invalid record
99783 ~  ~ invalid)
99784 ~  ~ is 'GND' net
99785 ~  ~ is :
99786 ~  ~ is locked and can't change it's position
99787 ~  ~ is not trace layer!
99788 ~  ~ is not used in any part
99789 ~  ~ is subcircuit I/O node
99790 ~  ~ Item text edit - syntax error
99791 ~  ~ item(s)
99792 ~  ~ Item(s):
99793 ~  ~ Item:
99794 ~  ~ Iteration:
99795 ~  ~ Job files
99796 ~  ~ Job files:
99797 ~  ~ JobDir
99798 ~  ~ Junction
99799 ~  ~ Junction,1
99800 ~  ~ Kernel
99801 ~  ~ Keyboard
99802 ~  ~ Package:
99803 ~  ~ Package:
99804 ~  ~ Package:
99805 ~  ~ package:
99806 ~  ~ LAYER
99807 ~  ~ Layer usage:
99808 ~  ~ Layer:
99809 ~  ~ LAYERS
99810 ~  ~ Layers:
99811 ~  ~ LayGridTable
99812 ~  ~ LAYLIBS
99813 ~  ~ Layout
99814 ~  ~ Layout Editor
99815 ~  ~ Layout editor
99816 ~  ~ Package
99817 ~  ~ Package libraries:
99818 ~  ~ Package map
99819 ~  ~ Package:
99820 ~  ~ Package:
99821 ~  ~ LaySnapTable
99822 ~  ~ lcompname,pinnumber
99823 ~  ~ LComponent
99824 ~  ~ Leading
99825 ~  ~ Library
99826 ~  ~ library
99827 ~  ~ Library editor
99828 ~  ~ Library files
99829 ~  ~ Library files:
99830 ~  ~ Library name
99831 ~  ~ Library search engine
99832 ~  ~ Library viewer
99833 ~  ~ Licenced to:
99834 ~  ~ LINE
99835 ~  ~ Line apertures:
99836 ~  ~ Line width:
99837 ~  ~ Line:
99838 ~  ~ LINE: l=
99839 ~  ~ Lines
99840 ~  ~ LineWidths
99841 ~  ~ List
99842 ~  ~ List of aperture tables:
99843 ~  ~ List of materials editor
99844 ~  ~ Load
99845 ~  ~ Load anyway ?
99846 ~  ~ Load temporary backup
99847 ~  ~ Loading block
99848 ~  ~ Loading stopped
99849 ~  ~ Loading temporary backup
99850 ~  ~ Project bitmap library:
99851 ~  ~ Project part library:
99852 ~  ~ Project library
99853 ~  ~ Project symbol library:
99854 ~  ~ Lock components by name prefix :
99855 ~  ~ Locked
99856 ~  ~ Log. raster
99857 ~  ~ Lsizes:
99858 ~  ~ LtBLUE
99859 ~  ~ LtCYAN
99860 ~  ~ LtGRAY
99861 ~  ~ LtGREEN
99862 ~  ~ LtMAGENTA
99863 ~  ~ LtRED
99864 ~  ~ LtYELLOW
99865 ~  ~ LTYPE
99866 ~  ~ LWidth
99867 ~  ~ MAGENTA
99868 ~  ~ main
99869 ~  ~ MAINHIER
99870 ~  ~ MAINPAGE
99871 ~  ~ Manual
99872 ~  ~ Massteck layers:
99873 ~  ~ Master unit <Metric>
99874 ~  ~ Match Case
99875 ~  ~ Match No. of pins      codes:
99876 ~  ~ Matching records found
99877 ~  ~ Max
99878 ~  ~ Max:
99879 ~  ~ Memb:
99880 ~  ~ Member
99881 ~  ~ Merge
99882 ~  ~ METRIC
99883 ~  ~ millimeters
99884 ~  ~ Min
99885 ~  ~ Min:
99886 ~  ~ Mirror
99887 ~  ~ Mirror:
99888 ~  ~ Mirrored/
99889 ~  ~ Missing gates(s) in component:
99890 ~  ~ Missing group(s) in component:
99891 ~  ~ Missing group(s) in part:
99892 ~  ~ missing or invalid
99893 ~  ~ Missing page:
99894 ~  ~ Mitering in progress ...
99895 ~  ~ MLAYER 10
99896 ~  ~ mm
99897 ~  ~ Model
99898 ~  ~ Model code:
99899 ~  ~ Model template file invalid.
99900 ~  ~ Model type not applicable to this element:
99901 ~  ~ Model unknown or .MODEL line invalid
99902 ~  ~ Model:
99903 ~  ~ Models library
99904 ~  ~ Models library:
99905 ~  ~ Modifier template file invalid.
99906 ~  ~ Monocolor
99907 ~  ~ Monochrome
99908 ~  ~ More pages
99909 ~  ~ MULTIMETER
99910 ~  ~ Multipage
99911 ~  ~ Multiple create:
99912 ~  ~ Name
99913 ~  ~ name rot:
99914 ~  ~ Name:
99915 ~  ~ Named
99916 ~  ~ Named as:
99917 ~  ~ named:
99918 ~  ~ Named:
99919 ~  ~ Nested subcircuit:
99920 ~  ~ Net
99921 ~  ~ Net:
99922 ~  ~ Net map
99923 ~  ~ Net name
99924 ~  ~ Net name (
99925 ~  ~ Net name
99926 ~  ~ Net status:
99927 ~  ~ Net text edit - component not found:
99928 ~  ~ Net text edit - node included in Net:
99929 ~  ~ Net text edit - syntax error
99930 ~  ~ Net/Bus:
99931 ~  ~ Net:
99932 ~  ~ Netname:
99933 ~  ~ Nets connected :
99934 ~  ~ New group:
99935 ~  ~ New size
99936 ~  ~ Next group
99937 ~  ~ Next text edit - pin not found:
99938 ~  ~ No
99939 ~  ~ No components with name prefix:
99940 ~  ~ No part file selected
99941 ~  ~ No matching record found
99942 ~  ~ No matching records found
99943 ~  ~ No output parameter selected for measurement
99944 ~  ~ No rotate
99945 ~  ~ Not used in symbol
99946 ~  ~ No variables selected for diagram
99947 ~  ~ Node
99948 ~  ~ Node mark
99949 ~  ~ Node marker
99950 ~  ~ Node marker,10
99951 ~  ~ Node marker,5
99952 ~  ~ Node:
99953 ~  ~ Nodes
99954 ~  ~ Nodes assignment incomplete or invalid
99955 ~  ~ Nodes only in layout:
99956 ~  ~ NOISE
99957 ~  ~ noise
99958 ~  ~ None
99959 ~  ~ none,
99960 ~  ~ None/
99961 ~  ~ not available
99962 ~  ~ Not found
99963 ~  ~ not found
99964 ~  ~ not used
99965 ~  ~ Number
99966 ~  ~ Number of assigned pins doesn't match number of entries in group symbol
99967 ~  ~ Number of components :
99968 ~  ~ Number of holes (total):
99969 ~  ~ Number of holes for component pins:
99970 ~  ~ Number of pads:
99971 ~  ~ Number of samples:
99972 ~  ~ Number of via holes:
99973 ~  ~ off
99974 ~  ~ Offset
99975 ~  ~ Omitted Zeros:
99976 ~  ~ on
99977 ~  ~ ON/OFF
99978 ~  ~ only partially connected
99979 ~  ~ Option template file invalid.
99980 ~  ~ Optional part info
99981 ~  ~ Options:
99982 ~  ~ or prefix ex.
99983 ~  ~ or wildcard ex.
99984 ~  ~ Out of range
99985 ~  ~ Output
99986 ~  ~ Output units
99987 ~  ~ Overwrite anyway ?
99988 ~  ~ Overwrite part:
99989 ~  ~ Overwrite symbol:
99990 ~  ~ P&reference
99991 ~  ~ P&references
99992 ~  ~ Packaged as gate: #
99993 ~  ~ Packaged components - change reference in Layout Editor
99994 ~  ~ PACKAGING
99995 ~  ~ Packaging preferences changed!
99996 ~  ~ Packaging:
99997 ~  ~ Pad frames
99998 ~  ~ Pad items
99999 ~  ~ Pad no. :
991000 ~  ~ Pad to Pad:
991001 ~  ~ PAD:
991002 ~  ~ padstack
991003 ~  ~ Padstack for Pad no.:
991004 ~  ~ Padstack library
991005 ~  ~ Padstack:
991006 ~  ~ PADSTACKS
991007 ~  ~ PADSTACKSI
991008 ~  ~ PADSTACKSM
991009 ~  ~ Page
991010 ~  ~ Page &outline
991011 ~  ~ Page notes
991012 ~  ~ Page:
991013 ~  ~ Pages:
991014 ~  ~ Pan to node on close
991015 ~  ~ PArot
991016 ~  ~ Parsing part dictionary file
991017 ~  ~ Parsing package dictionary file
991018 ~  ~ Paste clip
991019 ~  ~ Path:
991020 ~  ~ Pattern # 1
991021 ~  ~ Pattern # 1 :
991022 ~  ~ Pattern # 2
991023 ~  ~ Pattern # 2 :
991024 ~  ~ Pattern # 3
991025 ~  ~ Pattern # 3 :
991026 ~  ~ Pattern # 4
991027 ~  ~ Pattern #1
991028 ~  ~ Pattern #2
991029 ~  ~ Pattern #3
991030 ~  ~ Pattern #4
991031 ~  ~ Pattern #B
991032 ~  ~ Pattern by
991033 ~  ~ Pattern generation parameters
991034 ~  ~ Pause - change paper and <Continue> when ready .....
991035 ~  ~ Pause for paper change
991036 ~  ~ PickTable
991037 ~  ~ Pin
991038 ~  ~ Pin assignment(s) missing or not matching entry names in group symbol.
991039 ~  ~ Pin No.
991040 ~  ~ Pin(s) are not nodes
991041 ~  ~ Pin(s) cannot be swapped logically swaplevel = -1
991042 ~  ~ Pin.No
991043 ~  ~ Pin:
991044 ~  ~ Pinout
991045 ~  ~ Pinout text
991046 ~  ~ Pinout text,7
991047 ~  ~ Pins Must be in the same gate:
991048 ~  ~ Pins not in the same gate
991049 ~  ~ pins)
991050 ~  ~ Place on:
991051 ~  ~ Placement cannot be completed
991052 ~  ~ Placement completed
991053 ~  ~ Placement in progress ...
991054 ~  ~ Point gate to swap
991055 ~  ~ Point next node
991056 ~  ~ Point vector base point
991057 ~  ~ Point vector end point
991058 ~  ~ Point vector start point
991059 ~  ~ points:
991060 ~  ~ POLY(
991061 ~  ~ POLYLINE
991062 ~  ~ Position:
991063 ~  ~ POSTART
991064 ~  ~ Power
991065 ~  ~ POWER
991066 ~  ~ Power/Gnd
991067 ~  ~ Power:
991068 ~  ~ Prefix:
991069 ~  ~ Prefix
991070 ~  ~ Preparing layer sandwiches
991071 ~  ~ Preprocessing in progress
991072 ~  ~ Preprocessing terminated
991073 ~  ~ Prerouted traces
991074 ~  ~ Prev.Group
991075 ~  ~ Preview
991076 ~  ~ Print
991077 ~  ~ Print scheduler
991078 ~  ~ Print:
991079 ~  ~ Printer &Setup
991080 ~  ~ Printer manager
991081 ~  ~ Printing
991082 ~  ~ Private
991083 ~  ~ Processing net:
991084 ~  ~ Properties
991085 ~  ~ Properties in
991086 ~  ~ Pwr/Gnd
991087 ~  ~ Pwr/Gnd:
991088 ~  ~ RANGE
991089 ~  ~ Range error:
991090 ~  ~ Reconnect
991091 ~  ~ RECT:
991092 ~  ~ RECTANGLE
991093 ~  ~ RED
991094 ~  ~ Redra&w
991095 ~  ~ Redraw
991096 ~  ~ Redraw cancelled <F10>
991097 ~  ~ Redraw in progress....
991098 ~  ~ Ref.point X,Y (
991099 ~  ~ Reference nets
991100 ~  ~ Reloading this part may cause netlist corruption.
991101 ~  ~ Reloading this symbol may cause netlist corruption.
991102 ~  ~ Relocate
991103 ~  ~ Rename
991104 ~  ~ Renaming components
991105 ~  ~ Renaming nets
991106 ~  ~ Repeat:
991107 ~  ~ Replace existing file?
991108 ~  ~ Results:
991109 ~  ~ Return
991110 ~  ~ Return to nominal circuit:
991111 ~  ~ Rot
991112 ~  ~ rot:
991113 ~  ~ rot=
991114 ~  ~ Rotate
991115 ~  ~ Rotation(deg):
991116 ~  ~ Round
991117 ~  ~ Round pad:
991118 ~  ~ Round Pads Apertures:
991119 ~  ~ Route
991120 ~  ~ ROUTERTYPE
991121 ~  ~ Routing layers:
991122 ~  ~ Routing step
991123 ~  ~ Rows
991124 ~  ~ Rows:
991125 ~  ~ Rt=
991126 ~  ~ Run
991127 ~  ~ Sandwich #
991128 ~  ~ Save
991129 ~  ~ Save all
991130 ~  ~ Save aperture table
991131 ~  ~ Save of
991132 ~  ~ Save Symbol(s)
991133 ~  ~ Save Sel.
991134 ~  ~ saved O.K
991135 ~  ~ Saving autorouted and preloaded wires will overwrite
991136 ~  ~ Saving Autorouter results
991137 ~  ~ Saving completed.
991138 ~  ~ Saving in progress ...
991139 ~  ~ Saving layout components
991140 ~  ~ Saving package
991141 ~  ~ Saving netlist
991142 ~  ~ Saving temporary backup
991143 ~  ~ Saving traces
991144 ~  ~ Saving vias
991145 ~  ~ Scale
991146 ~  ~ Scale block by:
991147 ~  ~ Scale factor
991148 ~  ~ Scanning:
991149 ~  ~ Symbol libraries (*.ESL)|*.ESL
991150 ~  ~ Symbol
991151 ~  ~ symbol:
991152 ~  ~ Symbol
991153 ~  ~ symbol:
991154 ~  ~ Schematic
991155 ~  ~ Schematic Editor
991156 ~  ~ Symbol entry for this pin is unassigned in part:
991157 ~  ~ Symbol
991158 ~  ~ Symbol libraries:
991159 ~  ~ Symbol map
991160 ~  ~ Symbol:
991161 ~  ~ Scroll bars
991162 ~  ~ Search
991163 ~  ~ SEARCH_MODE
991164 ~  ~ Sec
991165 ~  ~ SECTION
991166 ~  ~ Select
991167 ~  ~ Select element for symbol:
991168 ~  ~ Select subcircuit
991169 ~  ~ Select active layers
991170 ~  ~ Select bitmap file
991171 ~  ~ Select box copy area
991172 ~  ~ Select box zoom area
991173 ~  ~ Select branch to split
991174 ~  ~ Select component to swap
991175 ~  ~ Select dictionary for part names:
991176 ~  ~ Select dictionary for package names:
991177 ~  ~ Select entry
991178 ~  ~ Select file
991179 ~  ~ Select input ASCII files:
991180 ~  ~ Select layer
991181 ~  ~ Select library:
991182 ~  ~ Select mode:
991183 ~  ~ Select net:
991184 ~  ~ Select next component
991185 ~  ~ Select options
991186 ~  ~ Select options:
991187 ~  ~ Select output file:
991188 ~  ~ Select padstack:
991189 ~  ~ Select page
991190 ~  ~ Select pin for entry: #
991191 ~  ~ Select pin to swap with:
991192 ~  ~ Select settings ...
991193 ~  ~ Select simulation code:
991194 ~  ~ Select symbol:
991195 ~  ~ Select type
991196 ~  ~ Select-display
991197 ~  ~ Select:
991198 ~  ~ Selected
991199 ~  ~ Serial number:
991200 ~  ~ Set
991201 ~  ~ Set point(s) to define rotation.
991202 ~  ~ Set Scale/offset
991203 ~  ~ Set to used
991204 ~  ~ Settings panel
991205 ~  ~ Setup
991206 ~  ~ Setup printer for drill template plot
991207 ~  ~ Shape
991208 ~  ~ Sheets:
991209 ~  ~ Short
991210 ~  ~ Shortcut:
991211 ~  ~ Should select from the list
991212 ~  ~ signal
991213 ~  ~ Signal pins:
991214 ~  ~ Signal:
991215 ~  ~ SIMMESSAGES
991216 ~  ~ Simulator
991217 ~  ~ Size O.K.
991218 ~  ~ Size to insert
991219 ~  ~ Size:
991220 ~  ~ Size: (inch/mm)
991221 ~  ~ Size: (mm/inch)
991222 ~  ~ SIZES
991223 ~  ~ Sizes:
991224 ~  ~ SizeX=
991225 ~  ~ SizeY=
991226 ~  ~ slevel=
991227 ~  ~ Smb:
991228 ~  ~ SMD
991229 ~  ~ SNAP
991230 ~  ~ Snap:
991231 ~  ~ SOLD.LAYER,1,10
991232 ~  ~ SOLD.MASK
991233 ~  ~ SOLD.MASK ,1,14
991234 ~  ~ SOLD.PRINT
991235 ~  ~ SOLD.PRINT,1,12
991236 ~  ~ Solder side
991237 ~  ~ Solder side /
991238 ~  ~ SOLID
991239 ~  ~ Some nodes in net:
991240 ~  ~ Sorry! bitmap size greater 4MB
991241 ~  ~ SPACE
991242 ~  ~ Specific model variant not applicable to this element:
991243 ~  ~ Specific variant:
991244 ~  ~ SPL
991245 ~  ~ SPL0
991246 ~  ~ Sq.
991247 ~  ~ square
991248 ~  ~ Square
991249 ~  ~ Square pad apertures:
991250 ~  ~ Square pad:
991251 ~  ~ Sta&tistics
991252 ~  ~ Standard
991253 ~  ~ Standard/
991254 ~  ~ Start Main Application
991255 ~  ~ StartX,StartY,dEndX,dEndY,LWidth
991256 ~  ~ STATIC
991257 ~  ~ Status
991258 ~  ~ Status: Locked
991259 ~  ~ Status: Unlocked
991260 ~  ~ STATUS_
991261 ~  ~ STOP
991262 ~  ~ &Strategy
991263 ~  ~ Subcircuit
991264 ~  ~ Subcircuit definition within hier:
991265 ~  ~ Subcircuit Nodes Vector not set
991266 ~  ~ Subcircuit:
991267 ~  ~ Subcircuit:
991268 ~  ~ Subcircuits Library
991269 ~  ~ Subcircuits Library:
991270 ~  ~ Supply Pins:
991271 ~  ~ Swap error:
991272 ~  ~ Swaplevels for selected pins does not match:
991273 ~  ~ Symbol
991274 ~  ~ Symbol in use - can't delete this entry/pad
991275 ~  ~ Symbol in use by:
991276 ~  ~ Symbol Libraries:
991277 ~  ~ Symbol Names Dic.(*.EDS)|*.EDS
991278 ~  ~ Symbol Simulation Code
991279 ~  ~ Symbol use as handle to hier:
991280 ~  ~ Symbol/Package with name:
991281 ~  ~ Symbol(s) with same names are already stored in lib:
991282 ~  ~ Symbol:
991283 ~  ~ Symbols
991284 ~  ~ Symbols:
991285 ~  ~ Syntax error in placer file
991286 ~  ~ Syntax error in router file
991287 ~  ~ SysDir
991288 ~  ~ SysName
991289 ~  ~ System files
991290 ~  ~ System files:
991291 ~  ~ T-connect same &net only
991292 ~  ~ TAB
991293 ~  ~ TABLE
991294 ~  ~ TABLES
991295 ~  ~ TD simulation in progress
991296 ~  ~ Te&xts
991297 ~  ~ temp
991298 ~  ~ Temp load
991299 ~  ~ Temp save
991300 ~  ~ Temporary backup load failed
991301 ~  ~ Temporary backup loaded O.K
991302 ~  ~ Temporary backup save failed
991303 ~  ~ Temporary backup saved O.K
991304 ~  ~ Test
991305 ~  ~ Testpoint markers not set!
991306 ~  ~ TEXT
991307 ~  ~ Text block rot:
991308 ~  ~ Text files (*.TXT)|*.TXT
991309 ~  ~ Text missing or misplaced
991310 ~  ~ Text rot:
991311 ~  ~ Text size and pitch:
991312 ~  ~ Text :
991313 ~  ~ TEXTS
991314 ~  ~ The prefix allready exist in
991315 ~  ~ This component cannot be packaged
991316 ~  ~ This component is already packaged
991317 ~  ~ This component is unpacked
991318 ~  ~ This file already exists.
991319 ~  ~ to
991320 ~  ~ To c
991321 ~  ~ to lib:
991322 ~  ~ to:
991323 ~  ~ Too many samples in %s.
991324 ~  ~ ToolBars
991325 ~  ~ Toolbox
991326 ~  ~ TOTAL
991327 ~  ~ Total elements:
991328 ~  ~ Total:
991329 ~  ~ TRACE
991330 ~  ~ Trace right direction :
991331 ~  ~ Trace segments
991332 ~  ~ Traces
991333 ~  ~ Trailing
991334 ~  ~ TRAN
991335 ~  ~ Translation cancelled
991336 ~  ~ Translation completed O.K
991337 ~  ~ Translation failed
991338 ~  ~ TRIANGLE
991339 ~  ~ through:
991340 ~  ~ True
991341 ~  ~ True size
991342 ~  ~ Txtsizes:
991343 ~  ~ TYPE
991344 ~  ~ Type in name:
991345 ~  ~ Type:
991346 ~  ~ Type: steps
991347 ~  ~ Type: steps,Angle (in deg.)
991348 ~  ~ Type: steps,dX,dY (in
991349 ~  ~ UDN DLLs library
991350 ~  ~ UDN DLLs library:
991351 ~  ~ UDN=
991352 ~  ~ Unable to draw!. Error in the input data.
991353 ~  ~ Unassigned or entry names mismatch!
991354 ~  ~ UNAUTHORIZED COPY !!
991355 ~  ~ Unconnected nodes:
991356 ~  ~ Undefined error #
991357 ~  ~ Undefined hierarchy
991358 ~  ~ Undo
991359 ~  ~ Unit
991360 ~  ~ Unit :
991361 ~  ~ Unknown
991362 ~  ~ Unknown error
991363 ~  ~ Unlock components by name prefix :
991364 ~  ~ Unlocked
991365 ~  ~ Unnamed
991366 ~  ~ Unpck
991367 ~  ~ Unrecognized record type
991368 ~  ~ Unrecoverable exit from current iteration loop.
991369 ~  ~ Untitled
991370 ~  ~ Untitled.Ted
991371 ~  ~ unused
991372 ~  ~ Update
991373 ~  ~ Update artwork file && return
991374 ~  ~ Update generator string:
991375 ~  ~ Current hierarchy:
991376 ~  ~ Used by pad no:
991377 ~  ~ User
991378 ~  ~ User name:
991379 ~  ~ user ref.
991380 ~  ~ UserAps
991381 ~  ~ Value
991382 ~  ~ variables:
991383 ~  ~ Variant
991384 ~  ~ Variant:
991385 ~  ~ Vector:
991386 ~  ~ Vector: X=
991387 ~  ~ Ver
991388 ~  ~ Version:
991389 ~  ~ VERTEX
991390 ~  ~ Vertical
991391 ~  ~ Vertical orientation
991392 ~  ~ Via
991393 ~  ~ Via hole,1
991394 ~  ~ Via:
991395 ~  ~ Viapad:
991396 ~  ~ voltage
991397 ~  ~ W/m
991398 ~  ~ Warning!
991399 ~  ~ where:
991400 ~  ~ WHITE
991401 ~  ~ width
991402 ~  ~ Width:
991403 ~  ~ Width=
991404 ~  ~ Wire
991405 ~  ~ Wire preload setup
991406 ~  ~ Wire,1
991407 ~  ~ Wire width
991408 ~  ~ WRL
991409 ~  ~ Wrong coordinate mode
991410 ~  ~ Wrong file extension:
991411 ~  ~ Wrong format
991412 ~  ~ Wrong format of subcircuit file:
991413 ~  ~ Wrong output file extension
991414 ~  ~ X,Y (
991415 ~  ~ X-Offset:
991416 ~  ~ X-pitch
991417 ~  ~ X/Y Coords:
991418 ~  ~ X=
991419 ~  ~ XColor
991420 ~  ~ Y-Offset:
991421 ~  ~ Y-pitch:
991422 ~  ~ Y/N
991423 ~  ~ Y=
991424 ~  ~ YColors
991425 ~  ~ YELLOW
991426 ~  ~ Yes
991427 ~  ~ YES
991428 ~  ~ ZoneSymbol
991429 ~  ~ ZOOM
991430 ~  ~ Zoom &In
991431 ~  ~ Zoom &Out
991432 ~  ~ Zoom on component:(Comp Name / Group No)
991433 ~  ~ Zoom:
991434 ~  ~ ZoomCombo
991435 ~  ~ Label
991436 ~  ~ Layer
991437 ~  ~ compname,refmode,refname{,xcomp,ycomp,rot[,coordmode]}
991438 ~  ~ refmode = d then refname = Part name
991439 ~  ~ refmode = s then refname = symbol name
991440 ~  ~ xcomp,ycomp,rot = coordinates(optional)
991441 ~  ~ compname,xcomp,ycomp,rot[,coordmode]
991442 ~  ~ Pin
991443 ~  ~ SComponent
991444 ~  ~ enabled
991445 ~  ~ Add family prefix
991446 ~  ~ Family:
991447 ~  ~ Pad
991448 ~  ~ Padstack
991449 ~  ~ all
991450 ~  ~ Trace
991451 ~  ~ OK
991452 ~  ~ Up
991453 ~  ~ save
991454 ~  ~ µ
991455 ~  ~ Selected grid cannot be displayed in current precision. Grid adjusted
991456 ~  ~ Zoom on component: ( Comp Name )
991457 ~  ~ Symbol/Package
991458 ~  ~ select package:
991459 ~  ~ Project Package Library:
991460 ~  ~ select symbol:
991461 ~  ~ Zoom  Precision
991462 ~  ~ Horizontal
991463 ~  ~ General
991464 ~  ~ Yes to all
991465 ~  ~ No component to place
991466 ~  ~ Assign hierarchy down
991467 ~  ~ Select hierarchy:
991468 ~  ~ Reassign hierarchy down
991469 ~  ~ All instances of smb:
991470 ~  ~ Recursive hierarchy!
991471 ~  ~ *** Hierarchy structure other stacks: ***
991472 ~  ~ Recursive assignment!
991473 ~  ~ Hierachy:
991474 ~  ~ already assigned to other type of component
991475 ~  ~ Can't assign hierarchy
991476 ~  ~ Select New hierarchy:
991477 ~  ~ EDSpice "GND" Marker, 5
991478 ~  ~ Airgaps in Gerber viewer
991479 ~  ~ Cannot rename symbol
991480 ~  ~ No Pagination...
991481 ~  ~ Cannot rename part
991482 ~  ~ Package is already stored in lib:
991483 ~  ~ Part is already stored in lib:
991484 ~  ~ Current subcircuit:-
991485 ~  ~ Current circuit element
991486 ~  ~ Select element for symbol
991487 ~  ~ Font name:
991488 ~  ~ Font pitch:
991489 ~  ~ Enable Undo and Redo
991490 ~  ~ Click to cancel current operation
991491 ~  ~ Set ruler calibration : (Range = 1 to 10)
991492 ~  ~ (Range = 1 to 10)
991493 ~  ~ Calibrate ruler
991494 ~  ~ Custom...
991495 ~  ~ &All Pages
991496 ~  ~ Number of Pins
991497 ~  ~ Number of Entries
991498 ~  ~ Create / Select Padstack
991499 ~  ~ Set airgap
991500 ~  ~ The project is from an old version of EDWin 2000.
991501 ~  ~ Would you like to save this in new format?
991502 ~  ~ Print Preview ...
991503 ~  ~ Assign Element&&Model Code
991504 ~  ~ Properties :
991505 ~  ~ No properties available for the selected item(s)
991506 ~  ~ C&lose
991507 ~  ~ Main
991508 ~  ~ Can't assign Symbol/Package:
991509 ~  ~ A&pply
991510 ~  ~ &Unit:
991511 ~  ~ °
991512 ~  ~ Scope of application for currently processed Design Rules
991513 ~  ~ Enable layers for routing
991514 ~  ~ Set trace routing direction for enabled layers
991515 ~  ~ Set design rules for via holes
991516 ~  ~ Set design rules for traces
991517 ~  ~ Set clerance check rules
991518 ~  ~ Set routing scheme for autorouter
991519 ~  ~ Protect design
991520 ~  ~ Rules
991521 ~  ~ Informs whether rules have been proviously set
991522 ~  ~ Rules set
991523 ~  ~ Valid Design Rules level
991524 ~  ~ Valid DR
991525 ~  ~ Scope of aplication for currently set rules
991526 ~  ~ Scope
991527 ~  ~ Enable/Disable routing on
991528 ~  ~ SG("Routing Direction
991529 ~  ~ Prefered routing direction for layer
991530 ~  ~ Via rules
991531 ~  ~ Select via padstack number
991532 ~  ~ Change of trace layer through via holes allowed
991533 ~  ~ Via allowed
991534 ~  ~ Maximal allowed number of vias on trace(s) connecting two pads
991535 ~  ~ Max number of vias
991536 ~  ~ Unspecified
991537 ~  ~ Trace rules
991538 ~  ~ Unit of measure in which values are expressed / entered
991539 ~  ~ Values in
991540 ~  ~ Minimal allowed trace width
991541 ~  ~ Minimal trace Width
991542 ~  ~ Maximal allowed trace width
991543 ~  ~ Maximal trace Width
991544 ~  ~ Default routing trace width  
991545 ~  ~ Prefered trace width
991546 ~  ~ Maximal allowed trace segment length
991547 ~  ~ Maximal trace segment length
991548 ~  ~ Maximal allowed trace length
991549 ~  ~ Maximal trace length
991550 ~  ~ Minimal allowed trace airgap within copper pour areas
991551 ~  ~ Minimal airgap
991552 ~  ~ Maximal allowed trace airgap within copper pour areas
991553 ~  ~ Maximal airgap
991554 ~  ~ Default trace airgap  
991555 ~  ~ Prefered airgap
991556 ~  ~ Clearances: 
991557 ~  ~ Minimal allowed clearance between trace segments
991558 ~  ~ Trace to Trace
991559 ~  ~ Minimal allowed clearance between pads
991560 ~  ~ Pad to Pad
991561 ~  ~ Minimal allowed clearance between pads and trace segments
991562 ~  ~ Pad to trace
991563 ~  ~ Channel width for online single trace clearance check
991564 ~  ~ Channel width for Single Trace Check
991565 ~  ~ Autorouter Rules
991566 ~  ~ Enable/disable autorouting of fanouts
991567 ~  ~ Fanouts routing enabled 
991568 ~  ~ Enable/disable autorouting of traces
991569 ~  ~ Trace routing enabled 
991570 ~  ~ Suppress autorouting of connections between pin mounted components
991571 ~  ~ SMD connection only
991572 ~  ~ Select 1 or 2 axis autorouting
991573 ~  ~ Number of routing axis
991574 ~  ~ One axis
991575 ~  ~ Two axis
991576 ~  ~ Cost of routing in other direction than set for layer
991577 ~  ~ Wrong layer direction cost
991578 ~  ~ Cost of optimizing traces routed in other direction than set for layer
991579 ~  ~ Wrong direction optimizing cost
991580 ~  ~ Cost of optimizing traces routed in direction set for layer
991581 ~  ~ Right direction optimizing cost
991582 ~  ~ Cost of optimizing vias
991583 ~  ~ Vias optimizing cost
991584 ~  ~ PCB Layout Edit Function: 
991585 ~  ~ Locked
991586 ~  ~ Disallow to add new nets to the design while editing PCB Layout
991587 ~  ~ Add Net(s) 
991588 ~  ~ Disallow to delete nets in the design while editing PCB Layout
991589 ~  ~ Delete Net(s) 
991590 ~  ~ Disallow to merge nets in the design while editing PCB Layout
991591 ~  ~ Merge Nets 
991592 ~  ~ Disallow to split nets in the design while editing PCB Layout
991593 ~  ~ Split Net(s) 
991594 ~  ~ Disallow to add new net nodes to the design while editing PCB Layout
991595 ~  ~ Add Nodes(s) 
991596 ~  ~ Disallow to delete net nodes in the design while editing PCB Layout
991597 ~  ~ Delete Node(s) 
991598 ~  ~ Disallow absolute pin swap while editing PCB Layout
991599 ~  ~ Pin Swap Absolute 
991600 ~  ~ Disallow logical pin swap while editing PCB Layout
991601 ~  ~ Pin Swap logical
991602 ~  ~ Disallow gate swap
991603 ~  ~ Gate Swap
991604 ~  ~ Disallow to create new components while editing PCB Layout
991605 ~  ~ Add components
991606 ~  ~ Delete components
991607 ~  ~ Net Class 'Signal'
991608 ~  ~ Net Class 'Pwr/GND'
991609 ~  ~ Net Group
991610 ~  ~ Design Rules
991611 ~  ~ Routing layers
991612 ~  ~ Locked Edit Functions
991613 ~  ~ Default
991614 ~  ~ Net Class
991615 ~  ~ Region 
991616 ~  ~ Selected Nets
991617 ~  ~ Currently set
991618 ~  ~ Enter new Net Group name
991619 ~  ~ Adding new Net Group
991620 ~  ~ Delete Net Group 
991621 ~  ~ Set Circuit Level Design Rules
991622 ~  ~ Set Layer Level Design Rules
991623 ~  ~ Set Net Class Level Design Rules
991624 ~  ~ Power Sply/Gnd Nets
991625 ~  ~ Signal Nets
991626 ~  ~ Set Net Group Level Design Rules
991627 ~  ~ Layers
991628 ~  ~ Net classes
991629 ~  ~ Signal Nets
991630 ~  ~ Net Groups
991631 ~  ~ "Net Group:
991632 ~  ~ Select Nets to Add
991633 ~  ~ Nets in Group
991634 ~  ~ Circuit Design Rules Categories
991635 ~  ~ Edit Default Via Padstack: #
991636 ~  ~ Edit Project Via Padstack: #
991637 ~  ~ Disallow to delete components while editing PCB Layout)
991638 ~  ~ Add Net
991639 ~  ~ Add Node
991640 ~  ~ Delete Node
991641 ~  ~ Add Component
991642 ~  ~ Delete Component
991643 ~  ~ Adding Nets/Nodes/Comps
991644 ~  ~ Deleting Nets/Nodes/Comps
991645 ~  ~ All Toolbars
991646 ~  ~  Product
991647 ~  ~ Service Packs and Bug Fixes
991648 ~  ~ Visionics Home Page
991649 ~  ~ Frequently Asked Questions
991650 ~  ~  Guided Tour
991651 ~  ~ Disributors
991652 ~  ~ Free Library Request
991653 ~  ~ Tutorial
991654 ~  ~ Technical Support
991655 ~  ~ &Hotkeys && Shortcuts
991656 ~  ~ Visionics On the Web
991657 ~  ~ System Info sucessfully generated
991658 ~  ~ System Info
991659 ~  ~ Show Me How...(Demos)
991660 ~  ~ Getting Started
991661 ~  ~ How to Set...
991662 ~  ~ Tutorial
991663 ~  ~ Contents
991664 ~  ~ Access Violation
991665 ~  ~ Invalid product Series
991666 ~  ~ License series = 
991667 ~  ~ System series = 
991668 ~  ~ product Version mismatch
991669 ~  ~ License Version = 
991670 ~  ~ System Version = 
991671 ~  ~ Evaluation period expired, contact your nearest dealer for original version of the software.
991672 ~  ~ Visit our website 'www.visionics.a.se' to purchase online
991673 ~  ~ System date modified
991674 ~  ~ You have 
991675 ~  ~ Day(s)
991676 ~  ~ of Evaluation period left.
991677 ~  ~ Can't rename circuit
991678 ~  ~ Lock Toolbar
991679 ~  ~ Activation Code:
991680 ~  ~ &License Disk
991681 ~  ~ &Activation Code
991682 ~  ~ Your license has been updated properly, valid installations remaining : 
991683 ~  ~ Activation
991684 ~  ~ PlugIn
991685 ~  ~ Extend Evaluation
991686 ~  ~ Activate Non Commercial Version
991687 ~  ~ Get new PlugIn code from distributor
991688 ~  ~ Get new Activation code from distributor
991689 ~  ~ Get new code from distributor
991690 ~  ~ You have supplied
991691 ~  ~ Your license has been updated successfully with PlugIn Code
991692 ~  ~ Code Not Valid
991693 ~  ~ Your license has been updated successfully with Activation Code
991694 ~  ~ Please remove ReadOnly attribute (if set) for all
991695 ~  ~ Activation Code Not Valid
991696 ~  ~ PlugIn Code Not Valid
991697 ~  ~ Your license is not updated
991698 ~  ~ Activate through Licence Disk
991699 ~  ~  * Please obtain Activation Code from your distributor
991700 ~  ~  * To receive a valid Activation Code for
991701 ~  ~  Licence ,
991702 ~  ~ Send the 'Product ID' printed below to your nearest distributor
991703 ~  ~  * To continue please enter the Activation Code
991704 ~  ~ * Please Insert Your License Disk
991705 ~  ~ Please confirm the drive containing
991706 ~  ~ Licence diskette received along with the package.
991707 ~  ~ PlugIn through License Disk
991708 ~  ~ * Please obtain PlugIn code from your distributor
991709 ~  ~ * To receive a valid PlugIn Code for
991710 ~  ~ Send the 'Product ID' printed below to
991711 ~  ~ your nearest distributor
991712 ~  ~ * To continue please enter the PlugIn Code
991713 ~  ~ * Please insert your PlugIn License Disk
991714 ~  ~ * Please confirm the drive containing
991715 ~  ~  PlugIn Licence diskette.
991716 ~  ~ PlugIn Code :
991717 ~  ~ License Disk
991718 ~  ~ PlugIn Code
991719 ~  ~ Activation Code
991720 ~  ~ Activate through Activation Code
991721 ~  ~ PlugIn through PlugIn Code
991722 ~  ~ Your Evaluation Period exceeds evaluation limit of 99 Days
991723 ~  ~ Update Licence with 99 days Now?(Click No to use the same Activation Code after current Evaluation period) 
991724 ~  ~ Your Evaluation Period has been extended to 
991725 ~  ~  days
991726 ~  ~ Activate
991727 ~  ~ PlugIn Licenses
991728 ~  ~ Library editor is running. Could not compact project library.
991729 ~  ~ Files Missing
991730 ~  ~ Browse Location
991731 ~  ~ Installed location:
991732 ~  ~ Please insert  CD-ROM
991733 ~  ~ &Lock Toolbar
991734 ~  ~ Access Verification
991735 ~  ~ Get Activation Code
991736 ~  ~ Input Password
991737 ~  ~ Invisible Window to Receive a String
991738 ~  ~ Files to be Processed : 
991739 ~  ~ Enter the path where your System directory has been installed:
991740 ~  ~ &Process
991741 ~  ~ File waiting to be processed...
991742 ~  ~ Service Pack Upgrade
991743 ~  ~ System
991744 ~  ~ Run Transient Analysis (Logic Analyzer)
991745 ~  ~   * For activating online,click on Activate online
991746 ~  ~ PlugIn Online
991747 ~  ~ Plug in hardware Key supplied
991748 ~  ~ IDF format error
991749 ~  ~ IDF syntax error

991750 ~  ~ Refreshing Project Library
991751 ~  ~ Project Name:
991752 ~  ~ Number of symbols in Project Library:
991753 ~  ~ Number of packages in Project Library:
991754 ~  ~ Number of parts in Project Library:

991755 ~  ~ SCHEMATIC SYMBOLS
991756 ~  ~ Refreshed:
991757 ~  ~ from
991758 ~  ~ Not refreshed:
991759 ~  ~ mismatch in number of entries
991760 ~  ~ mismatch in entry names
991761 ~  ~ PACKAGES
991762 ~  ~ mismatch in number of pads
991763 ~  ~ PARTS
991764 ~  ~ mismatch in package name
991765 ~  ~ mismatch in Pws/Gnd pin definitions
991766 ~  ~ mismatch in number of groups
991767 ~  ~ mismatch in group symbol name
991768 ~  ~ mismatch in pinout

991769 ~  ~ component specific

991770 ~  ~ Click on Activate for activating now
991771 ~  ~ About Project
991772 ~  ~ Unlicensed model(s) removed

991773 ~  ~ Magnifier
991774 ~  ~ (from
991775 ~  ~ , 
991776 ~  ~ (circuit: 
991777 ~  ~ )-", 
991778 ~  ~ No", 
991779 ~  ~ 45 degrees
991780 ~  ~ rounded
991781 ~  ~ EDWin Discussion Board
991782 ~  ~ Font
991783 ~  ~ Font Size
991784 ~  ~ Font line width
991785 ~  ~ Text X-position
991786 ~  ~ Text Y-position
991787 ~  ~ Text rotation
991788 ~  ~ Pitch
991789 ~  ~ Grid(Adjusted)
991790 ~  ~ Check to merge
991791 ~  ~ Select nets to merge
991792 ~  ~ Processing...
991793 ~  ~ Creating Components...
991794 ~  ~ Not applicable
991795 ~  ~ Impedance controlled
991796 ~  ~ Changes 'Impedance controlled' status for selected Nets
991797 ~  ~ nodes!
991798 ~  ~ Trying rotation:
991799 ~  ~ Recontructing padstack for pad number
991800 ~  ~ violations
991801 ~  ~ An Automatic Live Update has been scheduled previously
991802 ~  ~ Select None
991803 ~  ~ Instant Redraw
991804 ~  ~ &Generate
991805 ~  ~ Select for global test 
991806 ~  ~ Integrity check
991807 ~  ~ Redundacy checks:
991808 ~  ~ Unused parts
991809 ~  ~ Unused gates
991810 ~  ~ Unused pins
991811 ~  ~ Invalid nets
991812 ~  ~ Clearance check
991813 ~  ~ Connectivity check
991814 ~  ~ Copper pour connectivity check
991815 ~  ~ Shortcuts to copper pour check
991816 ~  ~ Design rules check
991817 ~  ~ Board Contours (G-CODE)
991818 ~  ~ Category is empty
991819 ~  ~ ", "
991820 ~  ~ Cannot save in system library.
991821 ~  ~ Copper Relie&f
991822 ~  ~ C&ut
991823 ~  ~ &Paste
991824 ~  ~ Enter text: 
991825 ~  ~ Trace &Frames
991826 ~  ~ &Connections
991827 ~  ~ Select Test: 
991828 ~  ~ H&oles
991829 ~  ~ Oscillograph
991830 ~  ~ &Trace Frames
991831 ~  ~ Paste
991832 ~  ~ Cut
991833 ~  ~ Display View Holes
991834 ~  ~ &Import Pinlist
991835 ~  ~ View Aperture Table
991836 ~  ~ Save&&E&xit
991837 ~  ~ &Archive
991838 ~  ~ &Edit remarks
991839 ~  ~ Re&name
991840 ~  ~ &Load project
991841 ~  ~ &Save project 
991842 ~  ~ &General info 
991843 ~  ~ &PCB statistics
991844 ~  ~ &Compare
991845 ~  ~ Cl&ose
991846 ~  ~ Searching for updated 
991847 ~  ~  files. This may take some time.....
991848 ~  ~ No updates found
991849 ~  ~ Live Update Error. An internet connection error occured.Please try again later
991850 ~  ~ KB
991851 ~  ~ Live Update Failed.Click Retry to try again
991852 ~  ~ Retry
991853 ~  ~ File not updated properly : 
991854 ~  ~ Updated
991855 ~  ~ LiveUpdate Failed. 
991856 ~  ~ Click Retry to try again
991857 ~  ~ Live update found the following new files:
991858 ~  ~ Not updated
991859 ~  ~  File(s) Selected for Updation
991860 ~  ~ Live Update completed Successfully
991861 ~  ~ Configure Live Updates
991862 ~  ~ Updation in progress, do you want to quit live update
991863 ~  ~ Next
991864 ~  ~ File Path
991865 ~  ~ File Size
991866 ~  ~ Invisible
991867 ~  ~  Live Update
991868 ~  ~  File(s) Selected
991869 ~  ~ Run Live Update Program after 15 days
991870 ~  ~  before running Live Update
991871 ~  ~ Remind me after 15 days
991872 ~  ~ Remind me after 30 days
991873 ~  ~ Turn Off any future Live Updates
991874 ~  ~ EDWinXP Live Update
991875 ~  ~ C&ancel
991876 ~  ~ Run Live Update Program after 30 days
991877 ~  ~ Transferring : 
991878 ~  ~ Uncompressing : 
991879 ~  ~ % complete
991880 ~  ~ from 
991881 ~  ~ to 
991882 ~  ~ Symbol is already stored in lib:
991883 ~  ~ Padstack 
991884 ~  ~ Package 
991885 ~  ~ Check for Update(s) Now
991886 ~  ~ Remind me next day
991887 ~  ~ Automatic Live Update
991888 ~  ~ Automatic Live Update setup
991889 ~  ~ Welcome to Live Update setup
991890 ~  ~ Select a suitable option below and press OK to continue


#FILE = E2KCOMM1.TXT  'EDWin 2000 Common Strings to both 32 and 2k Eng'

981 ~  ~ Change only for Reference Net Fanouts
982 ~  ~ Add Targets/Venting & &Thieving Areas
983 ~  ~ Artwork Targets/Thieving&Venting Areas
984 ~  ~ Add following items to artworks
985 ~  ~ Layer Alignment Target Top Left
986 ~  ~ Layer Alignment Target Bottom Left
987 ~  ~ Layer Alignment Target Top Right
988 ~  ~ Layer Alignment Target Bottom Right
989 ~  ~ Thieving Area (Outer layers)
9810 ~  ~ Venting Area (Inner layers)
9811 ~  ~ Locating pin target Top Left
9812 ~  ~ Locating pin target Bottom Left
9813 ~  ~ Locating pin target Top Right
9814 ~  ~ Locating pin target Bottom Right
9815 ~  ~ Locating pin target Left Centre
9816 ~  ~ Locating pin target Top Centre
9817 ~  ~ Locating pin target Right Centre
9818 ~  ~ Locating pin target Bottom Centre
9819 ~  ~ Locating pin target Right below Centre
9820 ~  ~ Coupon AB (2x)
9821 ~  ~ Coupon G
9822 ~  ~ Coupon E
9823 ~  ~ Item parameters
9824 ~  ~ Width of thieving/venting area
9825 ~  ~ Gap between board and thieving/venting area
9826 ~  ~ XY shift of locating pin targets from default pos.
9827 ~  ~ X shift of alignment targets from default pos.
9828 ~  ~ Y shift of alignment targets from default pos.
9829 ~  ~ X shift of left coupon 'AB' from default pos.
9830 ~  ~ Y shift of left coupon 'AB' from default pos.
9831 ~  ~ X shift of top coupon 'AB' from default pos.
9832 ~  ~ Y shift of top coupon 'AB' from default pos.
9833 ~  ~ X shift of coupon 'G' from default position
9834 ~  ~ Y shift of coupon 'G' from default position
9835 ~  ~ X shift of coupon 'E' from default position
9836 ~  ~ Y shift of coupon 'E' from default position
9837 ~  ~ Locating pin target hole diameter
9838 ~  ~ Layer Alignment &Targets
9839 ~  ~ Panel Overview
9840 ~  ~ Display with &Black Background
9841 ~  ~ Layer Alignment Targets
9842 ~  ~ Commands  :
9843 ~  ~ Run Command(s)
9844 ~  ~ Export to Waveform Viewer
9845 ~  ~ Simulation Status  :
9846 ~  ~ Simulation Messages  :
9847 ~  ~ EDSpice Idle
9848 ~  ~ Press <F12> to stop simulation
9849 ~  ~ EDSpice Simulation in progress ...
9850 ~  ~ EDSpice Simulation completed
9851 ~  ~ Reorientate Components
9852 ~  ~ Select Orientation
9853 ~  ~ Pin 1 Top
9854 ~  ~ Pin 1 Bottom
9855 ~  ~ Pin 1 Left
9856 ~  ~ Pin 1 Right
9857 ~  ~ Reorientate && Place Component Names
9858 ~  ~ Select Placement
9859 ~  ~ Distance: 
9860 ~  ~ Component Orientation
9861 ~  ~ Select Noddes to transfer
9862 ~  ~ Select 
9863 ~  ~ [Solder Side]
9864 ~  ~ [Component Side]
9865 ~  ~ Net Page Link:
9866 ~  ~ Page Link for Net:
9867 ~  ~ Select Nodes to transfer
9868 ~  ~ All nodes on current page for Net: 
9869 ~  ~ All member on current page for Bus: 
9870 ~  ~ Can't create router database
9871 ~  ~ Can't create router field array
9872 ~  ~ Can't load prerouted wires
9873 ~  ~ Transfer Nodes to New Net
9874 ~  ~ Old Net
9875 ~  ~ New Net: 
9876 ~  ~ Distance=
9877 ~  ~ Select Object
9878 ~  ~ Outputing Nets 
9879 ~  ~ Outputing Layer List
9880 ~  ~ Extracting Nets
9881 ~  ~ Net Id
9882 ~  ~ Outputing Net Names
9883 ~  ~ Outputing Nodes
9884 ~  ~ Outputing Net Traces
9885 ~  ~ Outputing Layer List
9886 ~  ~ Outputing Vias
9887 ~  ~ Bare Board Test Output
9888 ~  ~ Job Name
9889 ~  ~ Title
9890 ~  ~ 
9891 ~  ~ Drawing
9892 ~  ~ Standard Test Data
9893 ~  ~ Extended Test Data
9894 ~  ~ |->Conductors
9895 ~  ~ |->Through Vias
9896 ~  ~ |->Buried Vias
9897 ~  ~ |->Board Edge Data
9898 ~  ~ Step&Repeat:
9899 ~  ~ |->X Steps
98100 ~  ~ |->Y Steps 
98101 ~  ~ |->X Distance
98102 ~  ~ |->Y Distance
98103 ~  ~ BBT Data Output Completed
98104 ~  ~  - Select/Define BBT Data File Name
98105 ~  ~  - Select/Define IPC-D-356A File Name
98106 ~  ~ Obound
98107 ~  ~ Reg.polygon
98108 ~  ~ Macro
98109 ~  ~ Undef.
98110 ~  ~ Modifiers for:
98111 ~  ~ Exposure
98112 ~  ~ X centre
98113 ~  ~ Y centre
98114 ~  ~ X start
98115 ~  ~ Y start
98116 ~  ~ X end
98117 ~  ~ Y end
98118 ~  ~ Height
98119 ~  ~ Y LLP
98120 ~  ~ Y LLP
98121 ~  ~ No of Points
98122 ~  ~ X Vertex
98123 ~  ~ X Vertex
98124 ~  ~ Vertices
98125 ~  ~ Outside Diam.
98126 ~  ~ Circle lWidth
98127 ~  ~ Gap
98128 ~  ~ No.Circles
98129 ~  ~ CH Width
98130 ~  ~ CH Lenght
98131 ~  ~ Inside Diam.
98132 ~  ~ Hole XSize
98133 ~  ~ Hole YSize
98134 ~  ~ XSize
98135 ~  ~ YSize
98136 ~  ~ Sides
98137 ~  ~ New Value 
98138 ~  ~ modifier:
98139 ~  ~  - Select/Define IPC-D-355 File Name
98140 ~  ~ Outputing Glue Patterns
98141 ~  ~ Solder Patterns
98142 ~  ~ Outputing Component Placement Data 
98143 ~  ~ Board Assembly Data Output Completed
98144 ~  ~ PCB Thickness
98145 ~  ~ PMD Height over PCB
98146 ~  ~ Output Glue Patterns:
98147 ~  ~ |->Glue Dot Size
98148 ~  ~ Output Solder Pattern:
98149 ~  ~ |->Paste Dot Size
98150 ~  ~ |->Panel X Offset 
98151 ~  ~ |->Panel X Offset 
98152 ~  ~ |->Panel Fiducials
98153 ~  ~ |->Size
98154 ~  ~ |->X Shift
98155 ~  ~ |->Y Shift
98156 ~  ~ |-> Tolerance:
98157 ~  ~ |->X direction
98158 ~  ~ |->Y direction
98159 ~  ~ PCB Fiducials
98160 ~  ~ PCB Pattern Tolerance:
98161 ~  ~ PMD Comps Tolerance:
98162 ~  ~ |->Angular
98163 ~  ~ SMD Comps Tolerance:
98164 ~  ~ Generic
98165 ~  ~ IPC-D-355
98166 ~  ~ Millimeters&&Radians
98167 ~  ~ Inches&&Degrees
98168 ~  ~ Millimeters&&Degrees
98169 ~  ~ Inches&&Radians
98170 ~  ~ Component Sequence 
98171 ~  ~ PMD Comps first
98172 ~  ~ SMD Comps first
98173 ~  ~ Standard Apertures
98174 ~  ~ Special Apertures
98175 ~  ~ Special Apertures: 
98176 ~  ~ Double Click Column to change Modifier (inch/mm)
98177 ~  ~ Modifiers: 
98178 ~  ~ IPC-D-356A
98179 ~  ~ Contents (Connection Points:) 
98180 ~  ~ Component Pads X,Y Coordinates 
98181 ~  ~ Component Pads X,Y Sizes
98182 ~  ~ Via Hole Pads X,Y Coordinates
98183 ~  ~ Via Hole Pads X,Y Sizes
98184 ~  ~ Contents  (Conductors): 
98185 ~  ~ Trace Segments
98186 ~  ~ Copper Pour Areas
98187 ~  ~ Plain Copper Items

#FILE = .EXE 'EDWin 2000 Main'

101 ~  ~ &About 
102 ~  ~ &Apertures
103 ~  ~ &Applications
104 ~  ~ &Backup
105 ~  ~ &Capture
106 ~  ~ &Comp.Name
107 ~  ~ &Conductors
108 ~  ~ &Current
109 ~  ~ Project ASCII Save
1010 ~  ~ &Project Info
1011 ~  ~ &Default
1012 ~  ~ &Directories
1013 ~  ~ ED&Spice Simulator
1014 ~  ~ &Export
1015 ~  ~ &Files
1016 ~  ~ &Formats
1017 ~  ~ &Grid && Snap
1018 ~  ~ &Circuit
1019 ~  ~ &Import
1020 ~  ~ &Layer Names
1021 ~  ~ &Libraries
1022 ~  ~ &Mixed Mode Simulator
1023 ~  ~ &New Project
1024 ~  ~ &Open Project
1025 ~  ~ &Packaging Preferences
1026 ~  ~ &Padstacks
1027 ~  ~ &Pinout
1028 ~  ~ &Postpro
1029 ~  ~ &Save Project
1030 ~  ~ &Sch. Categories
1031 ~  ~ &Simulation
1032 ~  ~ &Sizes
1033 ~  ~ &Texts
1034 ~  ~ &Thermal Analyzer
1035 ~  ~ &Tutorial
1036 ~  ~ &Utilities
1037 ~  ~ &View File
1038 ~  ~ (C) Copyright Visionics Europe Ltd, GB, 2000, All Rights Reserved.
1039 ~  ~ (COMPONENTS
1040 ~  ~ (Current)
1041 ~  ~ (Default)
1042 ~  ~ (degrees):
1043 ~  ~ (NODES
1044 ~  ~ (pixels):
1045 ~  ~ (VALUES
1046 ~  ~ -  Layout Texts
1047 ~  ~ -  Traces
1048 ~  ~ -  Vias
1049 ~  ~ - Bending Points
1050 ~  ~ - Componets
1051 ~  ~ - Position
1052 ~  ~ - Text
1053 ~  ~ /Bending Points
1054 ~  ~ /Buses
1055 ~  ~ /Component Values
1056 ~  ~ /Components
1057 ~  ~ /Parts
1058 ~  ~ /Lay. Comps
1059 ~  ~ /Lay. Texts
1060 ~  ~ /Netlist
1061 ~  ~ /Schematics Components
1062 ~  ~ /Symbols
1063 ~  ~ /Tables
1064 ~  ~ /Traces
1065 ~  ~ /Via Padstacks
1066 ~  ~ /Vias
1067 ~  ~ /Wirelist
1068 ~  ~ > has changed.
1069 ~  ~ A,150,100)
1070 ~  ~ A,3,3)
1071 ~  ~ Agaps
1072 ~  ~ Airgap width:
1073 ~  ~ American Formats (inches):
1074 ~  ~ Angle Snap
1075 ~  ~ Applies to currently loaded Project only
1076 ~  ~ Applies to default parameters only
1077 ~  ~ Apps
1078 ~  ~ AppsWin
1079 ~  ~ Arc Trace Segment - Position
1080 ~  ~ Arc Trace Segment - radius
1081 ~  ~ ASCII Projects (*.EDA)|*.EDA
1082 ~  ~ ASCII Files (*.*)|*.*
1083 ~  ~ Auto &Help
1084 ~  ~ AutoHelp
1085 ~  ~ B,100,100)
1086 ~  ~ B,4,4)
1087 ~  ~ BackupInt
1088 ~  ~ BackupON
1089 ~  ~ Both combined
1090 ~  ~ Bpoint:
1091 ~  ~ Browse packages:
1092 ~  ~ Browse Symbols:
1093 ~  ~ Bus line width:
1094 ~  ~ C,100,80)
1095 ~  ~ Can't
1096 ~  ~ Can't Create Circuit:
1097 ~  ~ Can't create Net hook
1098 ~  ~ Can't Delete MAINHIER
1099 ~  ~ Can't find Project File:
10100 ~  ~ Closing 
10101 ~  ~ Command Interpreter
10102 ~  ~ Comp. Entry (Mirror)
10103 ~  ~ Component Description:
10104 ~  ~ Component Name:
10105 ~  ~ Convert Project to <Inch>
10106 ~  ~ Convert Project to <Metric>
10107 ~  ~ Converting hier:
10108 ~  ~ Converting: Symbols
10109 ~  ~ Create Net hooks
10110 ~  ~ Create New Circuit:
10111 ~  ~ created O.K
10112 ~  ~ Current Project
10113 ~  ~ Current:
10114 ~  ~ Custo&m
10115 ~  ~ Project ASCII Load
10116 ~  ~ Project
10117 ~  ~ Project <Inch> Conversion
10118 ~  ~ Project <Metric> Conversion
10119 ~  ~ Project conversion failed
10120 ~  ~ Project converted O.K
10121 ~  ~ Project load cancelled
10122 ~  ~ Project loaded O.K
10123 ~  ~ Project Viewer
10124 ~  ~ Project:
10125 ~  ~ Project: <
10126 ~  ~ Default->Current
10127 ~  ~ Delete Circuit:
10128 ~  ~ Designer:
10129 ~  ~ Part Browse
10130 ~  ~ Do you want to save?
10131 ~  ~ DXF - &Layout
10132 ~  ~ DXF - &Schematics
10133 ~  ~ EDA
10134 ~  ~ EDSpice
10135 ~  ~ EDSpice Node Marker
10136 ~  ~ EDSpice Reference
10137 ~  ~ Conductor Widths & Sizes
10138 ~  ~ ASCII Project File Name:
10139 ~  ~ Board Outline
10140 ~  ~ Color Setup for Layers
10141 ~  ~ Color Setup for Layout Categories
10142 ~  ~ Color Setup for Schematic Categories
10143 ~  ~ Current Component Packaging Preferences
10144 ~  ~ Project <Metric> Conversion
10145 ~  ~ Project Info
10146 ~  ~ Exporting Wirelist
10147 ~  ~ Exporting OrCad PCB II WireList
10148 ~  ~ Exporting Scicards Nelist
10149 ~  ~ Grid, Snap & Precision Setup
10150 ~  ~ Circuits in Project
10151 ~  ~ Layer Labels
10152 ~  ~ Library Search Sequence (
10153 ~  ~ Loading ASCII Project
10154 ~  ~ Mixedmode Simulator
10155 ~  ~ Options Setup
10156 ~  ~ Page Formats
10157 ~  ~ Saving ASCII Project
10158 ~  ~ Select ASCII Project to Load:
10159 ~  ~ Select Current Padstack Library
10160 ~  ~ Select Project File to Load
10161 ~  ~ Select File
10162 ~  ~ Startup Applications
10163 ~  ~ Text Sizes
10164 ~  ~ Wirelist File Name:
10165 ~  ~ Autobackup
10166 ~  ~ Project Info
10167 ~  ~ Import
10168 ~  ~  Wirelist
10169 ~  ~ Lite -
10170 ~  ~ EED3 ASCII Project
10171 ~  ~ European Formats (mm):
10172 ~  ~ Exit Anyway
10173 ~  ~ Exit
10174 ~  ~ failed - Disk Error
10175 ~  ~ Find:
10176 ~  ~ Generate as predefined in the symbol
10177 ~  ~ Generate Component Name
10178 ~  ~ Generate Part Description
10179 ~  ~ Generate Pinout Text
10180 ~  ~ Generation Prefrences
10181 ~  ~ Grid (inch):
10182 ~  ~ inch:
10183 ~  ~ mm:
10184 ~  ~ Group Name as Comp. Value
10185 ~  ~ Hierarchies:
10186 ~  ~ Circuit:
10187 ~  ~ Instant Selection
10188 ~  ~ Interval (min):
10189 ~  ~ Lay. &Categories
10190 ~  ~ Package
10191 ~  ~ Layer Label
10192 ~  ~ LayGridTableM
10193 ~  ~ Layout Text
10194 ~  ~ Layout Text - Position
10195 ~  ~ Layout:
10196 ~  ~ LaySnapTableM
10197 ~  ~ Li&brary
10198 ~  ~ Library &List Generator
10199 ~  ~ Library &Viewer
10200 ~  ~ Library Search &Engine
10201 ~  ~ Lite
10202 ~  ~ Marker,5
10203 ~  ~ Master unit: <Inch>
10204 ~  ~ Master unit: <Metric>
10205 ~  ~ Measurments:
10206 ~  ~ Minimized
10207 ~  ~ Netlist (Scicards format)
10208 ~  ~ NETS LIST
10209 ~  ~ New (&Metric)
10210 ~  ~ New (15 characters):
10211 ~  ~ New Hierarchy:
10212 ~  ~ NODE
10213 ~  ~ NODENAME
10214 ~  ~ OrCad PCB II Files (*.NET)|*.NET
10215 ~  ~ OrCad PCB II Wirelist
10216 ~  ~ OrCad PCB II Wirelist File Name:
10217 ~  ~ P-Cad .PDF files
10218 ~  ~ Padstacks:
10219 ~  ~ PARTS LIST
10220 ~  ~ Password :
10221 ~  ~ Pick Area
10222 ~  ~ Pin Number
10223 ~  ~ Pinout Text:
10224 ~  ~ Predifined by  COMDESC text locations in the symbol
10225 ~  ~ Predifined by  COMPDESC text size in the symbol
10226 ~  ~ Predifined by  COMPNAME text location in the symbol
10227 ~  ~ Predifined by  COMPNAME text size in the symbol
10228 ~  ~ Predifined by  PA text locations in the symbol
10229 ~  ~ Preferences override setting predefined in the symbol
10230 ~  ~ Previous Component Name text locations
10231 ~  ~ Previous Description Text locations
10232 ~  ~ Previous Pinout Text locations
10233 ~  ~ RecentFiles
10234 ~  ~ Return to saved Project:
10235 ~  ~ Revision:
10236 ~  ~ Revision:
10237 ~  ~ Round Pad diameter
10238 ~  ~ Round Pad diameters:
10239 ~  ~ Round pads:
10240 ~  ~ Save before Exit?
10241 ~  ~ save cancelled
10242 ~  ~ Save Project &As
10243 ~  ~ Save Project:
10244 ~  ~ Save?
10245 ~  ~ Sch. Entry Name
10246 ~  ~ symbols
10247 ~  ~ Schematic Text
10248 ~  ~ Schematics:
10249 ~  ~ Scicards Netlist
10250 ~  ~ Scicards Netlist File Name:
10251 ~  ~ Scicards Netlist Files (*.NET)|*.NET
10252 ~  ~ Select hierarchy/page
10253 ~  ~ Set password
10254 ~  ~ Set Text Size:
10255 ~  ~ Snap (inch):
10256 ~  ~ inch:
10257 ~  ~ mm:
10258 ~  ~ Spice Netlist
10259 ~  ~ SPICE Netlist Import
10260 ~  ~ Square Pad size
10261 ~  ~ Square Pad sizes:
10262 ~  ~ Square pads:
10263 ~  ~ Symbol Edit Line width
10264 ~  ~ Symbol Edit Line widths:
10265 ~  ~ Symbol Library Editor (EDSpice)
10266 ~  ~ Text Height (inch):
10267 ~  ~ Text Height (mm):
10268 ~  ~ Text Line Width (inch):
10269 ~  ~ Text Line Width (mm):
10270 ~  ~ Text Location with Repack Function:
10271 ~  ~ Text Sizes:
10272 ~  ~ Toolboxes
10273 ~  ~ Trace Segment - Width/Gap
10274 ~  ~ Trace Segment width
10275 ~  ~ Trace Segment widths:
10276 ~  ~ Trace segments:
10277 ~  ~ Via:
10278 ~  ~ Vias - Padstack Items
10279 ~  ~ Viewer
10280 ~  ~ Visibility on Background:
10281 ~  ~ will be cleared.
10282 ~  ~ Wire Line width:
10283 ~  ~ Wirelist (OrCad PCB II format)
10284 ~  ~ Wirelist (selected format)
10285 ~  ~ Wirelist Files (*.WRL)|*.WRL
10286 ~  ~ Wirelist(system format)
10287 ~  ~ X-size:
10288 ~  ~ Y-size:
10289 ~  ~ &Electromagentic Analyzer
10290 ~  ~ Pixel
10291 ~  ~ deleted
10292 ~  ~ Save ?
10293 ~  ~ Vector Font Editor
10294 ~  ~ Can't load Project vector font, default assumed.
10295 ~  ~ &Conversion Manager
10296 ~  ~ Inhouse Utilities
10297 ~  ~ Font Editor
10298 ~  ~ &Comp. Name
10299 ~  ~ &Pinout
10300 ~  ~ &Description
10301 ~  ~ Loading application...
10302 ~  ~ This Program is protected by Copyright Laws as described in Help - About
10303 ~  ~ already created
10304 ~  ~ Invalid Hierarchy Name
10305 ~  ~ not a valid circuit name
10306 ~  ~ Loading project.Please Wait..
10307 ~  ~ Task Lists
10308 ~  ~ Task Toolbar
10309 ~  ~ Please wait. Loading
10310 ~  ~ Use Password
10311 ~  ~ Name of the Project
10312 ~  ~ Name of the Designer (25)
10313 ~  ~ Remarks (25)
10314 ~  ~ Use &Password
10315 ~  ~ Password text (8)
10316 ~  ~ Property Project
10317 ~  ~ Thermal Info for the following Parts could not be updated
10318 ~  ~ Electromagnetic Info for the following Nets could not be updated
10319 ~  ~ Electromagnetic Info for nodes in the following Nets could not be updated
10320 ~  ~ Can't exceed 25 charecters
10321 ~  ~ Password can't exceed 8 characters
10322 ~  ~ - entry Locations
10323 ~  ~ Cannot edit selected page
10324 ~  ~ Cannot view selected page
10325 ~  ~ Error Loading Explorer Profile
10326 ~  ~ Enter Password
10327 ~  ~ Hierarchy:
10328 ~  ~ Rena&me
10329 ~  ~ Cu&t
10330 ~  ~ &Paste
10331 ~  ~ S&mall Icons
10332 ~  ~ &List
10333 ~  ~ &Details
10334 ~  ~ &Help Topics
10335 ~  ~ &Part Library
10336 ~  ~ &Symbol Library
10337 ~  ~ Pac&kage Library
10338 ~  ~ Pa&dstack Library
10339 ~  ~ Explorer Properties
10340 ~  ~ Project Properties
10341 ~  ~ Advanced
10342 ~  ~ Percentage
10343 ~  ~ Symbol Outline
10344 ~  ~ Quantity
10345 ~  ~ Symbol text
10346 ~  ~ Tabular View
10347 ~  ~ This Product is Licensed to:
10348 ~  ~ Enable Prefered Routing Direction/Disable Routing on
10349 ~  ~ Select path to save Report File
10350 ~  ~ Selected:
10351 ~  ~ Available:
10352 ~  ~ As a new Project
10353 ~  ~ Append to current Project
10354 ~  ~ Select Mode of Import
10355 ~  ~ Confirm:
10356 ~  ~ Entities
10357 ~  ~ Default options setup
10358 ~  ~ Project options setup
10359 ~  ~ Max number of vias per trace
10360 ~  ~ Project Information
10361 ~  ~ In which mode do you want to import Spice circuit files?
10362 ~  ~ Circuit Element, Schematic Component, Circuit, Part Name
10363 ~  ~ Close all other  modules before executing this operation.
10364 ~  ~ Compacting Project Library will remove unused Parts, Symbols and Packages.
10365 ~  ~ Do you want to continue ?
10366 ~  ~ Physical
10367 ~  ~ Logical
10368 ~  ~ (Evaluation)
10369 ~  ~  Default
10370 ~  ~ Scope :
10371 ~  ~ Add Group
10372 ~  ~ Add Selected
10373 ~  ~ Remove Selected
10374 ~  ~ Remove All
10375 ~  ~ Not Used
10376 ~  ~ Password confirmation is incorrect!
10377 ~  ~ Password
10378 ~  ~ Add page
10379 ~  ~ Give new page name.
10380 ~  ~ Given page name : <
10381 ~  ~ > is not valid. Give another name.
10382 ~  ~ Page name invalid
10383 ~  ~ > exists. Give another name.
10384 ~  ~ Page name exists
10385 ~  ~ Create new page failed.
10386 ~  ~ Create failed
10387 ~  ~ ASCII Project save
10388 ~  ~ Project ASCII save successful ..
10389 ~  ~ ASCII Project load
10390 ~  ~ Project ASCII load successful ..
10391 ~  ~ Are you sure to clear contents of page <
10392 ~  ~ > ?
10393 ~  ~ Clear page
10394 ~  ~ Cleaning Page <
10395 ~  ~ > successful.
10396 ~  ~ Cannot delete MAINPAGE
10397 ~  ~ Are you sure to delete page <
10398 ~  ~ Delete page
10399 ~  ~ Delete Page <
10400 ~  ~ > successful.
10401 ~  ~ Open  circuit file.
10402 ~  ~ Add circuit
10403 ~  ~ Give new circuit name.
10404 ~  ~ Given circuit name : <
10405 ~  ~ > is not valid. Give another name.
10406 ~  ~ Circuit name invalid
10407 ~  ~ > exists. Give another name.
10408 ~  ~ Circuit name exists
10409 ~  ~ Create new circuit failed.
10410 ~  ~ Create failed
10411 ~  ~ Cannot delete MAINHIER
10412 ~  ~ Are you sure to delete circuit <
10413 ~  ~ >
10414 ~  ~ Delete circuit
10415 ~  ~ Circuit <
10416 ~  ~ > deleted
10417 ~  ~ Save  circuit file As ...
10418 ~  ~ Circuit <
10419 ~  ~ > saved.
10420 ~  ~ Save circuit <
10421 ~  ~ > failed.
10422 ~  ~ Open  project file.
10423 ~  ~ &Open Project...
10424 ~  ~ Save Project &As...
10425 ~  ~ Project ASCII Save...
10426 ~  ~ Project ASCII Load...
10427 ~  ~ E&xit
10428 ~  ~ Task &Lists
10429 ~  ~ Task &Toolbar
10430 ~  ~ &Contents...
10431 ~  ~ Getting &Started
10432 ~  ~ &Hotkeys && Shortcuts
10433 ~  ~ How to Se&t...
10434 ~  ~ Show Me How...(&Demos)
10435 ~  ~ Visionics On the Web
10436 ~  ~ &About ...
10437 ~  ~ Would you like to append the imported netlist to current project <
10438 ~  ~ If you want to import to a new project, then click No.
10439 ~  ~ For importing to current project, click Yes.
10440 ~  ~ Select mode of import
10441 ~  ~ Select ASCII file to view.
10442 ~  ~ : 
10443 ~  ~ Project(
10444 ~  ~ Evaluation period expired, contact your nearest dealer for original version of the software.
10445 ~  ~ Visit our website 'www.visionics.a.se' to purchase online 
10446 ~  ~ Save changes.
10447 ~  ~ Would you like to Save with thick outlines?
10448 ~  ~ Save with thick outlines.
10449 ~  ~ Save  project file As ...
10450 ~  ~ Circuit(
10451 ~  ~ Diagram
10452 ~  ~ PCB Layout
10453 ~  ~ Page(
10454 ~  ~ 
10455 ~  ~ Project(
10456 ~  ~ Cannot open file <
10457 ~  ~ > . The requested file, doesnt appear to be a valid project file.
10458 ~  ~ Cannot open Project
10459 ~  ~ Password incorrect. Please enter the correct password.
10460 ~  ~ Incorrect password
10461 ~  ~ Password incorrect. Loading new project.
10462 ~  ~ Authentication failure.
10463 ~  ~ Project Library compacted.
10464 ~  ~ Statistics:
10465 ~  ~                    Before      After
10466 ~  ~ Parts        :    
10467 ~  ~ Symbols   :    
10468 ~  ~ Project file : 
10469 ~  ~  not found at the specified location.
10470 ~  ~ File not found
10471 ~  ~ Lite
10472 ~  ~ 
10473 ~  ~  (Evaluation)
10474 ~  ~  Give Valid Name
10475 ~  ~ Vias with this padstack found in project: 
10476 ~  ~ (max 16 characters)
10477 ~  ~ Or enter
10478 ~  ~ to remove label
10479 ~  ~ Changing Via Padstack Label
10480 ~  ~ Select a sub category to select the Part(s), Symbol(s) or Packages(s) to be refreshed
10481 ~  ~ - Part(s) found
10482 ~  ~ - Symbol(s) found
10483 ~  ~ - Package(s) found
10484 ~  ~ No Symbols found in this Project
10485 ~  ~ Not selected to Refresh
10486 ~  ~ Symbol not found in Library
10487 ~  ~ No Packages found in this Project
10488 ~  ~ Package not found in Library
10489 ~  ~ No Parts found in this Project
10490 ~  ~ Part not found in Library
10491 ~  ~ Archive selected version
10492 ~  ~ Restore selected version as active
10493 ~  ~ Delete selected version
10494 ~  ~ Edit remarks for selected version
10495 ~  ~ Rename selected version
10496 ~  ~ Load project (.epb or .epx) as version
10497 ~  ~ Save selected version as project (.epb)
10498 ~  ~ General info for selected version
10499 ~  ~ PCB statistics for selected version
10500 ~  ~ Compare selected version with active version
10501 ~  ~ Close project version
10502 ~  ~ Display help
10503 ~  ~ Can't delete active version
10504 ~  ~ Project version control - Delete
10505 ~  ~ Are you sure to delete version:
10506 ~  ~ Project version control - Rename
10507 ~  ~ Enter new name for version:
10508 ~  ~ Version by this name already archived as:
10509 ~  ~ This version is already selected as active
10510 ~  ~ Project version control - Restore
10511 ~  ~ Are you sure to restore this version as active:
10512 ~  ~ Project version control - Update Info
10513 ~  ~ Enter name for this version:
10514 ~  ~ Version by this name already archived as: 
10515 ~  ~ Can’t archive version without name: 
10516 ~  ~ Enter remarks for this version:
10517 ~  ~ Can’t archive version without remarks : 
10518 ~  ~ Project version control - Edit Remarks
10519 ~  ~ Edit remarks for version 
10520 ~  ~ Deleting version...
10521 ~  ~ Renaming version...
10522 ~  ~ Editing Remarks...
10523 ~  ~ General info for selected version...
10524 ~  ~ Saving version...
10525 ~  ~ Loading version...
10526 ~  ~ Archiving version...
10527 ~  ~ Archive this version ...
10528 ~  ~ Project version control - Archive
10529 ~  ~ Restoring version...
10530 ~  ~ PCB statistics for selected version...
10531 ~  ~ Compare selected version with active version...
10532 ~  ~ Click respective row to select a version 
10533 ~  ~  data  is empty : 
10534 ~  ~ Version difference 
10535 ~  ~ Selected items are not identical. Select identical items from both side 
10536 ~  ~ Project version comparison
10537 ~  ~ )- PCB Layout Properties
10538 ~  ~ Save Settings will close all the Editor Windows. Do you want to continue?
10539 ~  ~ SaveSettings
10540 ~  ~ Visit our website 
10541 ~  ~ to purchase online
10542 ~  ~ ""
10543 ~  ~ Version: 
10544 ~  ~ Cannot trimm.
10545 ~  ~ Selected traces have equal length
10546 ~  ~ Restore Settings will close all the Editor Windows. Do you want to continue?
10547 ~  ~ Invalid Settings File
10548 ~  ~ Components
10549 ~  ~ also in
10550 ~  ~ Duplicated Node Id:
10551 ~  ~ Invoking project version control will close all the editors .Are you sure to invoke the project version control?
10552 ~  ~ Project version control 
10553 ~  ~ Version(
10554 ~  ~ RestoreSettings
10555 ~  ~ Open Settings File As
10556 ~  ~ Change License Server
10557 ~  ~ European #
10558 ~  ~ American #
10559 ~  ~ Enter new label for via padstack
10560 ~  ~ Packaging corrupted - recreate components listed above
10561 ~  ~ &Refresh Now
10562 ~  ~ Refresh Project Library
10563 ~  ~ &Show Difference
10564 ~  ~ &Use filter for parts and components
10565 ~  ~ &Open External Info Database for editing and associating after updating 
10566 ~  ~ &Select Circuit
10567 ~  ~ &Hot Key


#FILE = E2KLIBED.EXE  'EDWin 2000 Library Editor'

111 ~  ~ &Airgap View
112 ~  ~ &Cancel Edit
113 ~  ~ &Copy
114 ~  ~ &End Edit
115 ~  ~ &Entry Number
116 ~  ~ &Hrf Items
117 ~  ~ &Package
118 ~  ~ &PA Text
119 ~  ~ &Padstack
1110 ~  ~ &Padstack
1111 ~  ~ &References
1112 ~  ~ &Symbol
1113 ~  ~ &Sim. Code
1114 ~  ~ &Text Edit
1115 ~  ~ '@PART' keyword missing or misplaced
1116 ~  ~ - Select Target Part Library
1117 ~  ~ - Select Target Padstack Library
1118 ~  ~ - Select Target Symbol Library
1119 ~  ~  
1120 ~  ~  
1121 ~  ~  [,groups,grp.symb]
1122 ~  ~ 
1123 ~  ~ Agap Out of Range
1124 ~  ~ already in use.
1125 ~  ~ ARC,
1126 ~  ~ Attributes of Entry #
1127 ~  ~ Bus Memb.
1128 ~  ~ Category:
1129 ~  ~ Category
1130 ~  ~ Centre
1131 ~  ~ Change Padstack for Pad: #
1132 ~  ~ CIRCLE,
1133 ~  ~ Clear all entries/pads
1134 ~  ~ Copy Part
1135 ~  ~ Copy symbol
1136 ~  ~ Create Empty
1137 ~  ~ Create Hrf Items
1138 ~  ~ Create Padstack
1139 ~  ~ Current Library:
1140 ~  ~ Delete &Unused
1141 ~  ~ Delete all unused Part
1142 ~  ~ Delete all unused symbols
1143 ~  ~ Delete anyway ?
1144 ~  ~ Delete Padstack:
1145 ~  ~ Delete Selected entries/pads
1146 ~  ~ Deleting this entry/pad may cause netlist corruption.
1147 ~  ~ Part header invalid
1148 ~  ~ Part(s) with same names are already stored in lib:
1149 ~  ~ Part: *
1150 ~  ~ Edit Graphic Item(s) in
1151 ~  ~ Edit New
1152 ~  ~ Editing Padstack (
1153 ~  ~ Editing Symbol (
1154 ~  ~ Library Editor ()
1155 ~  ~ Load Part(s)
1156 ~  ~ Load Symbol(s)
1157 ~  ~ Save Part(s)
1158 ~  ~ Save Symbol(s)
1159 ~  ~ Library Editor
1160 ~  ~ ENTRY #
1161 ~  ~ Entry Name:
1162 ~  ~ ENTRY,
1163 ~  ~ ENTRY:
1164 ~  ~ Find Part:
1165 ~  ~ Find symbol:
1166 ~  ~ Format: x,y
1167 ~  ~ from library ?
1168 ~  ~ Group header invalid
1169 ~  ~ Hole Diameter:
1170 ~  ~ Item
1171 ~  ~ Item Out of Context
1172 ~  ~ Package Libraries (*.ELL)|*.ELL
1173 ~  ~ Package:
1174 ~  ~ Package Printout
1175 ~  ~ Lib. Padstack
1176 ~  ~ LINE,
1177 ~  ~ Load Part(s)
1178 ~  ~ Load Part:
1179 ~  ~ Load Package(s)
1180 ~  ~ Load Symbol(s)
1181 ~  ~ Load Symbol:
1182 ~  ~ Project Symbol:
1183 ~  ~ lwidth:
1184 ~  ~ Missing '('
1185 ~  ~ Missing ')'
1186 ~  ~ name,prefix,Package
1187 ~  ~ New:
1188 ~  ~ Normalizing:
1189 ~  ~ Overwrite Padstack:
1190 ~  ~ PA text for ENTRY #
1191 ~  ~ Pad #
1192 ~  ~ PAD #1
1193 ~  ~ Pad &Numbers
1194 ~  ~ PAD,
1195 ~  ~ Padstack Name:
1196 ~  ~ Padstack Symbol Printout
1197 ~  ~ Padstacks Libs (*.EPL)|*.EPL
1198 ~  ~ Padstacks Libs (*.EPX)|*.EPX
1199 ~  ~ Pin assigment invalid
11100 ~  ~ Pinout Text for all Entries invisible
11101 ~  ~ Pinout Text for all Entries visible
11102 ~  ~ PMD Padstack
11103 ~  ~ REC,
11104 ~  ~ Rectangle
11105 ~  ~ RefPoint
11106 ~  ~ Renumber anyway ?
11107 ~  ~ Renumbering of entries/pads may cause netlist corruption.
11108 ~  ~ Restore
11109 ~  ~ Restore Original :
11110 ~  ~ S&tyle
11111 ~  ~ Save Part(s)
11112 ~  ~ Save Part :
11113 ~  ~ Save Package(s)
11114 ~  ~ Save Padstack:
11115 ~  ~ Save Symbol:
11116 ~  ~ Symbols:
11117 ~  ~ Symbol Printout
11118 ~  ~ Select Part:
11119 ~  ~ Select Unit
11120 ~  ~ Set Entry Attributes
11121 ~  ~ Set Hole Attribs.
11122 ~  ~ Show Usage (&PACK.)
11123 ~  ~ Show Usage (&Symb.)
11124 ~  ~ Sim. Name:
11125 ~  ~ simname:
11126 ~  ~ Size :
11127 ~  ~ Size(inch)
11128 ~  ~ Size(inch)
11129 ~  ~ Size(mm)
11130 ~  ~ SMD Padstack
11131 ~  ~ Square
11132 ~  ~ Standard:
11133 ~  ~ Swap Level:
11134 ~  ~ Symbol Datum
11135 ~  ~ Symbol in use - number of pads can't be less than in original symbol
11136 ~  ~ in use.
11137 ~  ~ TRIANGLE,
11138 ~  ~ TRINAGLE:
11139 ~  ~ Type in Part header:
11140 ~  ~ Unknown item:
11141 ~  ~ Update anyway ?
11142 ~  ~ Update Padstack:
11143 ~  ~ Updating this part may cause netlist corruption.
11144 ~  ~ Usage by Layout Components (hier:
11145 ~  ~ Usage by Schematic Components (hier:
11146 ~  ~ used as handle to hier:
11147 ~  ~ used by
11148 ~  ~ Visible Pinout
11149 ~  ~ Warning! - not all references displayed
11150 ~  ~ Width Out of Range
11151 ~  ~ Wrong Layer
11152 ~  ~ X(inch)
11153 ~  ~ X(mm)
11154 ~  ~ Xpos,Ypos,PAx,PAy,PArot,Ent.Name,Sim.Name,Swaplevel,PA-Visible
11155 ~  ~ Xpos,Ypos,Rot,PadStack
11156 ~  ~ Y(inch)
11157 ~  ~ Y(mm)
11158 ~  ~ simulation parameters found incomplete and has been removed.
11159 ~  ~ Simulation parameters incomplete. Return to Edit?
11160 ~  ~ Symbol Parameters:                       
11161 ~  ~ Symbol Name:                      
11162 ~  ~ Number of Entries (Pins)                      
11163 ~  ~ Entry Placement Grid (Pitch):                      
11164 ~  ~ Terminal Line Length: (n*Pitch):
11165 ~  ~ Mixed Mode Simulation Parameters :
11166 ~  ~ Sim. Code:
11167 ~  ~ Select Simulation Code
11168 ~  ~ Orientation of Pins
11169 ~  ~ Add Entry Names as Pin Name text
11170 ~  ~ Clear Simulation Info:
11171 ~  ~ Next >>
11172 ~  ~ Entry Attributes:
11173 ~  ~ << Previous
11174 ~  ~ All PinOut Visible
11175 ~  ~ All PinOut Invisible
11176 ~  ~ AutoFill Simnames
11177 ~  ~ Simnames->EntryNames
11178 ~  ~ Preview:
11179 ~  ~ Zoom Up
11180 ~  ~ Zoom Down
11181 ~  ~ Finish >>
11182 ~  ~ Package name
11183 ~  ~ Specify number of pins
11184 ~  ~ Select type of package
11185 ~  ~ Library padstack
11186 ~  ~ Create pad explicitly
11187 ~  ~ Specify pin-to-pin distance (p)
11188 ~  ~ Specify horizontal pitch between pads(q)
11189 ~  ~ Specify distance between corner pads  (e)
11190 ~  ~ Specify number of bottomrow pins
11191 ~  ~ Specify length of symbol outline (l)
11192 ~  ~ Specify width of symbol outline  (b)
11193 ~  ~ Specify orientation mode
11194 ~  ~ Options
11195 ~  ~ Padnumbers
11196 ~  ~ Padframes
11197 ~  ~ Package Autocreate
11198 ~  ~ ChangePadStack
11199 ~  ~ CreatePadStack
11200 ~  ~ Finish
11201 ~  ~ AirGap View
11202 ~  ~ Symbol definition incomplete
11203 ~  ~ Entry Names should be Unique
11204 ~  ~ Swap Level should be present for entries
11205 ~  ~ Simulation Parameters Missing
11206 ~  ~ Simulation Name should be Unique
11207 ~  ~ Swap level values should be numeric expression
11208 ~  ~ Entry Name not given for Entry Number:
11209 ~  ~ EntryNames should be Unique:Currently entered name matches with Entry No:
11210 ~  ~ SimName should be Unique:Match found at Entry No:
11211 ~  ~ Number of Pins should be multiple of 2 for DIP
11212 ~  ~ Number of Pins should be multiple of 4
11213 ~  ~ For PGA minimum number of Pins should be 20
11214 ~  ~ Can't create PGA with the given specifications
11215 ~  ~ Select Pad from PadStackLibrary
11216 ~  ~ Specify BottomRowPins for PinGridArray
11217 ~  ~ Number of pins should be more than one
11218 ~  ~ Number of pins should be odd for D-Connectors
11219 ~  ~ Number of pins should be even for Dual-in-line Connectors
11220 ~  ~ Top
11221 ~  ~ Bottom
11222 ~  ~ Sim:Name
11223 ~  ~ All Pins Left
11224 ~  ~ All Pins Right
11225 ~  ~ All Pins Top
11226 ~  ~ All Pins Bottom
11227 ~  ~ Left/Right
11228 ~  ~ Left/Top
11229 ~  ~ Left/Bottom
11230 ~  ~ Right/Top
11231 ~  ~ Right/Bottom
11232 ~  ~ Top/Bottom
11233 ~  ~ Left/Top/Bottom
11234 ~  ~ Right/Top/Bottom
11235 ~  ~ Left/Right/Top
11236 ~  ~ Left/Right/Top/Bottom
11237 ~  ~ Left/Bottom/Right/Top
11238 ~  ~ Orientation
11239 ~  ~ Inversion
11240 ~  ~ Pinout Visibility
11241 ~  ~ Swap Level
11242 ~  ~ Sim. Name
11243 ~  ~ Edit Entry Name:
11244 ~  ~ Specify Orientation of Entry:
11245 ~  ~ Specify Inversion for Entry:
11246 ~  ~ Specify PinOutVisibility for Entry:
11247 ~  ~ Specify SwapLevel for Entry:
11248 ~  ~ Assign Sim:Params for Entry:
11249 ~  ~ Pad Rotation
11250 ~  ~ Loaded from library
11251 ~  ~ Explicitly Created
11252 ~  ~ Dual-In-Line-Package
11253 ~  ~ Single-In-Line-Package
11254 ~  ~ PLCC
11255 ~  ~ PinGridArray
11256 ~  ~ PGArrayzigzag
11257 ~  ~ D-Connectors
11258 ~  ~ Dual-In-Line Connectors
11259 ~  ~ Finger Connectors                       
11260 ~  ~ Pad No:
11261 ~  ~ Padstack Name:
11262 ~  ~ Hole Dia:
11263 ~  ~ Pad Details:
11264 ~  ~ Auto
11265 ~  ~ Symbol Autocreate
11266 ~  ~ Left
11267 ~  ~ Right
11268 ~  ~ From                                            
11269 ~  ~ degrees
11270 ~  ~ Specify angle between pads
11271 ~  ~ Specify distance between pads
11272 ~  ~ T.O Series
11273 ~  ~ Cannot create T.O Package with the given specifications
11274 ~  ~ Specify case diameter (D)
11275 ~  ~ Number of pins should be more than seven for PLCC
11276 ~  ~ Symbol Type:
11277 ~  ~ Total Number of Coils:
11278 ~  ~ Type of Core:                         
11279 ~  ~ Line Size :
11280 ~  ~ Insert spacing ( pin , pin , npitch )
11281 ~  ~ Apply
11282 ~  ~ Tap at (CoilNo , TurnNo , EntryName)
11283 ~  ~ Tapping Style:
11284 ~  ~ Magnetic Shield
11285 ~  ~ Align
11286 ~  ~ Middle
11287 ~  ~ General
11288 ~  ~ Transformer
11289 ~  ~ Default
11290 ~  ~ Air Core Fixed Type
11291 ~  ~ Air Core Variable Type
11292 ~  ~ Powdered Iron Core
11293 ~  ~ None
11294 ~  ~ Nothing
11295 ~  ~ Up/Outside Coil
11296 ~  ~ Down/Outside Coil
11297 ~  ~ Up/Inside Coil
11298 ~  ~ Down/Inside Coil
11299 ~  ~ Filled Cirle
11300 ~  ~ Circle
11301 ~  ~ Entry names
11302 ~  ~ Number of Turns
11303 ~  ~ Orientation
11304 ~  ~ Polarity
11305 ~  ~ Select pad rotation angle
11306 ~  ~ Find Package
11307 ~  ~ Select Package
11308 ~  ~ Create/Select Package
11309 ~  ~ Create/Select Symbol
11310 ~  ~ &Monochrome
11311 ~  ~ Returns/sets the X co-ordinate of the line segment
11312 ~  ~ Returns/sets the Y co-ordinate of the line segment
11313 ~  ~ Returns/sets the ending X co-ordinate of the line segment
11314 ~  ~ Returns/sets the ending Y co-ordinate of the line segment
11315 ~  ~ Returns/sets the line width (thickness) of the line segment
11316 ~  ~ Returns/sets the base vertex X co-ordinate of the rectangle
11317 ~  ~ Returns/sets the base vertex Y co-ordinate of the rectangle
11318 ~  ~ Returns/sets the width of the rectangle
11319 ~  ~ Returns/sets the height of the rectangle
11320 ~  ~ Returns/sets the rotation angle of the rectangle
11321 ~  ~ Returns/sets whether rectangle is filled or not filled
11322 ~  ~ Returns/sets the line width (thickness) of the rectangle
11323 ~  ~ Returns/sets X coordinate of first vertex of the triangle
11324 ~  ~ Returns/sets Y coordinate of first vertex of the triangle
11325 ~  ~ Returns/sets X co-ordianate of the second vertex of the triangle
11326 ~  ~ Returns/sets Y co-ordianate of the second vertex of the triangle
11327 ~  ~ Returns/sets X co-ordinate of third vertex of the triangle
11328 ~  ~ Returns/sets Y co-ordinate of third vertex of the triangle
11329 ~  ~ Returns/sets whether triangle is filled or not filled
11330 ~  ~ Returns/sets the line width (thickness) of the triangle
11331 ~  ~ Returns/sets the X co-ordinate of the centre of the circle
11332 ~  ~ Returns/sets the Y co-ordinate of the centre of the circle
11333 ~  ~ Returns/sets the radius of the circle
11334 ~  ~ Returns/sets whether circle is filled or not filled
11335 ~  ~ Returns/sets the line width (thickness) of the circle
11336 ~  ~ Returns/sets the X co-ordinate of centre of the arc
11337 ~  ~ Returns/sets the Y co-ordinate of centre of the arc
11338 ~  ~ Returns/sets the radius of the arc
11339 ~  ~ Returns/sets the starting angle of the arc
11340 ~  ~ Returns/sets the ending angle of the arc
11341 ~  ~ Returns/sets the line width (thickness) of the arc
11342 ~  ~ Returns/sets the starting X co-ordinate of the text item
11343 ~  ~ Returns/sets the starting Y co-ordinate of the text item
11344 ~  ~ Returns/sets the rotation angle of the text item
11345 ~  ~ Returns/sets the size of the text item
11346 ~  ~ Returns/sets the line width of the text item
11347 ~  ~ Returns/sets the starting X co-ordinate of the text item
11348 ~  ~ Returns/sets the starting Y co-ordinate of the text item
11349 ~  ~ Returns/sets the rotation angle of the text item
11350 ~  ~ Returns/sets the user defined text string
11351 ~  ~ Returns/sets the size of the text item
11352 ~  ~ Returns/sets the line width of the text item
11353 ~  ~ Returns/sets the starting X position of the item
11354 ~  ~ Returns/sets the starting Y position of the item
11355 ~  ~ Returns/sets the width of the Pin Assignment text
11356 ~  ~ Returns/sets the height of the Pin Assignment text
11357 ~  ~ Returns/sets the rotation angle of the Pin Assignment text
11358 ~  ~ Returns/sets the Entry name of the particular entry
11359 ~  ~ Returns/sets the simulation name of the particular library element
11360 ~  ~ Returns/sets the swaplevel of the particular entry. Must be integer value
11361 ~  ~ Returns/sets whether PinAssignment details are visible or not visible
11362 ~  ~ Returns/sets the starting X position of the item
11363 ~  ~ Returns/sets the starting Y position of the item
11364 ~  ~ Returns/sets the rotation angle of the library element
11365 ~  ~ Delete all unused Packages
11366 ~  ~ Double click to edit attributes
11367 ~  ~ Library Editor - (Symbol) Properties
11368 ~  ~ Library Editor - (Package) Properties
11369 ~  ~ Library Editor - (Padstack) Properties
11370 ~  ~ Symbol Info
11371 ~  ~ Package Info
11372 ~  ~ Redraw to fit and show entire symbol
11373 ~  ~ Redraw to fit and show entire package
11374 ~  ~ Redraw to fit and show entire padstack
11375 ~  ~ Select/Display current diameter
11376 ~  ~ Select/Display current side length
11377 ~  ~ Display PA Text
11378 ~  ~ Display Entry Number
11379 ~  ~ Display Active Layers
11380 ~  ~ Display True Size
11381 ~  ~ Display Pad Frames
11382 ~  ~ Display Airgap View
11383 ~  ~ Display Hrf Items
11384 ~  ~ Display Pad Numbers
11385 ~  ~ Tools to work with parts
11386 ~  ~ Tools to work with symbols
11387 ~  ~ Tools to work with padstacks
11388 ~  ~ Tools to work with packages
11389 ~  ~ nTurns
11390 ~  ~ Symbol Item(s)
11391 ~  ~ Padstack Item(s)
11392 ~  ~ Package Item(s)
11393 ~  ~ Can't save part to system libraries
11394 ~  ~ Part name not mentioned.Part details incomplete
11395 ~  ~ Symbol not found.Cannot load part
11396 ~  ~ Can't save symbol.Unexpected error
11397 ~  ~ Part details incomplete.Cannot load part
11398 ~  ~ Cannot save in system library. Select a different library path to continue
11399 ~  ~ Symbol with same name already exists in project
11400 ~  ~ Symbol in use.Cannot create/edit entries
11401 ~  ~ Symbol in use.Cannot delete entries
11402 ~  ~ Package in use.Cannot create/edit pads
11403 ~  ~ Package in use.Cannot delete pads
11404 ~  ~ Part cannot have more than one group with no package mentioned
11405 ~  ~ Part name not specified
11406 ~  ~ Part prefix not specified
11407 ~  ~ Padstack name not mentioned. Padstack details incomplete
11408 ~  ~ Package not specified.Continue processing part?
11409 ~  ~ Edit Padstack
11410 ~  ~ X - Position
11411 ~  ~ Y - Position
11412 ~  ~ Edit &Package (
11413 ~  ~ Delete Pac&kage (
11414 ~  ~ Edit &Symbol (
11415 ~  ~ Delete &Group (
11416 ~  ~ Edit Pad&Stack (
11417 ~  ~ Padstack Type
11418 ~  ~ Padstack Shape
11419 ~  ~ Padstack Description
11420 ~  ~ Current part details will be cleared.Do you wish to continue ?
11421 ~  ~ Thermal Parameters:
11422 ~  ~ Parsing Browser Profiles ...
11423 ~  ~ Bulding Browser references ...
11424 ~  ~ Bulding Thermal Analysis references ...
11425 ~  ~ Give name for PadStack before continuing with editing
11426 ~  ~ Current padstack details will be cleared. Do you wish to continue ?
11427 ~  ~ [Shift+U - ZoomUp, Shift+D - ZoomDwn, Shift+F - Focus]
11428 ~  ~ &New PadStack
11429 ~  ~ Library E&xplorer
11430 ~  ~ Library &Browser
11431 ~  ~ En&d Part Edit
11432 ~  ~ En&d PadStack Edit
11433 ~  ~ Edit &Package
11434 ~  ~ Edit &Symbol
11435 ~  ~ Edit Pad&Stack
11436 ~  ~ Delete Pac&kage
11437 ~  ~ Delete S&ymbol
11438 ~  ~ Edit Symbol
11439 ~  ~ Edit Package
11440 ~  ~ Delete Group
11441 ~  ~ Delete Package
11442 ~  ~ Library &name:
11443 ~  ~ Pac&kage
11444 ~  ~ &Properties
11445 ~  ~ Pin number out of range.
11446 ~  ~ Save Symbol
11447 ~  ~ Save Package
11448 ~  ~ Select how you would like your Symbol/Package created:-
11449 ~  ~ Create Symbol ( Use Wizard )
11450 ~  ~ Use Padstack from Library
11451 ~  ~ C&reate
11452 ~  ~ Match No Pins
11453 ~  ~ Rename Part
11454 ~  ~ Give new part name:
11455 ~  ~ R&ename Part
11456 ~  ~ R&ename Padstack
11457 ~  ~ Rename Padstack
11458 ~  ~ Give new padstack name:
11459 ~  ~ MM simcode
11460 ~  ~ Model/Sub ckt
11461 ~  ~ Editing Package (
11462 ~  ~ part name not valid.
11463 ~  ~ Save Part...
11464 ~  ~ package and symbol cannot be undefined together.
11465 ~  ~ Source Library
11466 ~  ~ Update Project with changes in Part
11467 ~  ~ Part Editor
11468 ~  ~ Padstack Editor
11469 ~  ~ before continuing
11470 ~  ~ Create Package ( Use Wizard )
11471 ~  ~ Part Edit
11472 ~  ~ Other Info
11473 ~  ~ Padstack Edit
11474 ~  ~ Thermal Package Type
11475 ~  ~ Select how you would like your symbol created ?
11476 ~  ~ Select how you would like your package created ?
11477 ~  ~ Select mode of creation
11478 ~  ~ Create Package
11479 ~  ~ &New Part 
11480 ~  ~ &Make Padstack ...
11481 ~  ~ Thermal Package Registered Types
11482 ~  ~ &Open Part for Editing...
11483 ~  ~ &Open Padstack for Editing...
11484 ~  ~ Re&store Symbol
11485 ~  ~ Re&store Package
11486 ~  ~ Re&store Padstack
11487 ~  ~ Select Part
11488 ~  ~ Select Padstack
11489 ~  ~ Give part name:
11490 ~  ~ Give PadStack Name:
11491 ~  ~ Save pad :
11492 ~  ~ before continuing?
11493 ~  ~ Package Description
11494 ~  ~ Symbol Type
11495 ~  ~ &Update to Project Library
11496 ~  ~ Part Source Library
11497 ~  ~ Package Source Library
11498 ~  ~ Simulation Parameters
11499 ~  ~ MM Simulation Function
11500 ~  ~ Disk Librarie(s)
11501 ~  ~ New/Edit
11502 ~  ~ Dual In Line Package(DIP)
11503 ~  ~ Single In Line Package(SIP)
11504 ~  ~ Plastic Leaded Chip Carrier(PLCC)
11505 ~  ~ Grid Array(PGA,BGA, ...)
11506 ~  ~ Grid Array ZigZag
11507 ~  ~ D Connectors
11508 ~  ~ Dual In Line Connectors(DIL)
11509 ~  ~ Simulation parameters incomplete for entry :
11510 ~  ~ Correct it before continuing.
11511 ~  ~ Simulation parameter not found
11512 ~  ~ EDSpice parameters incomplete for entry : 
11513 ~  ~ EDSpice parameter not found
11514 ~  ~ Duplicate entry names found for : 
11515 ~  ~ Improper Entrynames
11516 ~  ~ Duplicate simulation parameters found for :
11517 ~  ~ Improper simulation parameters
11518 ~  ~ Duplicate EdSpice parameters found at entry :
11519 ~  ~ Improper EDSpice parameters
11520 ~  ~ (None)
11521 ~  ~ Sub-Circuit
11522 ~  ~ Disk Libraries
11523 ~  ~ Package Pads
11524 ~  ~ New/Edit Padstack
11525 ~  ~ &Show Layers
11526 ~  ~ &Make >>
11527 ~  ~ Hole Diam/Cat:
11528 ~  ~ < &Back
11529 ~  ~ &Update Project Library
11530 ~  ~ &Name:
11531 ~  ~ Package Creation Wizard
11532 ~  ~ Package Wizard provides an easier interface to create a Package 
11533 ~  ~ Specify the  package NAME and select the required TYPE
11534 ~  ~ Package Na&me
11535 ~  ~ Click NEXT to continue...
11536 ~  ~ &Next >
11537 ~  ~ [Step - 4] Component outline parameters may be changed here
11538 ~  ~ Parameters of the component outline may be changed and previewed in the box provided
11539 ~  ~ Component Outline Edit
11540 ~  ~ &Width:
11541 ~  ~ &Length:
11542 ~  ~ &X - Offset:
11543 ~  ~ &Y - Offset:
11544 ~  ~ &Apply >>
11545 ~  ~ &Fit Outline
11546 ~  ~ [Step - 2] Fill in the required parameters
11547 ~  ~ Parameters listed below is specific for the type of package chosen in the previous window.
11548 ~  ~ Legend for package type:
11549 ~  ~ [Step - 3] The padstack parameters may be changed from here
11550 ~  ~ Different padstack may be selected or the listed padstack parameters may be changed accordingly.
11551 ~  ~ Completing the Create Package Wizard
11552 ~  ~ You have succesfully completed the PACKAGE creation.	
11553 ~  ~ Click Finish to exit this window.
11554 ~  ~ Welcome to the Symbol Creation Wizard	
11555 ~  ~ Symbol Wizard provides an easier interface to create a Symbol	
11556 ~  ~ Specify the  symbol NAME and select the required TYPE	
11557 ~  ~ Symbol Na&me	
11558 ~  ~ &General symbol	
11559 ~  ~ &Transformer symbol	
11560 ~  ~ [Step - 2] Fill in the required parameters	
11561 ~  ~ Parameters listed below is specific for the type of symbol chosen in the previous window.	
11562 ~  ~ Legend for symbol type:	
11563 ~  ~ [Step - 4] Change Pitch between two Entry pins selectively. 	
11564 ~  ~ The pitch between two entry pins may be changed selectively. Use arrows to add and remove settings. 	
11565 ~  ~ CoilNo , TurnNo , EntryName 	
11566 ~  ~ Completing the Create Symbol Wizard 	
11567 ~  ~ You have succesfully completed the SYMBOL creation. 	
11568 ~  ~ [Step - 3] Edit Entry name attributes	
11569 ~  ~ Entry names attribute may be changed accordingly 	
11570 ~  ~ New Part Using &Wizard 	
11571 ~  ~ &Update Part in Project Library 	
11572 ~  ~ &Open Part 	
11573 ~  ~ &Auto Assign 	
11574 ~  ~ &Back to Part details 	
11575 ~  ~ Show &Browser 	
11576 ~  ~ &First Group 	
11577 ~  ~ &Previous Group 	
11578 ~  ~ &Next Group 	
11579 ~  ~ &Last Group 	
11580 ~  ~ &Delete Group 	
11581 ~  ~ E&dit Pinout 	
11582 ~  ~ Edit &Package 	
11583 ~  ~ Edit &Symbol 	
11584 ~  ~ Show &Explorer 	
11585 ~  ~ &Group Properties 	
11586 ~  ~ &Remove Assignments 	
11587 ~  ~ &Save Part 	
11588 ~  ~ Save Part &As ... 	
11589 ~  ~ Select &Group	
11590 ~  ~ Show Pac&kage Window 	
11591 ~  ~ not found. Check whether you have spelt the name correctly. 	
11592 ~  ~ Symbol not found. 	
11593 ~  ~ Package not found. Check whether you have spelt the name correctly. 	
11594 ~  ~ The Package names are case sensitive. 	
11595 ~  ~ Package not found. 	
11596 ~  ~ Library Editor (Editing  	
11597 ~  ~ &More groups ... 	
11598 ~  ~ Package :  	
11599 ~  ~ The 	
11600 ~  ~ names are case sensitive. 	
11601 ~  ~ not found. 	
11602 ~  ~ Part Details 	
11603 ~  ~ Constituent Groups	
11604 ~  ~ UnAssigned entries :  	
11605 ~  ~ No UnAssigned 	
11606 ~  ~ Un-Assigned Entries 	
11607 ~  ~ Using &Wizard	
11608 ~  ~ for Editing 	
11609 ~  ~ &As ... 	
11610 ~  ~ Atleast one Symbol or Package is required for a part.
11611 ~  ~ Not valid.	
11612 ~  ~ &Delete Group : 	
11613 ~  ~ Edit &Symbol : 	
11614 ~  ~ Edit &Package : 	
11615 ~  ~ Values Out of Range. Would you like to correct the values and continue?	
11616 ~  ~ Not enough pins for assignment after pin number :	
11617 ~  ~ . Would you like to correct the values and continue?	
11618 ~  ~ Auto Assignment complete.	
11619 ~  ~ Auto Assignment	
11620 ~  ~ This will remove pin assignments for a range of pins.	
11621 ~  ~ Remove Assignment	
11622 ~  ~ Remove Assignment complete.	
11623 ~  ~ Give New name for the 	
11624 ~  ~ Restoring a 	
11625 ~  ~  will replace the edited 	
11626 ~  ~  with the original one.	
11627 ~  ~ Would you like to continue restore?	
11628 ~  ~ Line(s)	
11629 ~  ~ Triangle(s)	
11630 ~  ~ Rectangle(s)	
11631 ~  ~ Circle(s)	
11632 ~  ~ Arc(s)	
11633 ~  ~ Text(s)	
11634 ~  ~ Open for editing	
11635 ~  ~ Give the 	
11636 ~  ~  name to open for Editing: 	
11637 ~  ~ No. of Pins	
11638 ~  ~ Default Padstack	
11639 ~  ~ Pin to Pin Distance (p)	
11640 ~  ~ Horizontal Pitch between Pads (q)	
11641 ~  ~ Length of Package Outline (l)	
11642 ~  ~ Width of Package Outline (b)	
11643 ~  ~ Distance between Corner Pads (e)	
11644 ~  ~ No. of Bottom Row Pins	
11645 ~  ~ Orientation Mode	
11646 ~  ~ Pin to Pin Distance (p/q)	
11647 ~  ~ Angle between Pads (0)	
11648 ~  ~ Pad Circle Diameter (d)	
11649 ~  ~ Case Diameter (D)	
11650 ~  ~ Package Type	
11651 ~  ~ Package Description	
11652 ~  ~ JEDEC Name	
11653 ~  ~ No of pins for PLCC should be a multiple of 4.	
11654 ~  ~ Specification Error	
11655 ~  ~ No of pins for D-Connector should be an odd number.	
11656 ~  ~ No of pins for Dual-In-Line Connector should be an even number.	
11657 ~  ~ Pad Name	
11658 ~  ~ Pad Path	
11659 ~  ~ Pad Rot.	
11660 ~  ~ Pad Descrp.	
11661 ~  ~ , made with the following characterisitcs:	
11662 ~  ~ Package Name        : 	
11663 ~  ~ No of pins          : 	
11664 ~  ~ Horizontal Pitch    : 	
11665 ~  ~ Vertical Pitch      : 	
11666 ~  ~ Outline Width       : 	
11667 ~  ~ Outline Length      : 	
11668 ~  ~ Pitch               : 	
11669 ~  ~ Outline Width       : 	
11670 ~  ~ Outline Length      : 	
11671 ~  ~ Horizontal Pitch    : 	
11672 ~  ~ Vertical Pitch      : 	
11673 ~  ~ Corner pad distance : 	
11674 ~  ~ Horizontal Pitch    : 	
11675 ~  ~ Vertical Pitch      : 	
11676 ~  ~ Placement           : 	
11677 ~  ~ Pitch               : 	
11678 ~  ~ Placement           : 	
11679 ~  ~ Pin Circle radius   : 	
11680 ~  ~ Case Diameter       : 	
11681 ~  ~ Angle between Pads  :	
11682 ~  ~ Package Type        :	
11683 ~  ~ Package Descrp.     : 	
11684 ~  ~ JEDEC Name          : 	
11685 ~  ~ Give a valid Symbol name before continuing.	
11686 ~  ~ Incorrect symbol name	
11687 ~  ~ (vector)	
11688 ~  ~ (user.def.)	
11689 ~  ~ General symbol made with the following characterisitcs:	
11690 ~  ~ No of entries    :
11691 ~  ~ Show Entry Names :
11692 ~  ~ Use Simcode      :
11693 ~  ~ Simcode          :
11694 ~  ~ Simcode Descrp.  :
11695 ~  ~ Use EDSpice      :
11696 ~  ~ Element Code     :
11697 ~  ~ Model/Sub Ckt.   :
11698 ~  ~ Variant/Library  :
11699 ~  ~ Symbol Type      :
11700 ~  ~ Symbol Descrp.   :
11701 ~  ~ Symbol Name      : 	
11702 ~  ~ Transformer symbol made with the following characterisitcs:	
11703 ~  ~ No of coils      :
11704 ~  ~ Show Entry Names :
11705 ~  ~ Align coils      :
11706 ~  ~ Magnetic Shield  :
11707 ~  ~ Core Type        :
11708 ~  ~ Tap Style        :
11709 ~  ~ Symbol Type      :
11710 ~  ~ Symbol Descrp.   :
11711 ~  ~ [entryNo1,entryNo2,nPitch]	
11712 ~  ~ [coilNo,turnNo,entryName]	
11713 ~  ~ No. of Entries (n entries)	
11714 ~  ~ Entry placement grid (Pitch)	
11715 ~  ~ Terminal line length (n*Pitch)	
11716 ~  ~ Display entry names as text	
11717 ~  ~ Orientation of Entries:	
11718 ~  ~     - Left	
11719 ~  ~     - Right	
11720 ~  ~     - Top	
11721 ~  ~     - Bottom	
11722 ~  ~ Assign MixedMode Simulation params.	
11723 ~  ~     - Simcode	
11724 ~  ~     - Description	
11725 ~  ~ Assign EDSpice Simulation params.	
11726 ~  ~     - ElementCode	
11727 ~  ~     - ModelCode	
11728 ~  ~     - Sub-Circuit	
11729 ~  ~     - Variant	
11730 ~  ~     - Library	
11731 ~  ~ Positions:	
11732 ~  ~     - Component Name	
11733 ~  ~     - Component Description	
11734 ~  ~ Entry Name
11735 ~  ~ Orient	
11736 ~  ~ Invert
11737 ~  ~ Swap	
11738 ~  ~ Spice Node	
11739 ~  ~ No. of coils (n coils)	
11740 ~  ~ Type of core	
11741 ~  ~ Tapping style	
11742 ~  ~ n Turns	
11743 ~  ~ Add Setting	
11744 ~  ~ Remove Setting	
11745 ~  ~ Apply to Symbol	
11746 ~  ~ If you want to use this symbol for Mixed mode simulation purposes, Give simulation parameters before continuing	
11747 ~  ~ Do you still want to keep simulation for this symbol enabled?	
11748 ~  ~ Simcode not selected	
11749 ~  ~ If you want to use this symbol for EDSpice simulation purposes, Give simulation parameters before continuing.	
11750 ~  ~ Do you still want to keep EDSpice simulation for this symbol enabled?	
11751 ~  ~ Match No. of Pins - (	
11752 ~  ~  pins)	
11753 ~  ~  name not proper. Correct it and continue.	
11754 ~  ~  is a system library. Saving to system library is not allowed.	
11755 ~  ~ Cannot save in System Library	
11756 ~  ~  exists in library 	
11757 ~  ~ . Would you like to overwrite the 	
11758 ~  ~ Overwrite 	
11759 ~  ~ Save 	
11760 ~  ~  &Name:	
11761 ~  ~ Spacing Increment	
11762 ~  ~ Give increment for spacing : 	
11763 ~  ~ Spacing Decrement	
11764 ~  ~ Give decrement for spacing : 	
11765 ~  ~ Suitable Symbol/Package :	
11766 ~  ~ Name error	
11767 ~  ~ Library name not proper. Correct it and continue.	
11768 ~  ~ Lib Name error	
11769 ~  ~  for Part : 	
11770 ~  ~  cannot be found in the library.	
11771 ~  ~ Symbol/Package not found!	
11772 ~  ~ Project library Symbol/Pacakge : 	
11773 ~  ~  incompatible with Part : 	
11774 ~  ~ Symbol/Package incompatible	
11775 ~  ~  for Part : 	
11776 ~  ~ Simulation Parameters missing/i	
11777 ~  ~ Simulation Params. Error	
11778 ~  ~ Can't find Part : 	
11779 ~  ~ Part not found	
11780 ~  ~ Enter Node Search Criteria (Use '*','?' for wildcard matching):	
11781 ~  ~ EDSpice Simulation Params.	
11782 ~  ~ EDSpice Simulation Model	
11783 ~  ~ Junction case resistance ( 	
11784 ~  ~ Case air resistance ( 	
11785 ~  ~  in Project Library	
11786 ~  ~ . Would you like to correct the values before continuing?	
11787 ~  ~ Add/ edit tapping position of a transformer coil.  	
11788 ~  ~ Tap the transformer coil by specifying the coil number, the turn number at which the coil is to be tapped and specify an entry name. Use arrows to add and remove settings. 
11789 ~  ~ Remove Assignment for Group -
11790 ~  ~ EDSpice Simulation Model/Sub Ckt.	
11791 ~  ~  in Part	
11792 ~  ~ UnAssigned entries or entry names mismatch.	
11793 ~  ~ Not valid part.	
11794 ~  ~ Cannot save symbol. Simulation assignment incomplete or no. of symbol entries not equal to simulation entries.	
11795 ~  ~ Improper symbol	
11796 ~  ~ Are you sure to continue, with delete all	
11797 ~  ~  but #1?	
11798 ~  ~ No. of Entries (n)	
11799 ~  ~ Entry placement grid (P)	
11800 ~  ~ No of pitch for Terminal line length (nP)	
11801 ~  ~ Welcome to the Package Creation Wizard
11802 ~  ~ Symbol Creation Wizard	
11803 ~  ~ &Spice Entry:
11804 ~  ~ &Preserve Assignment while change symbol
11805 ~  ~ Items	
11806 ~  ~ Would you still want to Proceed with save?
11807 ~  ~ Delete Selected 
11808 ~  ~ in use by part.
11809 ~  ~ Renumbering of 
11810 ~  ~  may cause netlist/pin assignment corruption.
11811 ~  ~ Can't renumber 
11812 ~  ~ Parameters
11813 ~  ~ Model Code
11814 ~  ~ &Add Group
11815 ~  ~ Confirm
11816 ~  ~ Add a Group to Part
11817 ~  ~ Give the GroupName,Symbol,[Insert before]
11818 ~  ~ Auto Assigner will automatically establish pin assignments for a range of pins.
11819 ~  ~ Give StartGroup,StartEnrty,[EndGroup],[EndEnrty],[StartPin]
11820 ~  ~ Give StartPin,[NoofPins]
11821 ~  ~ Auto Assignment
11822 ~  ~ ) Group : 
11823 ~  ~ &New
11824 ~  ~ Editing
11825 ~  ~ Package JEDEC NAme
11826 ~  ~ Set the swap level
11827 ~  ~ Set the rotation of PA Text
11828 ~  ~ Set the visibility of PA Text
11829 ~  ~ Set the padstack
11830 ~  ~ Set X position of PA Text with respect to its entry
11831 ~  ~ Set Y position of PA Text with respect to its entry
11832 ~  ~ PA Rotation
11833 ~  ~ Pad(s)
11834 ~  ~ Entry(s)
11835 ~  ~ Select a default Padstack before continuing.
11836 ~  ~ Padstack is already stored in lib:
11837 ~  ~ Scale  :
11838 ~  ~ Roll=
11839 ~  ~ Pitch=
11840 ~  ~ Yaw=
11841 ~  ~ Clear all 3D items
11842 ~  ~ Bottom vertex
11843 ~  ~ Top vertex
11844 ~  ~ Side edge
11845 ~  ~ Bottom edge
11846 ~  ~ Top edge
11847 ~  ~ Ref.point X,Y,Z (
11848 ~  ~ Symbol 3D Item(s)
11849 ~  ~ Polyshape(s)
11850 ~  ~ Repeat
11851 ~  ~ Enter: Steps,dX, dY, dZ (in
11852 ~  ~ Enter: Steps,Zrotation (in degrees
11853 ~  ~ Stretch 
11854 ~  ~ Convert to polyshape 
11855 ~  ~ Rectangular Strip
11856 ~  ~ Rectangular Bar
11857 ~  ~ Cylindrical Bar
11858 ~  ~ Semi-cylindrical Strip
11859 ~  ~ Semi-cylindrical Bar
11860 ~  ~ Triangular Bar
11861 ~  ~ Package(3D)
11862 ~  ~ Tools to edit 3D item in packages
11863 ~  ~ None of selected objects is a polyshape
11864 ~  ~ Block of 3D Items Block
11865 ~  ~ Polyshape
11866 ~  ~ Block of Polyshapes
11867 ~  ~ Use components own color
11868 ~  ~ Color for base surfaces
11869 ~  ~ Color for top surfaces
11870 ~  ~ Color for side surfaces
11871 ~  ~ Color for wire lines
11872 ~  ~ Components in wire view only
11873 ~  ~ Display top pads 
11874 ~  ~ Display bottom pads 
11875 ~  ~ Display holes 
11876 ~  ~ Display top side silkscreen
11877 ~  ~ Display bottom side silkscreen
11878 ~  ~ Display top side traces
11879 ~  ~ Display bottom side traces
11880 ~  ~ Color for board top side
11881 ~  ~ Color for board bottom side
11882 ~  ~ Color for board edge
11883 ~  ~ Color for board wire lines
11884 ~  ~ Use item's own color
11885 ~  ~ Wire view only
11886 ~  ~ Display board surface
11887 ~  ~ Display top silkscreen
11888 ~  ~ Display bottom silkscreen
11889 ~  ~ Color for cursor X Axis
11890 ~  ~ Color for cursor Y Axis
11891 ~  ~ Color for cursor Z Axis
11892 ~  ~ Display board outline
11893 ~  ~ Color for board outline
11894 ~  ~ Blow-up ratio
11895 ~  ~ Selected net(s) to display
11896 ~  ~ Display copper items
11897 ~  ~ Color for copper items
11898 ~  ~ Display copper pour
11899 ~  ~ Color for copper pour
11900 ~  ~ Display silk screen
11901 ~  ~ Display comp. pads
11902 ~  ~ Color for comp. pad holes
11903 ~  ~ Display vias
11904 ~  ~ Color for via holes
11905 ~  ~ Highlight color for surfaces
11906 ~  ~ Highlight color for wires
11907 ~  ~ Highlight color for lines
11908 ~  ~ 3D Package View
11909 ~  ~ 3D Board View
11910 ~  ~ 3D Trace View
11911 ~  ~ Set the X position
11912 ~  ~ Set the Y position
11913 ~  ~ Set the Z position
11914 ~  ~ Set selected vertex X position
11915 ~  ~ Set selected vertex Y position
11916 ~  ~ Set selected vertex Z position
11917 ~  ~ Set the height
11918 ~  ~ Set the Z rotation
11919 ~  ~ Set the X rotation
11920 ~  ~ Set the Y rotation
11921 ~  ~ Set the bottom surface ON/OFF
11922 ~  ~ Set the top surface ON/OFF
11923 ~  ~ Set the side surface(s) ON/OFF
11924 ~  ~ Set the length of the strip
11925 ~  ~ Set the A size of the base
11926 ~  ~ Set the B size of the base
11927 ~  ~ Set the A length of the base
11928 ~  ~ Set the B length of the base
11929 ~  ~ Set interpolation step
11930 ~  ~ Set number of side vertices
11931 ~  ~ Select the color for wire lines
11932 ~  ~ Set the bottom wire ON/OFF
11933 ~  ~ Set the top wire ON/OFF
11934 ~  ~ Set the side wires(s) ON/OFF
11935 ~  ~ Select the color for bottom wire lines  
11936 ~  ~ Select the color for top wire lines 
11937 ~  ~ Select the color for side wire lines
11938 ~  ~ Z Pos
11939 ~  ~ Z rotation
11940 ~  ~ X rotation
11941 ~  ~ Y rotation
11942 ~  ~ With bottom surface
11943 ~  ~ With top surface
11944 ~  ~ With side surface(s)
11945 ~  ~ Base length
11946 ~  ~ Base A size
11947 ~  ~ Base B size
11948 ~  ~ Base A length
11949 ~  ~ Base B length
11950 ~  ~ Base C length
11951 ~  ~ Angular Step
11952 ~  ~ No. of Vertex
11953 ~  ~ Color of wire lines
11954 ~  ~ Vertex Z Pos
11955 ~  ~ With bottom wire
11956 ~  ~ With top wire
11957 ~  ~ With side wire(s)
11958 ~  ~ Color bottom
11959 ~  ~ Color top
11960 ~  ~ Color side(s)
11961 ~  ~ Color bottom wire
11962 ~  ~ Color top wire
11963 ~  ~ Color side(s) wire
11964 ~  ~ 3D View Control

11965 ~  ~ Package Datum
11966 ~  ~ Padstack Datum
11967 ~  ~ Cabinet Datum
11968 ~  ~ Select PCB to add to cabinet view
11969 ~  ~ X/Y(/Z) Coords:
11970 ~  ~ Cabinet PCB(s)
11971 ~  ~ and rotate
11972 ~  ~ Remove board from cabinet view:
11973 ~  ~ Board Cabinet
11974 ~  ~ View Cabinet
11975 ~  ~ Cabinet
11976 ~  ~ 3D Cursor
11977 ~  ~ X/Y(/Z)
11978 ~  ~ Redraw to fit and show entire board cabinet
11979 ~  ~ Redraw on 3D cursor position
11980 ~  ~ All boards already in cabinet
11981 ~  ~ Sim Description :
11982 ~  ~ - Sim Function
11983 ~  ~ - Sim Description
11984 ~  ~ Simulation Function not selected
11985 ~  ~ Display via holes
11986 ~  ~ Display Boards
11987 ~  ~ Perspective
11988 ~  ~ Edit Views
11989 ~  ~ Cursor Position
11990 ~  ~ Relative to current X,Y,Z position
11991 ~  ~ Z Position
11992 ~  ~ 3D Board Cabinet View
11993 ~  ~ Set board X position
11994 ~  ~ Set board Y position
11995 ~  ~ Set board Z position
11996 ~  ~ Set board thickness
11997 ~  ~ Set board Z rotation
11998 ~  ~ Set board X rotation
11999 ~  ~ Set board Y rotation
111000 ~  ~ Board X Pos
111001 ~  ~ Board Y Pos
111002 ~  ~ Board Z Pos
111003 ~  ~ Group of Boards
111004 ~  ~ Cannot delete
111005 ~  ~ On top of &Search Sequence

111006 ~  ~ Net Test Errors Display
111007 ~  ~ Color for tested net copper
111008 ~  ~ Color for tested net traces
111009 ~  ~ Color for connected pads
111010 ~  ~ Color for isolated pads
111011 ~  ~ Color for connected vias
111012 ~  ~ Color for isolated vias

111013 ~  ~ IDF Board File
111014 ~  ~ IDF Library File
111015 ~  ~ Board in wire view only
111016 ~  ~ Color for board surfaces
111017 ~  ~ Color for board wire lines
111018 ~  ~ Color for electrical components
111019 ~  ~ Color for mechanical components
111020 ~  ~ Color for component wire lines
111021 ~  ~ Display drilled holes
111022 ~  ~ Color for pin holes
111023 ~  ~ Color for mounting holes
111024 ~  ~ Color for tool holes

111025 ~  ~ Display Notes
111026 ~  ~ Color for Note
111027 ~  ~ Display Routing Outline
111028 ~  ~ Color for Routing Outline
111029 ~  ~ Display Placement Outlines
111030 ~  ~ Color for Placement Outline
111031 ~  ~ Display Routing Keepout
111032 ~  ~ Color for Routing Keepout
111033 ~  ~ Display Via Keepout
111034 ~  ~ Color for Via Keepout

111035 ~  ~ Display Placement Keepout
111036 ~  ~ Color for Placement Keepout
111037 ~  ~ Display Placement Group Areas
111038 ~  ~ Color for Placement Group Areas
111039 ~  ~ Display Other Outline
111040 ~  ~ Color for Other Outline
111041 ~  ~ IDF Import View
111042 ~  ~ Select IDF Board File
111043 ~  ~ Select IDF Library File

111044 ~  ~ None
111045 ~  ~ Convex curve
111046 ~  ~ Concave curve
111047 ~  ~ Convex sphere
111048 ~  ~ Concave sphere

111049 ~  ~ Set the base radius
111050 ~  ~ Set the top radius
111051 ~  ~ Set dome shape
111052 ~  ~ Set dome shape fitting steps
111053 ~  ~ Top radius
111054 ~  ~ Dome shape
111055 ~  ~ Dome shape fitting steps
111056 ~  ~ part specific

111057 ~  ~ Remove edge vertex

111058 ~  ~ Insert edge vertex before selected
111059 ~  ~ Insert edge vertex after selected
111060 ~  ~ Part Specific MM Sim Function for
111061 ~  ~ Polyshape with less than four sides. Edge vertex cannot be removed
111062 ~  ~ Bottom or Top edge of Polyshape cannot be removed
111063 ~  ~ Bottom or Top edge of Polyshape cannot be inserted
111064 ~  ~ NOT USED
111065 ~  ~ PADSTACK NO 
111066 ~  ~ ENTRIES
111067 ~  ~ PADS
111068 ~  ~ MM Sim.Name=
111069 ~  ~ GRAPHIC ITEMS
111070 ~  ~ Display contents
111071 ~  ~ Edit Color Palette
111072 ~  ~ EditTrue Color Palette
111073 ~  ~ Pick True Color
111074 ~  ~ Standard Colors
111075 ~  ~ True Colors

111076 ~  ~ Launch Library Explorer
111077 ~  ~ Too many parameters found
111078 ~  ~ Can't add more than 128 Groups at one instance
111079 ~  ~ Enter a Valid GroupName
111080 ~  ~ Invalid Number Found in [Insert before] field
111081 ~  ~ Polygon Vertex:
111082 ~  ~ Polygon(s)
111083 ~  ~ Item Frames
111084 ~  ~ Display Item Frames
111085 ~  ~ Package Dimensions
111086 ~  ~ Display Package Dimensions
111087 ~  ~ Closed shape polygon
111088 ~  ~ Copper/Outline
111089 ~  ~ Slot
111090 ~  ~ Router keep-off zone
111091 ~  ~ Open polygon
111092 ~  ~ Filled polygon
111093 ~  ~ (not used)
111094 ~  ~ Can't insert element:
111095 ~  ~ Intersecting or invalid polygon boundaries
111096 ~  ~ Polygon to complex
111097 ~  ~ Rounded Rectangle
111098 ~  ~ Oval
111099 ~  ~ Complex(edit manually)
111100 ~  ~ Pin mount through hole(PMD)
111101 ~  ~ Surface mount(SMD)
111102 ~  ~ Mounting through hole
111103 ~  ~ Insulation gap
111104 ~  ~ Layer groups
111105 ~  ~ Top mask layer
111106 ~  ~ Top copper layer
111107 ~  ~ Middle layers
111108 ~  ~ Bottom copper layer
111109 ~  ~ Bottom mask layer
111110 ~  ~ Length (X size)
111111 ~  ~ Heigth (Y size)
111112 ~  ~ Radius Coefficient(0.05 - 0.5)
111113 ~  ~ Specification
111114 ~  ~ New Padstack - Create or Select
111115 ~  ~ Proceed to manual editing
111116 ~  ~ Default new padstack
111117 ~  ~ Select/Edit padstack for replacement in package
111118 ~  ~ Accept selection
111119 ~  ~ &Global edit
111120 ~  ~ Through Hole Padstack
111121 ~  ~ General Padstack
111122 ~  ~ Surface Mount Padstack
111123 ~  ~ Mounting Hole Padstack
111124 ~  ~ Complex
111125 ~  ~ No of pins for QFP should be a multiple of 4.
111126 ~  ~ Small Outline IC Package(SOIC)
111127 ~  ~ Quad Flat Package(QFP)

111128 ~  ~ 3D Elements Library       
111129 ~  ~ Element preview
111130 ~  ~ Edit text
111131 ~  ~ Add text
111132 ~  ~ Check whether you have spelt the name correctly.
111133 ~  ~ IPC Name           :
111134 ~  ~ Package IPC NAme
111135 ~  ~ IPC Name

111136 ~  ~ XY-Coordinates
111137 ~  ~ Redraw on selected XY-coordinates
111138 ~  ~ Enter absolute XY-coordinates
111139 ~  ~ Enter XY-displacement from board datum
111140 ~  ~ Enter XY-displacement from current reference point
111141 ~  ~ Scale of preview text adjusted
111142 ~  ~ Preview text displayed in the scale of main screen
111143 ~  ~ Hole size/Category
111144 ~  ~ Rotation
111145 ~  ~ Removed Simulation model(s) assigned to the symbol
111146 ~  ~ Add new Padstack to the Padstack list
111147 ~  ~ Set new Padstack
111148 ~  ~ Mixed-Mode Simulation Value of the symbol
111149 ~  ~ Change Mixed-Mode Simulation Entry
111150 ~  ~ EDSpice Simulation Value of the symbol
111151 ~  ~ Change EDSpice Simulation Entry
111152 ~  ~ Add/Change Padstack
111153 ~  ~ Select a new Padstack
111154 ~  ~ Simulation Info
111155 ~  ~ Mixed Mode Model
111156 ~  ~ No Model Assigned
111157 ~  ~ Mixed Mode Entry 
111158 ~  ~ EDSpice Entry
111159 ~  ~ EDSpice Sim.Name=
111160 ~  ~ Edit &Padstack

#FILE = E2KLIBSV.EXE  'EDWin 2000 Library Viewer'

121 ~  ~ &Alias Parts
122 ~  ~ &Associate External Index Codes
123 ~  ~ &Browse
124 ~  ~ &Cancel
125 ~  ~ &Conv. Package Lib to <inch>
126 ~  ~ &Conv. Package Lib to <Metric>
127 ~  ~ &Conv. Padstack Lib to <inch>
128 ~  ~ &Conv. Padstack Lib to <Metric>
129 ~  ~ &Create Template Files
1210 ~  ~ &Empty
1211 ~  ~ &Package
1212 ~  ~ &Prefix
1213 ~  ~ &Save
1214 ~  ~ &Search
1215 ~  ~ &Single
1216 ~  ~ &Update Part Library
1217 ~  ~ &Usage
1218 ~  ~ ' sim. name: '
1219 ~  ~ (Prefix)
1220 ~  ~ (Wildcard)
1221 ~  ~ ) Parts in
1222 ~  ~ - Can't load Part:
1223 ~  ~ - Can't save Part:
1224 ~  ~ - Current Association with EID
1225 ~  ~ - Part:
1226 ~  ~ - not found in Primitive Libraries
1227 ~  ~ - Pad Positions & Padstack Info
1228 ~  ~ - Padstack info for Pad No.
1229 ~  ~ - Select Target Library
1230 ~  ~ /Partname(space)Fullname|ExternalIndexCode|SimulationReferance
1231 ~  ~ /Examples are:
1232 ~  ~ /The format for updation is as follows:
1233 ~  ~ /This is a facility to update Part Library
1234 ~  ~ /TL031 Enhanced JFET OPAMP|TL031N|@TL031_30
1235 ~  ~ <&Metric> Lay.&& Padstack  Libs
1236 ~  ~ <Inch> to <Metric> Library Conversion
1237 ~  ~ <Metric> to <Inch> Library Conversion
1238 ~  ~ All Invisible
1239 ~  ~ All Libraries
1240 ~  ~ All Visible
1241 ~  ~ Assign Simulation Function
1242 ~  ~ Assigned Simulation Entry Names in this symbol are:
1243 ~  ~ ASSOCIATE
1244 ~  ~ Associate :
1245 ~  ~ Associate Mode :
1246 ~  ~ Associating part
1247 ~  ~ Associating Parts with External Info Project, Please wait ...
1248 ~  ~ Association of External Index Codes
1249 ~  ~ BROWSE
1250 ~  ~ Can't load Part :
1251 ~  ~ Can't Update Part :
1252 ~  ~ Cannot open
1253 ~  ~ Cat.
1254 ~  ~ Change for all Libraries
1255 ~  ~ Change Simulation Parameters
1256 ~  ~ Click 'Update' to start processing
1257 ~  ~ closed
1258 ~  ~ Convert EED3 libraries
1259 ~  ~ Converted
1260 ~  ~ Converting:
1261 ~  ~ Create
1262 ~  ~ created OK
1263 ~  ~ Creating Part Library Update Template
1264 ~  ~ Creating Template Files
1265 ~  ~ Defined Pinouts for Group number #
1266 ~  ~ Part :
1267 ~  ~ Part(s) External Index Code Update
1268 ~  ~ Parts updated
1269 ~  ~ Parts with Equivalent Pinout and Gating
1270 ~  ~ Diameter
1271 ~  ~ Dir. for &Part Libs
1272 ~  ~ Dir. for &Package Libs
1273 ~  ~ Dir. for &Symbol Libs
1274 ~  ~ Ediit SwapLevel for the Selected Entry
1275 ~  ~ Edit PA Shift
1276 ~  ~ Edit Pin Assignment text displacement from Entry,Visibility && Entry Swaplevel
1277 ~  ~ Edit Pinouts && SwapLevel for Entry #
1278 ~  ~ Edit SimCode
1279 ~  ~ Part Library Mass Update
1280 ~  ~ EED3 Library Conversion
1281 ~  ~ Package Library <Metric> Conversion
1282 ~  ~ Library Viewer
1283 ~  ~ Pad Positions & Padstack Info
1284 ~  ~ SimCode list File Name:
1285 ~  ~ Update Part
1286 ~  ~ Library updating..... Errors
1287 ~  ~ Library Viewer
1288 ~  ~ Simulation Primitives (
1289 ~  ~ elements converted O.K
1290 ~  ~ Entry Info
1291 ~  ~ Executing Mass Part Library Update
1292 ~  ~ External Project has no valid fields
1293 ~  ~ External Project has no valid records
1294 ~  ~ External Project Not Selected
1295 ~  ~ External Index Codes for Parts in Library:
1296 ~  ~ External Info Project Associater
1297 ~  ~ External Info Project Browser
1298 ~  ~ External Information Project Files
1299 ~  ~ Fix
12100 ~  ~ Fix All PA
12101 ~  ~ Fix PA
12102 ~  ~ Fix Pin Assignment Displacement for All Entries
12103 ~  ~ Fix Pin Assignment Displacement for Selected Entry
12104 ~  ~ Fix:
12105 ~  ~ found in following libraries:
12106 ~  ~ From:
12107 ~  ~ function:
12108 ~  ~ Hole
12109 ~  ~ HoleCategory:
12110 ~  ~ is used in following Parts:
12111 ~  ~ Pack. Libraries (*.ELL)|*.ELL|Pack. Libraries (*.ELX)|*.ELX
12112 ~  ~ Pack. Libraries (*.ELX)|*.ELX|Pack. Libraries (*.ELL)|*.ELL
12113 ~  ~ Package
12114 ~  ~ Package
12115 ~  ~ Package:
12116 ~  ~ Package Libraries:
12117 ~  ~ Package(s)
12118 ~  ~ Packages
12119 ~  ~ Packages:
12120 ~  ~ Library :
12121 ~  ~ Library Element Load/Save failed - discard file:
12122 ~  ~ Library Type:
12123 ~  ~ Library:
12124 ~  ~ library
12125 ~  ~ Line #
12126 ~  ~ List of Simulation Primitives:
12127 ~  ~ Listing of Symbols set for Mixed-Mode Simulator
12128 ~  ~ Loaded Parts :
12129 ~  ~ Loading parts ...
12130 ~  ~ Loading External Info Project ...
12131 ~  ~ Make list for all codes
12132 ~  ~ named: '
12133 ~  ~ No association with currently selected EID
12134 ~  ~ No Part in the selected library
12135 ~  ~ No Part Selected
12136 ~  ~ No Possible Alias in the Library
12137 ~  ~ No Simulation Code assigned.
12138 ~  ~ No symbols set for this code
12139 ~  ~ Not all libraries searched
12140 ~  ~ Not all Libs Scanned!
12141 ~  ~ Nothing to update in
12142 ~  ~ Nothing updated in
12143 ~  ~ opened, processing....
12144 ~  ~ or wildcard ex. 74L???
12145 ~  ~ or wildcard ex. DI?????
12146 ~  ~ or wildcard ex. RE???
12147 ~  ~ Output Library:
12148 ~  ~ Overwrite
12149 ~  ~ PA Shift X:
12150 ~  ~ PA Shift Y:
12151 ~  ~ PA Visible
12152 ~  ~ Pad
12153 ~  ~ Pad Overall size
12154 ~  ~ Padstack Libraries:
12155 ~  ~ Padstack Libs (*.EPL)|*.EPL|Padstack Libs (*.EPX)|*.EPX
12156 ~  ~ Padstack Libs (*.EPX)|*.EPX|Padstack Libs (*.EPL)|*.EPL
12157 ~  ~ Pin Assignment Displacement in X direction for Selected Entry
12158 ~  ~ Pin Assignment Displacement in Y direction for Selected Entry
12159 ~  ~ Position
12160 ~  ~ Possible Alias :
12161 ~  ~ Prefix ex. 74*
12162 ~  ~ Prefix ex. DIP*
12163 ~  ~ Prefix ex. R*
12164 ~  ~ Processing Part :
12165 ~  ~ Ready
12166 ~  ~ Records Displayed
12167 ~  ~ Redraw Symbol
12168 ~  ~ Results may not be complete
12169 ~  ~ Rot.
12170 ~  ~ Save Changes To the Currently Editing Symbol
12171 ~  ~ Symbol
12172 ~  ~ Symbol(s)
12173 ~  ~ symbols
12174 ~  ~ Search Cancelled
12175 ~  ~ Select a row(part) from table
12176 ~  ~ Select Part Library File
12177 ~  ~ Select Sim. Text for Entry #
12178 ~  ~ Select Simulation Function
12179 ~  ~ Select Simulation Code(s):
12180 ~  ~ Select Simulation text
12181 ~  ~ Select Template file
12182 ~  ~ Select Template file for Part Library update
12183 ~  ~ Selected Library
12184 ~  ~ Selecting Template File
12185 ~  ~ Set All Entry Pinouts to Invisible
12186 ~  ~ Set All Entry Pinouts to visible
12187 ~  ~ Set Entry Pinouts to Invisible for selected Entry
12188 ~  ~ Set Entry Pinouts to visible for selected Entry
12189 ~  ~ Set SwapLevel For the Selected  Entry
12190 ~  ~ Sim Code
12191 ~  ~ Sim.Info
12192 ~  ~ Simulation Code:
12193 ~  ~ Simulation Codes
12194 ~  ~ Simulation info for symbol:
12195 ~  ~ Simulation Primitive List
12196 ~  ~ Simulation Primitives stored in following files:
12197 ~  ~ Swap Level:
12198 ~  ~ symbol(s)
12199 ~  ~ Template File Name:
12200 ~  ~ Template file:
12201 ~  ~ Template:
12202 ~  ~ Text Files (*.TXT)|*.TXT |All Files (*.*)|*.*
12203 ~  ~ Total of
12204 ~  ~ Total:
12205 ~  ~ Type in name
12206 ~  ~ Update of External Index Codes
12207 ~  ~ Updated (
12208 ~  ~ Updating completed
12209 ~  ~ Updating Failed
12210 ~  ~ Updating from Template file:
12211 ~  ~ Updating the Part library... Status
12212 ~  ~ using Padstack No. #
12213 ~  ~ Valid Simulation Entry Names for this code are:
12214 ~  ~ View
12215 ~  ~ View &Parts [all]
12216 ~  ~ View &Packages [all]
12217 ~  ~ View &Symbols [all]
12218 ~  ~ View Parts
12219 ~  ~ View Parts [
12220 ~  ~ View Packages
12221 ~  ~ View Packages[
12222 ~  ~ View Padstack Lib.
12223 ~  ~ View Symbols
12224 ~  ~ View Symbols [
12225 ~  ~ will be changed.
12226 ~  ~ with External Info Project ...
12227 ~  ~ with External Info Project, Please wait ...
12228 ~  ~ You are going to update Part library.
12229 ~  ~ Not all Libs Scanned! - Too many elements
12230 ~  ~ &Edit Part
12231 ~  ~ &Edit Padstack

12232 ~  ~ &Show Details
12233 ~  ~ 3D Viewer


#FILE = E2KSCHED.EXE  'EDWin 2000 Schematic Editor'

131 ~  ~ &Assign to Pattern by Prefix
132 ~  ~ &Autopackaging
133 ~  ~ &Category
134 ~  ~ &Clean
135 ~  ~ &Grid
136 ~  ~ &Instant Net Name
137 ~  ~ &Keep Off Zone
138 ~  ~ &Page
139 ~  ~ &Page Datum
1310 ~  ~ &Preload Wires
1311 ~  ~ &Rename
1312 ~  ~ &Route Step
1313 ~  ~ &Save  Wires
1314 ~  ~ &Style
1315 ~  ~ &Unroutes
1316 ~  ~ &Wires&&Buses
1317 ~  ~ (named as:
1318 ~  ~ - Save Design Notes
1319 ~  ~ - Save Page Notes
1320 ~  ~ - Select Design Notes to Load
1321 ~  ~ - Select Page Notes to Load
1322 ~  ~ Add text:
1323 ~  ~ Alignment :
1324 ~  ~ All Page
1325 ~  ~ as member:
1326 ~  ~ Assign Bus Name:
1327 ~  ~ Auto Router...
1328 ~  ~ Auto&route
1329 ~  ~ Autpackaging completed
1330 ~  ~ Autpackaging in progress..
1331 ~  ~ Block files(*.ESM)|*.ESM
1332 ~  ~ Block Loaded O.K
1333 ~  ~ Block saved O.K
1334 ~  ~ Block Wires
1335 ~  ~ Bus member text:
1336 ~  ~ Bus name text:
1337 ~  ~ Bus to Delete:
1338 ~  ~ By X :
1339 ~  ~ By Y :
1340 ~  ~ Can't create symbol for Pattern lines
1341 ~  ~ Cant't assign number to Prefix: Unpck
1342 ~  ~ Cells :
1343 ~  ~ Chage to Prefix:
1344 ~  ~ Change Bus member text:
1345 ~  ~ Change Bus name text:
1346 ~  ~ Change Category Colors
1347 ~  ~ Change Comp.description
1348 ~  ~ Change Comp.name text:
1349 ~  ~ Change Comp.text:
1350 ~  ~ Change Comp.value:
1351 ~  ~ Change Comp.value:
1352 ~  ~ Change Net Name text:
1353 ~  ~ Change Pinout text:
1354 ~  ~ Change Routing Step
1355 ~  ~ Change routing step...
1356 ~  ~ Change to:
1357 ~  ~ Clean Page:
1358 ~  ~ Cleaning Page:
1359 ~  ~ Clearances between components :
1360 ~  ~ Columns :
1361 ~  ~ Comp. Descript.
1362 ~  ~ Comp. Entry
1363 ~  ~ Comp. Name
1364 ~  ~ Comp. Outline
1365 ~  ~ Comp. Text
1366 ~  ~ Comp. Value
1367 ~  ~ Comp.text:
1368 ~  ~ Component:
1369 ~  ~ Components
1370 ~  ~ Connect to existing Net:
1371 ~  ~ Continue...
1372 ~  ~ coordmode = P then from page datum
1373 ~  ~ Deleding Wires
1374 ~  ~ Delete All Wires
1375 ~  ~ Delete All wires in current page
1376 ~  ~ Delete all wires on current Page ...
1377 ~  ~ Delete all wires: Press Space key if yes..
1378 ~  ~ Delete Bus lines?
1379 ~  ~ Delete Bus Member:
1380 ~  ~ Delete Bus Point?
1381 ~  ~ Delete Bus Segment?
1382 ~  ~ Delete Bus:
1383 ~  ~ Delete Free Wire Points
1384 ~  ~ Delete Net
1385 ~  ~ Delete Page:
1386 ~  ~ Delete selected wire
1387 ~  ~ Delete selected Wire...
1388 ~  ~ Delete selected Wire: Press Space key if yes..
1389 ~  ~ Delete single Wire segment
1390 ~  ~ Delete whole Wire?
1391 ~  ~ Delete Wire Point?
1392 ~  ~ Delete Wire Segment?
1393 ~  ~ Delete wires in one net
1394 ~  ~ Delete Wires in one net (current Page) ...
1395 ~  ~ Delete Wires in one net: Press Space key if yes..
1396 ~  ~ Deleting all wires
1397 ~  ~ Design Notes(*.EDN)|*.EDN
1398 ~  ~ Edit Component Relocation in :
1399 ~  ~ Automatic Packaging
13100 ~  ~ Component Packaging
13101 ~  ~ Page Format
13102 ~  ~ Schematic Editor (
13103 ~  ~ Help
13104 ~  ~ Schematic Editor
13105 ~  ~ Error Code
13106 ~  ~ exchange of gates failed
13107 ~  ~ Find free
13108 ~  ~ for component
13109 ~  ~ Format corners:
13110 ~  ~ Format rectangle:
13111 ~  ~ Formats:
13112 ~  ~ Gate number:
13113 ~  ~ General Project Info.
13114 ~  ~ Generation :
13115 ~  ~ Global parameters
13116 ~  ~ Go to Delete functions ...
13117 ~  ~ Go to Delete functions...
13118 ~  ~ Go to Routing functions ...
13119 ~  ~ Go to Routing functions...
13120 ~  ~ Grid # 1
13121 ~  ~ Grid # 2
13122 ~  ~ Grid # 3
13123 ~  ~ Grid # 4
13124 ~  ~ Group:
13125 ~  ~ Horizontal
13126 ~  ~ In Bus:
13127 ~  ~ in Part:
13128 ~  ~ In&fo
13129 ~  ~ Items
13130 ~  ~ Package name:
13131 ~  ~ Load Design Notes
13132 ~  ~ Load Page Notes
13133 ~  ~ Loading ...
13134 ~  ~ Memory
13135 ~  ~ Menu
13136 ~  ~ n - named
13137 ~  ~ Name prefixes found:
13138 ~  ~ Net Information
13139 ~  ~ Net Name text:
13140 ~  ~ netname[,n] or [,p]
13141 ~  ~ Nets
13142 ~  ~ New page name:
13143 ~  ~ New prefix
13144 ~  ~ No Components or Symbols
13145 ~  ~ No printing boundaries selected
13146 ~  ~ No wire to delete
13147 ~  ~ No wire to Route
13148 ~  ~ No wires to delete
13149 ~  ~ No wires to Route
13150 ~  ~ OnLine
13151 ~  ~ p - Pwr/Gnd
13152 ~  ~ Pack:
13153 ~  ~ Page &Format
13154 ~  ~ Page &OutLines
13155 ~  ~ Page edge :
13156 ~  ~ Page Notes(*.EPN)|*.EPN
13157 ~  ~ Page(s):
13158 ~  ~ Pair not selected
13159 ~  ~ Pattern # 5 :
13160 ~  ~ Pattern Off
13161 ~  ~ Pinout text:
13162 ~  ~ Autoplace
13163 ~  ~ Placement Patterns
13164 ~  ~ Point gate to swap with:
13165 ~  ~ Prefix in Part:
13166 ~  ~ Preload existing Wires from Project ...
13167 ~  ~ Preload in progress ...
13168 ~  ~ Preload is completed.
13169 ~  ~ Preload SetUp ...
13170 ~  ~ Preloading Wires ...
13171 ~  ~ Redraw button
13172 ~  ~ refmode = s then groupnumber=0,refname = symbol name
13173 ~  ~ Repack Components in Block?
13174 ~  ~ Repeating wire
13175 ~  ~ Return to Upper Menu ...
13176 ~  ~ Route all wires on current Page.
13177 ~  ~ Route Component connections on current Page.
13178 ~  ~ Route in Block.
13179 ~  ~ Route Net on current Page.
13180 ~  ~ Route Pair.
13181 ~  ~ Route Wires
13182 ~  ~ Rows :
13183 ~  ~ Save Design Notes
13184 ~  ~ Save Page Notes
13185 ~  ~ Save routed and preloaded Wires in Project ...
13186 ~  ~ Saving ...
13187 ~  ~ Saving Block
13188 ~  ~ Scale:
13189 ~  ~ Schematic Autorouter
13190 ~  ~ Schematic Categories
13191 ~  ~ Schematics Router
13192 ~  ~ SCRouter - Error
13193 ~  ~ Select Comps Orientation by Name Prefixes
13194 ~  ~ Select New Page
13195 ~  ~ Select Page / Print
13196 ~  ~ Set Colors
13197 ~  ~ Set value:
13198 ~  ~ Settings
13199 ~  ~ Single Wire
13200 ~  ~ Start Number:
13201 ~  ~ Start Number:
13202 ~  ~ Statistics
13203 ~  ~ Switch scrollbars ON/OFF.
13204 ~  ~ to Bus
13205 ~  ~ Toggle On-line Help ON/OFF
13206 ~  ~ Type Net Name
13207 ~  ~ UNBUS
13208 ~  ~ Unpack
13209 ~  ~ Unpack Components in Block?
13210 ~  ~ Used by:
13211 ~  ~ ViewPort
13212 ~  ~ You may now preload Wires from the Schematics ...
13213 ~  ~ Zoom
13214 ~  ~ Loading...
13215 ~  ~ Loaded Ok
13216 ~  ~ Copying...
13217 ~  ~ Select Symbol Group from Part:
13218 ~  ~ Schematic Component
13219 ~  ~ Wire Text
13220 ~  ~ Layout Component
13221 ~  ~ Layout Component Text
13222 ~  ~ Schematic Component Text
13223 ~  ~ Copied OK
13224 ~  ~ Select/Display current value for precision
13225 ~  ~ Increase current precision
13226 ~  ~ Decrease current precision
13227 ~  ~ Zoom block
13228 ~  ~ Select a block to zoom
13229 ~  ~ Redraw in currently selected mode
13230 ~  ~ Select/Toggle display of grid
13231 ~  ~ Select/Display current value for grid
13232 ~  ~ Snap and Angular snap
13233 ~  ~
13234 ~  ~ Select/Display current value for snap
13235 ~  ~ Angular Snap
13236 ~  ~ Select/Display current value for angular snap
13237 ~  ~ Line grid
13238 ~  ~ Select line grid
13239 ~  ~ Dot grid
13240 ~  ~ Select dot grid
13241 ~  ~ Cross grid
13242 ~  ~ Select cross grid
13243 ~  ~ Redraw in current precision
13244 ~  ~ Redraw and pan to center in current precision
13245 ~  ~ Redraw to fit and show entire page
13246 ~  ~ Redraw on component in current precision
13247 ~  ~ Pages
13248 ~  ~ Select/Display current page
13249 ~  ~ TextSize
13250 ~  ~ Select/Display current value for textSize
13251 ~  ~ Font Type
13252 ~  ~ Select/Display current font for texts
13253 ~  ~ Bold
13254 ~  ~ Italics
13255 ~  ~ Under line
13256 ~  ~ Strike through
13257 ~  ~ Line Style
13258 ~  ~ Select current line style
13259 ~  ~ Line Size
13260 ~  ~ Select/Display current line size
13261 ~  ~ Solid Style
13262 ~  ~ Dash Style
13263 ~  ~ Dot Style
13264 ~  ~ Dash Dot
13265 ~  ~ Dash Dot Style
13266 ~  ~ Dash Dot Dot
13267 ~  ~ Dash Dot Dot Style
13268 ~  ~ X Pos
13269 ~  ~ Y Pos
13270 ~  ~ Units
13271 ~  ~ Set current working unit
13272 ~  ~ Coordinates
13273 ~  ~ Set current coordinates (XY/Distance)
13274 ~  ~ View units in inches
13275 ~  ~ View units in millimeters
13276 ~  ~ XY
13277 ~  ~ Set current coordinates in XY
13278 ~  ~ Set current coordinates in Distance
13279 ~  ~ View Nodes
13280 ~  ~ View Ratsnest
13281 ~  ~ View Page Notes
13282 ~  ~ View Design Notes
13283 ~  ~ View BitMaps
13284 ~  ~ View Entries
13285 ~  ~ View Page Outline
13286 ~  ~ Ruler
13287 ~  ~ View Ruler in current units
13288 ~  ~ ToolTip
13289 ~  ~ View ToolTip
13290 ~  ~ View Monochrome
13291 ~  ~ Patterns
13292 ~  ~ View Pattern
13293 ~  ~ Pattern 1
13294 ~  ~ View Pattern 1
13295 ~  ~ Pattern 2
13296 ~  ~ View Pattern 2
13297 ~  ~ Pattern 3
13298 ~  ~ View Pattern 3
13299 ~  ~ Pattern 4
13300 ~  ~ View Pattern 4
13301 ~  ~ Tools to work with Components
13302 ~  ~ Wires
13303 ~  ~ Tools to work with Wires
13304 ~  ~ Tools to work with Design Notes
13305 ~  ~ Tools to work with Nets
13306 ~  ~ Tools to work in block
13307 ~  ~ Tools to work with Page Outline
13308 ~  ~ Tools to work with Page Notes
13309 ~  ~ Tools to work with bitmaps
13310 ~  ~ Tools to work with Placement Patterns
13311 ~  ~ KeepOff Zone
13312 ~  ~ Tools to work with KeepOff Zones
13313 ~  ~ Point Next Pin
13314 ~  ~ Delete Block / Selected Objects
13315 ~  ~ Function tool for net was removed
13316 ~  ~ Function tool for net reconnect was removed
13317 ~  ~ Filled
13318 ~  ~ Set the starting X position : (X1)
13319 ~  ~ Set the starting Y position : (Y1)
13320 ~  ~ Select the color
13321 ~  ~ Select the line width (Thickness)
13322 ~  ~ Set the rotation
13323 ~  ~ Select the style
13324 ~  ~ Set the ending X position : (X2)
13325 ~  ~ Set the ending Y position : (Y2)
13326 ~  ~ Set the width of the rectangle (dX)
13327 ~  ~ Set the height of the rectangle (dY)
13328 ~  ~ Set the X position for the centre (X)
13329 ~  ~ Set the Y position for the centre (Y)
13330 ~  ~ Set the Radius (r)
13331 ~  ~ Set the X position (X) of text
13332 ~  ~ Set the Y position (Y) of text
13333 ~  ~ Set the text
13334 ~  ~ Select the size of the text
13335 ~  ~ Select the font of the text
13336 ~  ~ Select the thickness of the text (Only Vector Font)
13337 ~  ~ Set the starting angle of the arc
13338 ~  ~ Set the ending angle of the arc
13339 ~  ~ Set X position of first vertex of the triangle (X1)
13340 ~  ~ Set Y position of first vertex of the triangle (Y1)
13341 ~  ~ Set X distance of second vertex of the triangle from the first (dX2)
13342 ~  ~ Set Y distance of second vertex of the triangle from the first (dY2)
13343 ~  ~ Set X distance of third vertex of the triangle from the first (dX3)
13344 ~  ~ Set Y distance of third vertex of the triangle from the first (dY3)
13345 ~  ~ Select Font Style (Only True Type Font)
13346 ~  ~ Palette
13347 ~  ~ Start X
13348 ~  ~ Start Y
13349 ~  ~ Color
13350 ~  ~ Line Width
13351 ~  ~ Style
13352 ~  ~ End X
13353 ~  ~ End Y
13354 ~  ~ Size X
13355 ~  ~ Size Y
13356 ~  ~ Centre X
13357 ~  ~ Centre Y
13358 ~  ~ Radius
13359 ~  ~ Font size:
13360 ~  ~ Font
13361 ~  ~ Font Width
13362 ~  ~ Angle A
13363 ~  ~ Angle B
13364 ~  ~ Vertex Ax
13365 ~  ~ Vertex Ay
13366 ~  ~ Vertex Bx
13367 ~  ~ Vertex By
13368 ~  ~ Vertex Cx
13369 ~  ~ Vertex Cy
13370 ~  ~ Font Style
13371 ~  ~ Property
13372 ~  ~ Vector Move X
13373 ~  ~ Vector Move Y
13374 ~  ~ Align X
13375 ~  ~ Align Y
13376 ~  ~ Symbol Description
13377 ~  ~ Packaged
13378 ~  ~ Gate
13379 ~  ~ MM Model Code
13380 ~  ~ EDSpice Code
13381 ~  ~ EDSpice Id
13382 ~  ~ Package Name and Part Description
13383 ~  ~ MixedMode Simulator Model Code
13384 ~  ~ EDSpice Code : [ Element ]  [ Model/Subcircuit ]  [ Variant ]  [ Family ]
13385 ~  ~ MM Sim Name
13386 ~  ~ In Net
13387 ~  ~ Property Sch Components
13388 ~  ~ Bus Not Selected
13389 ~  ~ Select Net
13390 ~  ~ Bus menber number to delete:
13391 ~  ~ Members
13392 ~  ~ Member Number
13393 ~  ~ Property Bus
13394 ~  ~ Power/Ground
13395 ~  ~ In Bus
13396 ~  ~ Sch Comp Name
13397 ~  ~ Connected (Sch)
13398 ~  ~ Page Name
13399 ~  ~ Lay Comp Name
13400 ~  ~ Connected (Lay)
13401 ~  ~ Connected
13402 ~  ~ SCOMPNAME
13403 ~  ~ SCONNECTED
13404 ~  ~ LSCOMPNAME
13405 ~  ~ LCONNECTED
13406 ~  ~ Property Nets(Schematics)
13407 ~  ~ Clearance between Components by X
13408 ~  ~ Clearance between Components by Y
13409 ~  ~ Components Alignment
13410 ~  ~ Page Edge
13411 ~  ~ Generation
13412 ~  ~ Unconnected
13413 ~  ~ Unpacked
13414 ~  ~ Packed
13415 ~  ~ Not Applicable
13416 ~  ~ Redraw :
13417 ~  ~ &Lay Components
13418 ~  ~ &Sch &Components
13419 ~  ~ Pac&kages
13420 ~  ~ S&ymbols
13421 ~  ~ Layout Components Information
13422 ~  ~ Schematic Components Information
13423 ~  ~ Parts Informations
13424 ~  ~ Packages Informations
13425 ~  ~ Symbols Informations
13426 ~  ~ Nets Informations
13427 ~  ~ Buses Informations
13428 ~  ~ Layout Components :
13429 ~  ~ Schematic Components :
13430 ~  ~ Current Hierarchy Stack Informations
13431 ~  ~ Current Hierarchy Stack
13432 ~  ~ *** Hierarchy Structure Current Stack: ***
13433 ~  ~ Other Hierarchy
13434 ~  ~ Current Hierarchy
13435 ~  ~ Circuit
13436 ~  ~ Schematic Component with Sub Circuit
13437 ~  ~ Unable to create text, String is too long
13438 ~  ~ Select Circuit:
13439 ~  ~ Select New Circuit:
13440 ~  ~ Current circuit:
13441 ~  ~ From circuit:
13442 ~  ~ Fit
13443 ~  ~ Four sheets
13444 ~  ~ Next page
13445 ~  ~ Single sheet
13446 ~  ~ Previous sheets
13447 ~  ~ Two sheets
13448 ~  ~ X-Off:
13449 ~  ~ Y-Off:
13450 ~  ~ X-Offset
13451 ~  ~ Y-Offset
13452 ~  ~ Sheet(s):
13453 ~  ~ Undefined circuit
13454 ~  ~ Circuit:
13455 ~  ~ Can't create prototype of page frame
13456 ~  ~ Page format
13457 ~  ~ (Sub)circuit:
13458 ~  ~ Can't assign Circuit
13459 ~  ~ as Subcircuit
13460 ~  ~ Check Page Size & Placement Patterns.
13461 ~  ~ Duplicated Sch.Node:
13462 ~  ~ Duplicated Lay.Node:
13463 ~  ~ faulty node removed
13464 ~  ~ empty net removed
13465 ~  ~ Netlist - OK
13466 ~  ~ Netlist - Error(s) Discovered and Fixed
13467 ~  ~ 2. Checking Traces
13468 ~  ~ Trace of Net
13469 ~  ~ faulty trace removed
13470 ~  ~ Traces - OK
13471 ~  ~ Traces - Error(s) Discovered and Fixed
13472 ~  ~ 3. Checking Wires
13473 ~  ~ Wire of Net
13474 ~  ~ faulty wire removed
13475 ~  ~ Wires - OK
13476 ~  ~ Wires - Error(s) Discovered and Fixed
13477 ~  ~ Printing Error
13478 ~  ~ Unable to set X-Offset
13479 ~  ~ Unable to set Y-Offset
13480 ~  ~ Invalid Scale
13481 ~  ~ Printer attributes not available
13482 ~  ~ Pageoutline not defined
13483 ~  ~ Board Outline not defined
13484 ~  ~ Standard Color
13485 ~  ~ Category Color
13486 ~  ~ Name prefix
13487 ~  ~ Orientation Prefix
13488 ~  ~ Custom colors
13489 ~  ~ Solid colors
13490 ~  ~ Hierarchy Structure
13491 ~  ~ Select Repeat Options
13492 ~  ~ Assign Components to Name by Pattern Prefix :
13493 ~  ~ Select Components Orientation by Name Prefix :
13494 ~  ~ Setup Global Parameters
13495 ~  ~ Add bus
13496 ~  ~ Add Member
13497 ~  ~ Delete Member
13498 ~  ~ SchComponents
13499 ~  ~ Pack
13500 ~  ~ RePack
13501 ~  ~ Disconnect from Wire
13502 ~  ~ Disconnect from Net
13503 ~  ~ Delete Wires
13504 ~  ~ Reconnect Wires
13505 ~  ~ Delete Wire
13506 ~  ~ Reconnect Wire
13507 ~  ~ Maps
13508 ~  ~ Menus
13509 ~  ~ Zoom on schematic Component
13510 ~  ~ Layout name:
13511 ~  ~ Option Tools
13512 ~  ~ Schematic view
13513 ~  ~ &Tooltip Text
13514 ~  ~ &Ruler
13515 ~  ~ Long &Cursor
13516 ~  ~ Set Zoom Factor : (Range = 1.1 to 10)
13517 ~  ~ (Range = 1.1 to 10)
13518 ~  ~ Zoom Factor
13519 ~  ~ Name already exists in Project map
13520 ~  ~ Customize...
13521 ~  ~ Customize ToolBar ...
13522 ~  ~ Tools :
13523 ~  ~ &Folders:
13524 ~  ~ List files of type:
13525 ~  ~ Dri&ves:
13526 ~  ~ Disk files
13527 ~  ~ Project files
13528 ~  ~ Bitmaps in Project library:
13529 ~  ~ Check1
13530 ~  ~ Select Repeat Params:
13531 ~  ~ Buses Informations
13532 ~  ~ &New Page
13533 ~  ~ &Clean Page
13534 ~  ~ &Rename Page
13535 ~  ~ &Delete Page
13536 ~  ~ Redo
13537 ~  ~ Select All
13538 ~  ~ For&mat
13539 ~  ~ Function Tools
13540 ~  ~ &Tools
13541 ~  ~ Select the style. Filled is not applicable for line and arc.
13542 ~  ~ Bitmap Name:
13543 ~  ~ Font Name, Size and Pitch:
13544 ~  ~ Pitch:
13545 ~  ~ Gate Number : Group Name
13546 ~  ~ Click on grid to change group
13547 ~  ~ Instant Wire &Label
13548 ~  ~ Page(s)
13549 ~  ~ Align Lefts
13550 ~  ~ Align Centers
13551 ~  ~ Align Rights
13552 ~  ~ Align Tops
13553 ~  ~ Align Middles
13554 ~  ~ Align Bottoms
13555 ~  ~ Horizontal Spacing Make Equal
13556 ~  ~ Horizontal Spacing Increase
13557 ~  ~ Horizontal Spacing Decrease
13558 ~  ~ Horizontal Spacing Remove
13559 ~  ~ Vertical Spacing Make Equal
13560 ~  ~ Vertical Spacing Increase
13561 ~  ~ Vertical Spacing Decrease
13562 ~  ~ Vertical Spacing Remove
13563 ~  ~ Snap selected items
13564 ~  ~ Form Edit
13565 ~  ~ Lefts
13566 ~  ~ Centers
13567 ~  ~ Rights
13568 ~  ~ Tops
13569 ~  ~ Middles
13570 ~  ~ Bottoms
13571 ~  ~ Make Equal
13572 ~  ~ Increase
13573 ~  ~ Decrease
13574~  ~ Aligns the selected objects to the left w.r.t. the last selected object 
13575~  ~ Aligns the selected objects to the center  w.r.t. the last selected object
13576~  ~ Aligns the selected objects to the right w.r.t. the last selected object
13577~  ~ Aligns the tops of selected objects w.r.t the top position of last selected object
13578~  ~ Aligns the middle of selected objects w.r.t the position of last selected object
13579~  ~ Aligns the bottoms of selected objects w.r.t the position of last selected object
13580~  ~ Horizontal Spacing between selected objects are made equal
13581~  ~ Increments the Horizontal Spacing between selected objects
13582~  ~ Decrements the Horizontal Spacing between selected objects
13583~  ~ Removes the Horizontal Spacing between selected objects
13584~  ~ Vertical Spacing between selected objects are made equal
13585~  ~ Increments the Vertical Spacing between selected objects
13586~  ~ Decrements the Vertical Spacing between selected objects
13587~  ~ Removes the Vertical Spacing between selected objects
13588~  ~ Aligns the selected objects to the nearest Snap value selected
13589~  ~ Design Rules level valid for Net 
13590 ~  ~ Delete Bus	
13591 ~  ~ Nets: 	
13592 ~  ~ Apply&&&Connect	
13593 ~  ~ DRC Setup	
13594 ~  ~ &Use Design Rules	
13595 ~  ~ &Bullets	
13596 ~  ~ Select a sub category to set the Design Rules ...	
13597 ~  ~ DRC Setup for Net : 	
13598 ~  ~ DRC Setup for Selected Nets	
13599 ~  ~ DRC Setup for Component : 	
13600 ~  ~ DRC Setup for Selected Components	
13601 ~  ~ Enable/Disable Routing on	
13602 ~  ~ Single Trace Check width	
13603 ~  ~ Component orientation	
13604 ~  ~ Component name placement in reference to component outline frame after orientation	
13605 ~  ~ Component name placement	
13606 ~  ~ Component name orientation (final rotation as visible to the user)	
13607 ~  ~ Component name orientation	
13608 ~  ~ Component name distance from outer frame after orientation	
13609 ~  ~ Component name distance	
13610 ~  ~ Component Snap	
13611 ~  ~ Distance to surrounding components (pad frames)	
13612 ~  ~ Distance to components	
13613 ~  ~ Check distance while placing flag	
13614 ~  ~ Check distance	
13615 ~  ~ As defined in the package	
13616 ~  ~ 0 degrees (Horizontal)	
13617 ~  ~ 90 degrees (Veritical)	
13618 ~  ~ Select Bus to edit	
13619 ~  ~ Select Bus Member	
13620 ~  ~ Add selected Net to Bus
13621 ~  ~ Delete selected Bus Member	
13622 ~  ~ Move selected Bus Member Down	
13623 ~  ~ Move selected Bus Member Up	
13624 ~  ~ Update Bus:	
13625 ~  ~ Bus Editor	
13626 ~  ~ Delete Bus: 	
13627 ~  ~ Members of : 	
13628 ~  ~ Connect to	
13629 ~  ~ Component Left-hand side pins	
13630 ~  ~ Component Right-hand side pins 	
13631 ~  ~ Component Bottom side pins	
13632 ~  ~ Component Top side pins	
13633 ~  ~ Miter Size	
13634 ~  ~ Minimal Length	
13635 ~  ~ Label	
13636 ~  ~ Font Name	
13637 ~  ~ Font Size	
13638 ~  ~ Check for obstacles	
13639 ~  ~ Remove prerouted members	
13640 ~  ~ Redraw while routing	
13641 ~  ~ Page Link for Net: 	
13642 ~  ~ Net/Bus	
13643 ~  ~ Bullets	
13644 ~  ~ Buses: 	
13645 ~  ~ Select Nets to connect
13646 ~  ~ Available schemes  
13647 ~  ~ Autoconnect rules 
13648 ~  ~ Set &Defaults
13649 ~  ~ Connect using following scheme sequence:
13650 ~  ~ Route single pin net link stub wires 
13651 ~  ~ Route straight horizontal pin to pin connections
13652 ~  ~ Route straight vertical pin to pin connections
13653 ~  ~ Route daisy chain connections
13654 ~  ~ Route connections with horizontal escape segments
13655 ~  ~ Route connections with vertical escape segments
13656 ~  ~ Route connections from pins to existing junctions
13657 ~  ~ Route leftover connections from left to right
13658 ~  ~ Route leftover connections from right to left
13659 ~  ~ Route leftover connections as net link stub wires
13660 ~  ~ Attempt to create straight T-connection
13661 ~  ~ Route leftover connections to closest nodes
13662 ~  ~ Attempt to T-connect nodes
13663 ~  ~ Route C-connections
13664 ~  ~ (in progress ..)
13665 ~  ~ Removing existing connections
13666 ~  ~ Routing Net(s)connections
13667 ~  ~ Finished
13668 ~  ~ Autoconnect Wires for Net
13669 ~  ~ Autoconnect Wires - Select Net
13670 ~  ~ Autoconnect Wires
13671 ~  ~ Reroute swapped components' connections?
13672 ~  ~ Rerouting swapped components' connections
13673 ~  ~ Routing connection
13674 ~  ~ Rerouting component connections
13675 ~  ~ Routing Bus Members
13676 ~  ~ Routing Net(s)connections
13677 ~  ~ Scale up
13678 ~  ~ Scale down
13679 ~  ~ Routing single pin net link stub wires
13680 ~  ~ Routing straight horizontal pin to pin connections
13681 ~  ~ Routing straight vertical pin to pin connections
13682 ~  ~ Routing daisy chain connections
13683 ~  ~ Routing connections from pins to existing junctions
13684 ~  ~ Routing connections with vertical escape segments
13685 ~  ~ Routing connections with horizontal escape segments
13686 ~  ~ Routing leftover connections from left to right
13687 ~  ~ Routing left over connections from right to left
13688 ~  ~ Attempt to create straight T-connection
13689 ~  ~ Attempt to T-connect nodes
13690 ~  ~ Routing leftover shortest connections"
13691 ~  ~ Routing leftover connections as net link stub wires
13692 ~  ~ Routing C-connections
13693 ~  ~ Reconnect All
13694 ~  ~ Connect to prerouted
13695 ~  ~ Mode
13696 ~  ~ Minimal Pin Escape
13697 ~  ~ Wire Segment Shove Step
13698 ~  ~ Project :
13699 ~  ~ Schematic Editor (
13700 ~  ~ Design Rules (Selected Net)
13701 ~  ~ Connect Wires
13702 ~  ~ Connect  Wire
13703 ~  ~ &Autoroute "to pin" connections
13704 ~  ~ Reroute component connections after &Move
13705 ~  ~ Delete all conectivity in current circuit.
13706 ~  ~ This will remove all copper, traces and wires. Are you sure?
13707 ~  ~ Unable to load special part
13708 ~  ~ in Schematic editor because it has no symbol
13709 ~  ~ Zoom on component : ( Comp Name / Group No , [Entry Name] [Pinout Text]
13710 ~  ~ Entry not Found:
13711 ~  ~ Number of components in 'LARGE' bin
13712 ~  ~ Number of components in 'MEDIUM' bin
13713 ~  ~ Number of components in 'SMALL' bin
13714 ~  ~ Number of components in 'GROUPED' bin
13715 ~  ~ Number of components in 'DO NOT PLACE' bin
13716 ~  ~ Component description placement
13717 ~  ~ Component description orientation
13718 ~  ~ Component description distance
13719 ~  ~ Component value placement
13720 ~  ~ Component value orientation
13721 ~  ~ Component value distance
13722 ~  ~ Pinout text X displacement
13723 ~  ~ Pinout text Y displacement
13724 ~  ~ Pinout text inside component frame
13725 ~  ~ Component clearance
13726 ~  ~ Placement Rule
13727 ~  ~ Components using symbol:
13728 ~  ~ Placement Rules
13729 ~  ~ Only on Page (Manual Only)
13730 ~  ~ Only Large
13731 ~  ~ Only Medium
13732 ~  ~ Only Small
13733 ~  ~ No Pattern (Manual Only)
13734 ~  ~ Page center
13735 ~  ~ Page lower left corner
13736 ~  ~ Page upper left corner
13737 ~  ~ Page upper right corner
13738 ~  ~ Page lower right corner
13739 ~  ~ As defined in the symbol
13740 ~  ~ Place ALL components in bins outside of the page
13741 ~  ~ Place UNLOCKED components in bins outside of the page
13742 ~  ~ Currently set
13743 ~  ~ Autogroup
13744 ~  ~ Check assignment of Subcircuit nodes
13745 ~  ~ is not a handle to subcircuit
13746 ~  ~ Strategy
13747 ~  ~ Could not copy component value
13748 ~  ~ Sim. Function
13749 ~  ~ EDSpice Model
13750 ~  ~ Mixed Mode Simulation Function
13751 ~  ~ EDSpice Model : [ Element ]  [ Model/Subcircuit ]  [ Variant ]  [ Family ]
13752 ~  ~ Component name on PCB Layout 

13753 ~  ~ Errors encountered while converting Truth Table 
13754 ~  ~ Enter circuit name 
13755 ~  ~ Enter Page name 
13756 ~  ~ Append diagram to current page   
13757 ~  ~ Place diagram in new page 
13758 ~  ~ Create diagram of a new circuit 
13759 ~  ~ Name prefix for inputs 
13760 ~  ~ Name prefix for outputs 
13761 ~  ~ Number of inputs 
13762 ~  ~ Number of outputs 
13763 ~  ~ Number of words 
13764 ~  ~ Format for logic state display 
13765 ~  ~ Import mode 
13766 ~  ~ Auto-place componets 
13767 ~  ~ Auto-route wires 
13768 ~  ~ Truth Table Property 
13769 ~  ~ View file 
13770 ~  ~ Circuit name 
13771 ~  ~ Page name 
13772 ~  ~ Placement Area 
13773 ~  ~ Definition 
13774 ~  ~ Default Page size 
13775 ~  ~ Page width 
13776 ~  ~ Page height 
13777 ~  ~ View table
13778 ~  ~ Select format 
13779 ~  ~ Placement Paremeters 
13780 ~  ~ Wrd 
13781 ~  ~ Set up Truth Table 
13782 ~  ~ Edit Truth Table 
13783 ~  ~ Process Truth Table 
13784 ~  ~ Back
13785 ~  ~ Enter Input Word 
13786 ~  ~ Current value of input word no. 
13787 ~  ~ Enter Output Word 
13788 ~  ~ Current value of output word no. 
13789 ~  ~ Enter word contents as numeric value or in format 
13790 ~  ~ Word", 
13791 ~  ~ Input and Output Name Prefixes can't be the same 
13792 ~  ~ Allowed number of Inputs is from 1 to  
13793 ~  ~ Allowed number of Outputs is from 1 to 
13794 ~  ~ Allowed number of Words is from 1 to 
13795 ~  ~ No more pages allowed 
13796 ~  ~ No more circuits allowed 
13797 ~  ~ - this circuit already exists 
13798 ~  ~ is invalid circuit name 
13799 ~  ~ - this page already exists 
13800 ~  ~ is invalid page name 
13801 ~  ~ Selected name prefix for Inputs will result in not unique net names
13802 ~  ~ Selected name prefix for Outputs will result in not unique net names 

13803 ~  ~ Assign logic function by
13804 ~  ~ Component specific sub-circuit
13805 ~  ~ Component specific model
13806 ~  ~ Set up Inputs/Outputs
13807 ~  ~ Inputs
13808 ~  ~ Outputs
13809 ~  ~ Convert Truth Table to Schematic Diagram
13810 ~  ~ Assign logic function to
13811 ~  ~ No more sub-circuits allowed
13812 ~  ~ Less than 1 input not allowed
13813 ~  ~ Less than 1 output not allowed
13814 ~  ~ Disk error while loading
13815 ~  ~ Incompatible table - mismatch in number of inputs
13816 ~  ~ Incompatible table - mismatch in number of outputs
13817 ~  ~ Saving Truthtable
13818 ~  ~ Loading Truthtable
13819 ~  ~ Enter sub-circuit name
13820 ~  ~ hierarchical sub-circuit
13821 ~  ~ generating MM Simulation Model
13822 ~  ~ generating EDSPice Code Model
13823 ~  ~ VHDL file
13824 ~  ~ Convert VHDL Code to Schematic Diagram
13825 ~  ~ Input Name Prefix can't be numeric
13826 ~  ~ Output Name Prefix can't be numeric
13827 ~  ~ Input Name can't be numeric
13828 ~  ~ Output Name can't be numeric

13829 ~  ~ Plain
13830 ~  ~ Sub-circuit
13831 ~  ~ Inside block
13832 ~  ~ Outside block
13833 ~  ~ Label
13834 ~  ~ Number of inputs (left)
13835 ~  ~ Number of outputs (right)
13836 ~  ~ Number of inputs (top)
13837 ~  ~ Number of outputs (bottom)
13838 ~  ~ Left margin
13839 ~  ~ Right margin
13840 ~  ~ Top margin
13841 ~  ~ Bottom margin
13842 ~  ~ Left inputs pitch
13843 ~  ~ Right outputs pitch
13844 ~  ~ Top inputs pitch
13845 ~  ~ Bottom outputs pitch
13846 ~  ~ Element lenght
13847 ~  ~ Element height
13848 ~  ~ Appearance
13849 ~  ~ Line width for box outline

13850 ~  ~ Visible element label
13851 ~  ~ Text size for element label
13852 ~  ~ Visible I/O labels
13853 ~  ~ Text size for I/O labels
13854 ~  ~ I/O labels placement
13855 ~  ~ Text font for labels
13856 ~  ~ Block Diagram Element Property
13857 ~  ~ I/O labels
13858 ~  ~ Inputs left side
13859 ~  ~ Outputs right side
13860 ~  ~ Inputs top side
13861 ~  ~ Outputs bottom side 
13862 ~  ~ from top
13863 ~  ~ from left
13864 ~  ~ Block Diagram Element Input&Outputs
13865 ~  ~ Name
13866 ~  ~ Create Block Diagram Element 
13867 ~  ~ Settings for Block Diagram Element
13868 ~  ~ Specify Entry Names
13869 ~  ~ More than 256 I/Os not allowed
13870 ~  ~ Element will be too large
13871 ~  ~ Name must be unique
13872 ~  ~ At least one input or output must be defined!
13873 ~  ~ Unspecified sub-circuit name
13874 ~  ~ Element too large
13875 ~  ~ Some I/O names are not specified
13876 ~  ~ EDSPice Code Model generation canceled
13877 ~  ~ EDSPice Code Model not assigned - entry count mismatch
13878 ~  ~ EDSPice Code Model not assigned - entry names missmatch
13879 ~  ~ EDSPice Code Model not assigned - error while assingning model
13880 ~  ~ EDSPice Code Model assigned.

13881 ~  ~ MM Simulator Model generation canceled
13882 ~  ~ MM Simulator Model not assigned - entry count mismatch
13883 ~  ~ MM Simulator Model not assigned - entry names missmatch
13884 ~  ~ MM Simulator Model assigned.
13885 ~  ~ Possible unnecessary duplication with Paste of this block
13886 ~  ~ Do you wish to include Design Notes in Copy?
13887 ~  ~ Warning!
13888 ~  ~ Convert truth table to diagram
13889 ~  ~ Convert VHDL Code to diagram
13890 ~  ~ Added nets:  
13891 ~  ~ Click on nets to add more or press F3 for to run simulation
13892 ~  ~ Digital probe not allowed here
13893 ~  ~ Analog probe not allowed here
13894 ~  ~ Add new sub-circuit and Apply
13895 ~  ~ specific
13896 ~  ~ Horizontal Net/Bus page links
13897 ~  ~ Set up Entity
13898 ~  ~ Process Wirelist
13899 ~  ~ Line too thick
13900 ~  ~ has been recently added to the circuit. Preprocess the circuit
13901 ~  ~ has no parameters to set

13902 ~  ~ Select Data File
13903 ~  ~ Open Circuit File Editor
13904 ~  ~ &Edit Component
13905 ~  ~ Category File Not found
13906 ~  ~ Select Data Folder
13907 ~  ~ Enter Pattern here... Example:-
13908 ~  ~ Interrupt Pattern
13909 ~  ~ Assign analog function
13910 ~  ~ Source sub-circuit
13911 ~  ~ Sub-circuit node list
13912 ~  ~ Select source sub-circuit
13913 ~  ~ View source file
13914 ~  ~ Assigned to symbol
13915 ~  ~ Specific for component
13916 ~  ~ Sub-circuit nodes <-> entries numbers mismatch
13917 ~  ~ Select SPICE Sub-circuit file
13918 ~  ~ Select SPICE Sub-circuit Source file

13919 ~  ~ Filter Designer 
13920 ~  ~ Can't load Filter Profile File 
13921 ~  ~ Page already exists 
13922 ~  ~ Circuit already exist 
13923 ~  ~ Already selected as output net 
13924 ~  ~ Already selected as input net 
13925 ~  ~ Can't load filer circuit file 
13926 ~  ~ Circuit diagram incompatible with selected variant
13927 ~  ~ Results incompatible with selected variant
13928 ~  ~ Page name not set
13929 ~  ~ Sub-circuit name not set
13930 ~  ~ Can't solve net merge
13931 ~  ~ Can't solve calculations

13932 ~  ~ Append filter project to current page
13933 ~  ~ Append filter project in new page
13934 ~  ~ Append filter project as sub-circuit
13935 ~  ~ Calculate Parameters

13936 ~  ~ Import Diagram
13937 ~  ~ Select Filter
13938 ~  ~ View Diagram
13939 ~  ~ Quality value in selected range
13940 ~  ~ Component Parameters

13941 ~  ~ Append options
13942 ~  ~ Filter circuit file
13943 ~  ~ Append mode
13944 ~  ~ Page name
13945 ~  ~ Circuit name
13946 ~  ~ Merge input/output
13947 ~  ~ Connect input to
13948 ~  ~ Connect output to
13949 ~  ~ unknown filter type 
13950 ~  ~ unknown filter variant 
13951 ~  ~ parameter Frequency is invalid 
13952 ~  ~ error while writing to output file 
13953 ~  ~ parameter Real Quality is invalid 
13954 ~  ~ parameter C1 is invalid 
13955 ~  ~ parameter C2 is invalid 
13956 ~  ~ parameter R1 is invalid 
13957 ~  ~ Delete &Unnamed Nets when connection deleted
13958 ~  ~ Instant &Packaging
13959 ~  ~ Redraw on selected XY-coordinates
13960 ~  ~ Design Active Filters
13961 ~  ~ Enter absolute XY-coordinates
13962 ~  ~ Enter XY-displacement from board datum
13963 ~  ~ Enter XY-displacement from current reference point
13964 ~  ~ Format: x,y
13965 ~  ~ Selected component not in GROUPS BIN
13966 ~  ~ XY-Coordinates
13967 ~  ~ Set a new Entry Name
13968 ~  ~ Overlap to Connect
13969 ~  ~ Preprocess
13970 ~  ~ A&ccept
13971 ~  ~ &Create

#FILE = E2KLAYED.EXE  'EDWin 2000 Layout Editor'

141 ~  ~ &Arizona
142 ~  ~ &Buses
143 ~  ~ &Errors
144 ~  ~ &Keep Off Zones
145 ~  ~ &Maxroute
146 ~  ~ &Autoplace
147 ~  ~ &Via Padstack
148 ~  ~ (<Esc> to Cancel)
149 ~  ~ ,none,
1410 ~  ~ - Clearance Check
1411 ~  ~ - fully connected
1412 ~  ~ - Insufficient Memory for Clearance Check
1413 ~  ~ - Insufficient Memory to store error messages
1414 ~  ~ - Invalid Clearance Check Input
1415 ~  ~ - Only first 100 errors reported
1416 ~  ~ . Layer:
1417 ~  ~ :Fanout Test
1418 ~  ~  [Comp.Side]
1419 ~  ~ [Sold.Side]
1420 ~  ~ 1. Pads too Close
1421 ~  ~ 2. Pad on Pad
1422 ~  ~ 3. Pad/Trace/Items too Close
1423 ~  ~ 4. Pad on Trace/Item
1424 ~  ~ 5. Trace/Item too Close
1425 ~  ~ 6. Trace/Item X-sing
1426 ~  ~ 7. Shortcut to copper pour
1427 ~  ~ Alignment
1428 ~  ~ Alignment:
1429 ~  ~ All Nets
1430 ~  ~ All Nets fully connected
1431 ~  ~ All other Nets fully connected
1432 ~  ~ as pre-routed by autorouter
1433 ~  ~ Assign to Pattern by Prefix
1434 ~  ~ Auto&check
1435 ~  ~ Auto&routers
1436 ~  ~ Autore&number
1437 ~  ~ B&ury Vias
1438 ~  ~ Block files(*.ELM)|*.ELM
1439 ~  ~ Boar&d Outline
1440 ~  ~ Board Corner:
1441 ~  ~ Board edge:
1442 ~  ~ Board side of pattern location:
1443 ~  ~ Branch
1444 ~  ~ Branch:
1445 ~  ~ Branch:
1446 ~  ~ BrdChk
1447 ~  ~ Buried &Vias
1448 ~  ~ By X:
1449 ~  ~ By Y:
1450 ~  ~ Can't create prototype of board frame
1451 ~  ~ Can't create symbol for Cell lines
1452 ~  ~ Can't read entry:
1453 ~  ~ Can't read node:
1454 ~  ~ Can't read pin:
1455 ~  ~ Cancel Clearance Check
1456 ~  ~ Cell size too small to compute
1457 ~  ~ Cells:
1458 ~  ~ Change Segment Layer
1459 ~  ~ Change Text Layer
1460 ~  ~ Change Trace Layer
1461 ~  ~ Channel width for Single Trace Check:
1462 ~  ~ Channel:
1463 ~  ~ Check
1464 ~  ~ Check
1465 ~  ~ Check Area too large - Use smaller Check Window
1466 ~  ~ Check layers:
1467 ~  ~ Checking for nonorthogonal traces ...
1468 ~  ~ Checks && Clearances
1469 ~  ~ Clearance Check Canceled
1470 ~  ~ Clearance Check Completed
1471 ~  ~ Clearances between components:
1472 ~  ~ Click on column for Error info
1473 ~  ~ Close all
1474 ~  ~ Columns
1475 ~  ~ Columns:
1476 ~  ~ Comp. Centre
1477 ~  ~ Component Pads
1478 ~  ~ Component side
1479 ~  ~ components on different board sides
1480 ~  ~ Components Placed OutSide the Board OutLine. Cannot Compute Density Graph
1481 ~  ~ Components:
1482 ~  ~ Compute
1483 ~  ~ Connections Density Graph (Actual)
1484 ~  ~ Connections Density Graph (Theoretical)
1485 ~  ~ Connections split in following branches:
1486 ~  ~ Connectivity Test
1487 ~  ~ Connectivity Test O.K
1488 ~  ~ Connectivity/Fanout Test
1489 ~  ~ connects nodes:
1490 ~  ~ Coordinates:
1491 ~  ~ Copper Planes
1492 ~  ~ Creating data for Display
1493 ~  ~ Creating data for Display....
1494 ~  ~ Currently recorded clearance errors:
1495 ~  ~ Delete Error Label text?
1496 ~  ~ Deleting Block ...
1497 ~  ~ Density Graph(Actual)
1498 ~  ~ Density Graph(Theoretical)
1499 ~  ~ part is not the same in:
14100 ~  ~ Direction:
14101 ~  ~ Display
14102 ~  ~ Display BarGraph
14103 ~  ~ Display Components
14104 ~  ~ DRAW
14105 ~  ~ Edit Via Padstack
14106 ~  ~ Edit Via Padstack: #
14107 ~  ~ Clearance Check in progress
14108 ~  ~ Clearance Check Setup
14109 ~  ~ Clearance Error Statistics
14110 ~  ~ Layout Editor
14111 ~  ~ errors recorded
14112 ~  ~ Errors:
14113 ~  ~ Exclude from Test
14114 ~  ~ Fan Out Test
14115 ~  ~ Fanout Test O.K
14116 ~  ~ Faulty Net(s)
14117 ~  ~ First
14118 ~  ~ First pin down
14119 ~  ~ First pin down
14120 ~  ~ First pin left
14121 ~  ~ First pin right
14122 ~  ~ First pin up
14123 ~  ~ for Connectivity
14124 ~  ~ for Fanout
14125 ~  ~ Free Via Pads
14126 ~  ~ FRMACTIVE
14127 ~  ~ gates not of the same type
14128 ~  ~ Generation:
14129 ~  ~ Global parameters
14130 ~  ~ Graphic Items
14131 ~  ~ Hide
14132 ~  ~ Hole Diameter
14133 ~  ~ Include in Fanout Test
14134 ~  ~ is O.K.
14135 ~  ~ La:
14136 ~  ~ Layer Name
14137 ~  ~ LayPlace.DLL
14138 ~  ~ Lower Left
14139 ~  ~ Lower Right
14140 ~  ~ Ls:
14141 ~  ~ Nelist Integrity Check
14142 ~  ~ Net connections splited in following branches:
14143 ~  ~ Net Name :
14144 ~  ~ Net(s)
14145 ~  ~ Net- fully connected
14146 ~  ~ Net Information
14147 ~  ~ Nets tested
14148 ~  ~ new gate create failed
14149 ~  ~ NNET
14150 ~  ~ no gates in
14151 ~  ~ No Layer selected
14152 ~  ~ No Net(s) on Board
14153 ~  ~ No Nets on Board
14154 ~  ~ No Nodes in Schematics
14155 ~  ~ No test selected
14156 ~  ~ No Trace(s) on Board
14157 ~  ~ NonOrthogonal Trace Segment
14158 ~  ~ NonOrthogonal Trace(s)
14159 ~  ~ Nonorthogonal traces detected!
14160 ~  ~ Not Found !
14161 ~  ~ of total
14162 ~  ~ on wrong layer - Bpoint O.K?
14163 ~  ~ Only orthogonal traces are accepted
14164 ~  ~ Pad No. 1
14165 ~  ~ Pad on Pad
14166 ~  ~ Pad on Trace/Item
14167 ~  ~ Pad pitch:
14168 ~  ~ Pad size
14169 ~  ~ Pad to Trace:
14170 ~  ~ Pad/Trace/Items too Close
14171 ~  ~ Pads too Close
14172 ~  ~ PANNOD
14173 ~  ~ Pattern # 4 :
14174 ~  ~ Patterns Off
14175 ~  ~ pin not in gate
14176 ~  ~ Placement Cells ( CS )
14177 ~  ~ Placement Cells ( SS )
14178 ~  ~ Redundant
14179 ~  ~ Renumber Components
14180 ~  ~ Repeating trace
14181 ~  ~ Result
14182 ~  ~ Rows
14183 ~  ~ Rows:
14184 ~  ~ Select Comps Orientations by Name Prefixes
14185 ~  ~ SendMessage
14186 ~  ~ Set Layers
14187 ~  ~ Set Trace Width
14188 ~  ~ SngChk
14189 ~  ~ Solder
14190 ~  ~ Spe&cctra
14191 ~  ~ Split net
14192 ~  ~ Start No.
14193 ~  ~ Stop at first fail
14194 ~  ~ T-connect Same &Layer Only
14195 ~  ~ Test all selected nets
14196 ~  ~ Test Setup
14197 ~  ~ Test Single Net
14198 ~  ~ Tested Net(s) Fully Connected
14199 ~  ~ Testing:
14200 ~  ~ Trace Clearance :
14201 ~  ~ Trace Clearance Check in Progress ...
14202 ~  ~ Trace Integrity Check
14203 ~  ~ Trace to Trace:
14204 ~  ~ Trace Width
14205 ~  ~ Trace Width :
14206 ~  ~ Trace/Items too Close
14207 ~  ~ Trace/Items X-sing
14208 ~  ~ Type in Board Diameter (
14209 ~  ~ Type in prefix:
14210 ~  ~ Type in prefix:
14211 ~  ~  
14212 ~  ~  
14213 ~  ~  
14214 ~  ~  
14215 ~  ~  
14216 ~  ~ Unconnected Node
14217 ~  ~ Unconnected Node(s) :
14218 ~  ~ Unroutes:   Single Net
14219 ~  ~ Upper Left
14220 ~  ~ Upper Right
14221 ~  ~ View Port
14222 ~  ~ Warning! - Not all Nets tested
14223 ~  ~ Use Circle Draw option to draw Circle
14224 ~  ~ Board Size is bigger than Board size Limit
14225 ~  ~ Board outline is not closed at
14226 ~  ~ Unit is Not Matching 
14227 ~  ~ Supporting Units are
14228 ~  ~ 'Decimal' And 'Engineering' for Length and
14229 ~  ~ 'Decimal Degrees' for  Angles
14230 ~  ~ DXF Import
14231 ~  ~ Can't create Panel Dimension Symbol/Package
14232 ~  ~ Net
14233 ~  ~ not found
14234 ~  ~ Selected net:
14235 ~  ~ "Tear Drop" pads
14236 ~  ~ Auto&fanouts
14237 ~  ~ Generate
14238 ~  ~ Setup
14239 ~  ~ Unrouted fanouts on layer:
14240 ~  ~ Total unrouted:
14241 ~  ~ Total to route:
14242 ~  ~ All fanouts generated
14243 ~  ~ Side
14244 ~  ~ Width
14245 ~  ~ Airgap inside Copper Pour
14246 ~  ~ Airgap outside Copper Pour
14247 ~  ~ Via Padstack number
14248 ~  ~ Vias inside Copper Pour
14249 ~  ~ Vias outside Copper Pour
14250 ~  ~ Escape direction
14251 ~  ~ Min. length
14252 ~  ~ Max. length
14253 ~  ~ Check for conflicts
14254 ~  ~ Clearance
14255 ~  ~ Component
14256 ~  ~ Solder
14257 ~  ~ Outward
14258 ~  ~ Inwards
14259 ~  ~ In & Outward
14260 ~  ~ Any
14261 ~  ~ Fanout generation setup
14262 ~  ~ Select Net:
14263 ~  ~ Generate Fanouts for Nets:
14264 ~  ~ Parameter:
14265 ~  ~ Value
14266 ~  ~ Fanout parameters for Net:
14267 ~  ~ Routing:
14268 ~  ~ OK
14269 ~  ~ failed
14270 ~  ~ Left to route:
14271 ~  ~  - trace(s) with no connections to Nodes
14272 ~  ~ Connection splited into following trace branches:
14273 ~  ~ Splited Copper Pour Areas:
14274 ~  ~ Copper Pour Area on Layer:
14275 ~  ~ Unconnected Nodes (unpackaged schematic components):
14276 ~  ~ Testing
14277 ~  ~ fully connected
14278 ~  ~ All selected nets found fully connected
14279 ~  ~ No connections to Nodes
14280 ~  ~ Check Trace Airgaps!
14281 ~  ~ No routed connections!
14282 ~  ~ Net only partially connected!
14283 ~  ~ unconnected Net(s)
14284 ~  ~ CP Branch
14285 ~  ~ Nets selected for test
14286 ~  ~ Check to keep the Node highlighted after close
14287 ~  ~ Results
14288 ~  ~ Test Setup
14289 ~  ~ Unconnected Nodes
14290 ~  ~ Trace Branches
14291 ~  ~ Copper Pour Areas
14292 ~  ~ Node(s) in splited trace branches:
14293 ~  ~ Node(s) in split copper pour 
14294 ~  ~ &Unroutes Off
14295 ~  ~ is fully connected - disconnect trace branch
14296 ~  ~ BlockEdit
14297 ~  ~ Select/Displays current value for angular snap
14298 ~  ~ Redraw on error in current precision
14299 ~  ~ Select/Displays current value for textSize
14300 ~  ~ Line/Trace thickness
14301 ~  ~ Select current line/trace thickness
14302 ~  ~ Current airgap value
14303 ~  ~ Select current radius
14304 ~  ~ Select current ViaPad
14305 ~  ~ Select current net
14306 ~  ~ Pad Frame
14307 ~  ~ CS Pattern
14308 ~  ~ View component side placement patterns
14309 ~  ~ SS Pattern
14310 ~  ~ View solder side placement patterns
14311 ~  ~ View component side placement pattern 1
14312 ~  ~ View component side placement pattern 2
14313 ~  ~ View component side placement pattern 3
14314 ~  ~ View component side placement pattern 4
14315 ~  ~ component side placement pattern Off
14316 ~  ~ View solder side placement pattern 1
14317 ~  ~ View solder side placement pattern 2
14318 ~  ~ View solder side placement pattern 3
14319 ~  ~ View solder side placement pattern 4
14320 ~  ~ solder side placement pattern Off
14321 ~  ~ Tools to work with Traces
14322 ~  ~ Tools to work with Texts
14323 ~  ~ Board Format
14324 ~  ~ Tools to work with Board Outline
14325 ~  ~ Tools to work with Copper item/pour
14326 ~  ~ Via Padstack
14327 ~  ~ Edit currently selected Via Padstack
14328 ~  ~ Comp Side
14329 ~  ~ Layers in Comp Side
14330 ~  ~ Layers in Solder Side
14331 ~  ~ lsize
14332 ~  ~ Patterns
14333 ~  ~ Options for Tear Drop Autogeneration
14334 ~  ~ Autogeneration Options
14335 ~  ~ Selected layer
14336 ~  ~ Sizing Dependent on
14337 ~  ~ Ratio
14338 ~  ~ Components Pad Pitch
14339 ~  ~ Layout Components
14340 ~  ~ Pos X
14341 ~  ~ Pos Y
14342 ~  ~ Gates
14343 ~  ~ Pad Info
14344 ~  ~ Property Lay Components
14345 ~  ~ Segment
14346 ~  ~ Changes Trace width for all selected traces
14347 ~  ~ Changes Air gap for all selected traces
14348 ~  ~ Changes Layer for all selected traces
14349 ~  ~ Gap
14350 ~  ~ Changes Trace width for the whole trace
14351 ~  ~ Changes Air gap for the whole trace
14352 ~  ~ Changes Layer for the whole trace
14353 ~  ~ From (X,Y)
14354 ~  ~ To (X,Y)
14355 ~  ~ Starting (X,Y)
14356 ~  ~ Ending (X,Y)
14357 ~  ~ Property Traces(Layout)
14358 ~  ~ Changes Status for all traces in selected Nets
14359 ~  ~ Changes Trace width for all traces in selected Nets
14360 ~  ~ Changes Air gap for all traces in selected Nets
14361 ~  ~ Changes Layer for all traces in selected Nets
14362 ~  ~ Changes Name of the selected Net
14363 ~  ~ Layout component name
14364 ~  ~ Layout component pin number
14365 ~  ~ Trace connection exists for the node
14366 ~  ~ Schematic component name
14367 ~  ~ Schematic component entry name
14368 ~  ~ Wire connection exists for the node
14369 ~  ~ Schematic component in page
14370 ~  ~ LCOMPNAME
14371 ~  ~ Property Nets(Layout)
14372 ~  ~ Package & Description :
14373 ~  ~ PCB Layout Properties
14374 ~  ~ Board Size Horizontal
14375 ~  ~ Board Size Vertical
14376 ~  ~ Number of Components
14377 ~  ~ Number of SMD Pads
14378 ~  ~ Number of PMD Pads
14379 ~  ~ Total Trace Segments
14380 ~  ~ Total Pad Items
14381 ~  ~ Total Copper Items
14382 ~  ~ Total Holes
14383 ~  ~ Total Keep Off Zone
14384 ~  ~ Layers (Used / Total)
14385 ~  ~ Total Connections
14386 ~  ~ UnRouted Connections
14387 ~  ~ Percentage Routed
14388 ~  ~ Copy Block to Clipboard
14389 ~  ~ Assign Comps to Name by Pattern Prefix :
14390 ~  ~ Disconnect from Trace
14391 ~  ~ Delete Traces
14392 ~  ~ Reconnect Traces
14393 ~  ~ Tooltip Text
14394 ~  ~ Stop routing
14395 ~  ~ View Component Outline
14396 ~  ~ List of Unroutes
14397 ~  ~ View List of Unroutes
14398 ~  ~ Unroute All
14399 ~  ~ View All Unroutes
14400 ~  ~ Unroute Net
14401 ~  ~ View Unroute Net
14402 ~  ~ Mitering fixed traces?
14403 ~  ~ &User Lay Prefix
14404 ~  ~ Trace Segment Length
14405 ~  ~ Error Statistics
14406 ~  ~ Unroutes Off
14407 ~  ~ Not fully connected
14408 ~  ~ All selected nets not found fully connected
14409 ~  ~ Click 'Test' to Start Test on Selected Nets
14410 ~  ~ Click to view this net
14411 ~  ~ Check to keep the Branch highlighted after close
14412 ~  ~ Check to keep the Copper highlighted after close
14413 ~  ~ Check to keep the Unroutes highlighted after close
14414 ~  ~ Node(s) in split branches
14415 ~  ~ Test Params
14416 ~  ~ Net being Tested:
14417 ~  ~ Click Test to Start Testing
14418 ~  ~ for Connectivity Test
14419 ~  ~ Select Nets for Connectivity Test
14420 ~  ~ Display errors
14421 ~  ~ List of clearance errors found:-
14422 ~  ~ Total errors:
14423 ~  ~ Give a layout prefix
14424 ~  ~ Input a prefix value for new layout component created
14425 ~  ~ Enter part name to create component
14426 ~  ~ Part name, [X],[Y],[Rotation]
14427 ~  ~ Select via padstack
14428 ~  ~ Net Trace &Integrity 
14429 ~  ~ Delete trace
14430 ~  ~ Reconnect Trace
14431 ~  ~ Placement outside board outline
14432 ~  ~ Percentage Placed
14433 ~  ~ Circuit Design Rules changed!
14434 ~  ~ Project Design Rules changed!
14435 ~  ~ 
14436 ~  ~ Function locked by Desing Rules: 
14437 ~  ~ Function(s) locked by Desing Rules: 
14438 ~  ~ Bpoint O.K?
14439 ~  ~ Checking for Design Rules Violations
14440 ~  ~ Design Rules Violations detected 
14441 ~  ~ No Design Rules Violations detected 
14442 ~  ~ Design Rules level valid for Net
14443 ~  ~ Design Rules Check results
14444 ~  ~ Design Rules Check results for selected Net
14445 ~  ~ Design Rules violation(s) for selected Trace
14446 ~  ~ Design Rules Violations 
14447 ~  ~ Violations detected in Nets
14448 ~  ~ Violations
14449 ~  ~ Detected
14450 ~  ~ Total
14451 ~  ~ Click on Net Name to see the details
14452 ~  ~ Total number of Design Rules violations detected in recent test
14453 ~  ~ In Net
14454 ~  ~ Click on Trace #n to see the details
14455 ~  ~ Total number of Design Rules violations detected in this net
14456 ~  ~ Wrong routing layer
14457 ~  ~ Trace segment detected on layer disabled for routing 
14458 ~  ~ Routing disabled on
14459 ~  ~ Wrong routing direction
14460 ~  ~ Most of trace segments are routed in other direction than allowed for layer
14461 ~  ~ segments in right direction
14462 ~  ~ segments in wrong direction
14463 ~  ~ Wrong via padstack
14464 ~  ~ This via uses other padstack than specified
14465 ~  ~ Should be:
14466 ~  ~ Found:
14467 ~  ~ Layer change through via
14468 ~  ~ Changing routing layers through via holes is disallowed
14469 ~  ~ Too many vias
14470 ~  ~ More than specified number of vias for pin-to-pin connection
14471 ~  ~ DR specified: 
14472 ~  ~ Trace segment too wide
14473 ~  ~ Detected trace segment with width greater than allowed
14474 ~  ~ Trace segment too thin
14475 ~  ~ Detected trace segment with width less than allowed
14476 ~  ~ Trace segment too long
14477 ~  ~ Detected trace segment longer than allowed
14478 ~  ~ Trace too long
14479 ~  ~ Detected trace longer than allowed
14480 ~  ~ Airgap too wide
14481 ~  ~ Detected trace segment with air gap greater than allowed
14482 ~  ~ Airgap too narrow
14483 ~  ~ Detected trace segment with air gap less than allowed
14484 ~  ~ Check Clearances
14485 ~  ~ Check other DR Violations
14486 ~  ~ Selected Components
14487 ~  ~ Number of Nodes
14488 ~  ~ UnRouted Nets
14489 ~  ~ UnRouted Nodes
14490 ~  ~ Default component orientation
14491 ~  ~ Default component orientation as defined in the package
14492 ~  ~ Default component text placement
14493 ~  ~ Default component text placement as defined in the package
14494 ~  ~ Default component text orientation
14495 ~  ~ Default component text orientation as defined in the package
14496 ~  ~ Component is oriented such that pin number 1 is always on top
14497 ~  ~ Pin number 1 Bottom 
14498 ~  ~ Component is oriented such that pin number 1 is always on bottom
14499 ~  ~ Pin number 1 Left
14500 ~  ~ Pin number 1 Top
14501 ~  ~ Component is oriented such that pin number 1 is always on left
14502 ~  ~ Pin number 1 Right
14503 ~  ~ Component is oriented such that pin number 1 is always on right 
14504 ~  ~ Component text on Top
14505 ~  ~ Component text is placed on top in reference to component outline
14506 ~  ~ Component text on Bottom
14507 ~  ~ Component text is placed on bottom in reference to component outline
14508 ~  ~ Component text on Left
14509 ~  ~ Component text is placed on left in reference to component outline 
14510 ~  ~ Component text on Right 
14511 ~  ~ Component text is placed on right in reference to component outline 
14512 ~  ~ Component text orientation Horizontal 
14513 ~  ~ Component text is oriented such that it is always Horizontal 
14514 ~  ~ Component text orientation Vertical 
14515 ~  ~ Component text is oriented such that it is always Vertical 
14516 ~  ~ Net/Trace 
14517 ~  ~  ) exchanged with new part 
14518 ~  ~ Switching from layer : 
14519 ~  ~ to DR allowed layer : 
14520 ~  ~ Shortcut to copper pour
14521 ~  ~ 'Tear drop' items will be removed!. 
14522 ~  ~ Reroute whole net 
14523 ~  ~ in Layout editor because it has no package
14524 ~  ~ Routing attempt failed.
14525 ~  ~ Routed pairs count: 
14526 ~  ~ Unrouted pairs count: 
14527 ~  ~ Routing attempt successfull. 
14528 ~  ~ Routing attempt partially successfull.
14529 ~  ~ Delete all conectivity in current circuit.
14530 ~  ~ This will remove all copper, traces and wires. Are you sure?
14531 ~  ~ Reroute component connections?
14532 ~  ~ Use clearances as in design rules for layers
14533 ~  ~ On line check
14534 ~  ~ Routing layer && directions 
14535 ~  ~ Traces on wrong layer(s)
14536 ~  ~ Traces routed in wrong direction
14537 ~  ~ Via rules 
14538 ~  ~ Wrong via hole padstack
14539 ~  ~ Layer change through via hole
14540 ~  ~ Too many vias on pin to pin connection
14541 ~  ~ Trace rules 
14542 ~  ~ Traces with width greater than max. allowed
14543 ~  ~ Traces with width less than min. allowed
14544 ~  ~ Trace segments longer than max. allowed
14545 ~  ~ Traces longer than max. allowed
14546 ~  ~ Traces with air gap greater than max. allowed
14547 ~  ~ Traces with air gap less than min. allowed
14548 ~  ~ Errors : 0 - found in item too close.
14549 ~  ~ Design Rules (Selected Component)
14550 ~  ~ Design Rules (All selected Components)
14551 ~  ~ Check this Component
14552 ~  ~ Check all these Components
14553 ~  ~ Design Rules (Selected Net)
14554 ~  ~ Check this Net
14555 ~  ~ Check all these Nets
14556 ~  ~ Design Rules (All selected Nets)
14557 ~  ~ 8. NonOrthogonal Trace(s)
14558 ~  ~ 1. Checking Netlist
14559 ~  ~ 4. Checking Vias
14560 ~  ~ Via id: 
14561 ~  ~ Padstack Id: 
14562 ~  ~ Usage of Via Padstacks
14563 ~  ~ unknown padstack
14564 ~  ~ Vias - OK
14565 ~  ~ Vias - Error(s) Discovered and Fixed
14566 ~  ~ Clearance Check Canceled 
14567 ~  ~ Clearance Check Completed
14568 ~  ~ All &Visible for net - 
14569 ~  ~ INNET
14570 ~  ~ PADINFO
14571 ~  ~ Node(s) in split copper pour...
14572 ~  ~ Generate
14573 ~  ~ As defined in package
14574 ~  ~ Component Text Horizontal
14575 ~  ~ Component Text Vertical
14576 ~  ~ Zoom on component: ( Comp Name,[Pin Number] ) 
14577 ~  ~ Miter autorouted connections
14578 ~  ~ Polygon
14579 ~  ~ Create Cutout
14580 ~  ~ Create Placer Keepoff zone
14581 ~  ~ Create Router Keepoff zone
14582 ~  ~ Create Regions
14583 ~  ~ Clear all cutout items
14584 ~  ~ Clear all placer Keepoff zone items
14585 ~  ~ Clear all router Keepoff zone items
14586 ~  ~ Clear all regions items
14587 ~  ~ Clear all templates items
14588 ~  ~ CutOuts
14589 ~  ~ View CutOuts
14590 ~  ~ Placer Keep Off Zone
14591 ~  ~ View Placer Keep Off Zone
14592 ~  ~ Router Keep Off Zone
14593 ~  ~ View Router Keep Off Zone
14594 ~  ~ Regions
14595 ~  ~ View Regions
14596 ~  ~ Templates
14597 ~  ~ View Templates
14598 ~  ~ Keep already routed connections unchanged?
14599 ~  ~ Cutout
14600 ~  ~ Placer Keep Off Zone
14601 ~  ~ Router Keep Off Zone
14602 ~  ~ Component Pin
14603 ~  ~ Testpad Surface
14604 ~  ~ Testpad Through Hole
14605 ~  ~ Via pad
14606 ~  ~ No access
14607 ~  ~ No probe
14608 ~  ~ Preferred
14609 ~  ~ Mandatory
14610 ~  ~  Type
14611 ~  ~  Access
14612 ~  ~  Probe dX
14613 ~  ~  Probe dY
14614 ~  ~ Set/Reset Test Point
14615 ~  ~ Test Point type
14616 ~  ~ Test Point access
14617 ~  ~ Test Point Probe X offset
14618 ~  ~ Test Point Probe Y offset
14619 ~  ~ Voltage
14620 ~  ~ Frequency
14621 ~  ~ Changes voltage value for selected Nets
14622 ~  ~ Changes change frequency for selected Nets
14623 ~  ~ Changes voltage value for selected Net
14624 ~  ~ Changes change frequency for selected Net
14625 ~  ~ Intersecting or Invalid boundaries
14626 ~  ~ Polygon too complex to be created
14627 ~  ~ Alignment and Orientation
14628 ~  ~ Auto Placer
14629 ~  ~ Tools for Auto Placers
14630 ~  ~ Creating Component Placement List
14631 ~  ~ Searching for empty cells
14632 ~  ~ Creating Component Placement List
14633 ~  ~ Enter Component Name
14634 ~  ~ No match for group template. Relocate group template
14635 ~  ~ Enter Component Name
14636 ~  ~ Placement interrupted
14637 ~  ~ Placement completed
14638 ~  ~ No more connected components in bins. Relocate 
14639 ~  ~ Intersecting or Invalid boundaries
14640 ~  ~ Polygon too complex to be created
14641 ~  ~ For: 
14642 ~  ~ placing: 
14643 ~  ~ Number of placed components
14644 ~  ~ Number of components in 'TOP LARGE' bin 
14645 ~  ~ Number of components in 'TOP MEDIUM' bin  
14646 ~  ~ Number of components in 'TOP SMALL' bin   
14647 ~  ~ Number of components in 'BOTTOM LARGE' bin
14648 ~  ~ Number of components in 'BOTTOM MEDIUM' bin
14649 ~  ~ Number of components in 'BOTTOM SMALL' bin
14650 ~  ~ Number of components in 'GROUPED' bin
14651 ~  ~ Number of components in 'DO NOT PLACE'
14652 ~  ~ Total area covered by pads 
14653 ~  ~ Area covered by pads on top side 
14654 ~  ~ Area covered by pads on bottom side 
14655 ~  ~ Total area covered by packages 
14656 ~  ~ Area covered by packages on top side
14657 ~  ~ Area covered by packages on bottom side
14658 ~  ~ Outer margin
14659 ~  ~ Top margin
14660 ~  ~ Bottom margin
14661 ~  ~ Left margin
14662 ~  ~ Right margin
14663 ~  ~ Search sequence
14664 ~  ~ Include components connected by Pwr/Gnd nets
14665 ~  ~ Placement pattern
14666 ~  ~ Pattern X-offset
14667 ~  ~ Pattern Y-offset
14668 ~  ~ Freeze current pattern
14669 ~  ~ Allow placement inside component
14670 ~  ~ Prefer number of connection in multi-bin search
14671 ~  ~ Include components connected by Pwr/Gnd nets
14672 ~  ~ Preferred placement pattern
14673 ~  ~ Allow other patterns
14674 ~  ~ Preferred direction
14675 ~  ~ Allow top&bottom component overlap
14676 ~  ~ Allow placement inside SMD component
14677 ~  ~ Allow placement inside PMD component
14678 ~  ~ Allow placement of SMD components inside
14679 ~  ~ Allow placement of PMD components inside
14680 ~  ~ Scope
14681 ~  ~ Valid DR
14682 ~  ~ Component orientation
14683 ~  ~ Component name placement
14684 ~  ~ Component name orientation
14685 ~  ~ Component name distance
14686 ~  ~ Component Snap
14687 ~  ~ Distance to layout component
14688 ~  ~ Check distance
14689 ~  ~ Unknown
14690 ~  ~ Circuit
14691 ~  ~ Parts/Components using package:
14692 ~  ~ Components using part:
14693 ~  ~ Component: 
14694 ~  ~ Placement Parameters
14695 ~  ~ General
14696 ~  ~ Manual
14697 ~  ~ Autoplace
14698 ~  ~ Packages
14699 ~  ~ Parts
14700 ~  ~ None
14701 ~  ~ Placement parameters & Design Rules
14702 ~  ~ Relocate selected (Manual Only)
14703 ~  ~ Large->Medium->Small
14704 ~  ~ Small->Medium->Large
14705 ~  ~ Only on Board (Manual Only)
14706 ~  ~ Only Large Top Side
14707 ~  ~ Only Medium TopSide
14708 ~  ~ Only Small Top Side
14709 ~  ~ Only Large Bottom Side
14710 ~  ~ Only Medium Bottom Side
14711 ~  ~ Only Small Bottom Side
14712 ~  ~ All bins (Manual Only)
14713 ~  ~ No Pattern (Manual Only)
14714 ~  ~ Clockwise around component
14715 ~  ~ Counter clockwise around component
14716 ~  ~ Component frame center
14717 ~  ~ Component frame lower left corner
14718 ~  ~ Component frame upper left corner
14719 ~  ~ Component frame upper right corner
14720 ~  ~ Component frame lower right corner
14721 ~  ~ Board center
14722 ~  ~ Board lower left corner
14723 ~  ~ Board upper left corner
14724 ~  ~ Board upper right corner
14725 ~  ~ Board lower right corner
14726 ~  ~ Proportional
14727 ~  ~ Any direction
14728 ~  ~ Left from selected component
14729 ~  ~ Right from selected component
14730 ~  ~ Above selected component
14731 ~  ~ Below selected component
14732 ~  ~ Centered
14733 ~  ~ Creating Component Placement List
14734 ~  ~ Place ALL components in bins outside of the board
14735 ~  ~ Place UNLOCKED components in bins outside of the board
14736 ~  ~ &Check all these Nets again
14737 ~  ~ Check this Net again
14738 ~  ~ Design Rules (&All Checked Nets)
14739 ~  ~ Design Rules (&Net)
14740 ~  ~ Focus
14741 ~  ~ Popup
14742 ~  ~ Cut Outs
14743 ~  ~ Placer Keep OFF Zone
14744 ~  ~ Regions
14745 ~  ~ Router Keep OFF Zone
14746 ~  ~ Template
14747 ~  ~ only one record
14748 ~  ~ Intersecting or Invalid boundaries
14749 ~  ~ 
14750 ~  ~ Establishing connectivity
14751 ~  ~ Snap components within placement cells
14752 ~  ~ Next hub component selection
14753 ~  ~ Already placed
14754 ~  ~ Chain placed 
14755 ~  ~ Select always most connected
14756 ~  ~ reference to not existing node
14757 ~  ~ reference to unreadable node
14758 ~  ~ reference to not existing component
14759 ~  ~ reference to not existing pin
14760 ~  ~ reference to not existing via
14761 ~  ~ reference to not existing bend point
14762 ~  ~ Solder Side
14763 ~  ~ Rectangular
14764 ~  ~ X position
14765 ~  ~ Y position
14766 ~  ~ Line width
14767 ~  ~ Number of Sides
14768 ~  ~ Side length
14769 ~  ~ X vertex
14770 ~  ~ Y vertex
14771 ~  ~ dX from vertex
14772 ~  ~ dY from vertex
14773 ~  ~ X arcvertex
14774 ~  ~ Y arcvertex
14775 ~  ~ X Arc centre
14776 ~  ~ Y Arc centre
14777 ~  ~ Start angle
14778 ~  ~ Arc angle
14779 ~  ~ Vertex [Arc]
14780 ~  ~ Vertex
14781 ~  ~ Margin thickness
14782 ~  ~ Use item own color
14783 ~  ~ Retain mitering?
14784 ~  ~ 3D Board Viewer
14785 ~  ~ 3D Trace Viewer
14786 ~  ~ Tools to work with 3D Board Viewer
14787 ~  ~ Tools to work with 3D Trace Viewer
14788 ~  ~ Roll
14789 ~  ~ Pitch
14790 ~  ~ Yaw
14791 ~  ~ From West
14792 ~  ~ From East
14793 ~  ~ From South
14794 ~  ~ From North
14795 ~  ~ Create Templates
14796 ~  ~ Point
14797 ~  ~ X - First
14798 ~  ~ Y - First
14799 ~  ~ Delta X
14800 ~  ~ Delta Y
14801 ~  ~ X - Last
14802 ~  ~ Y - Last
14803 ~  ~ Trace Electrical Properties
14804 ~  ~ Vertex: 
14805 ~  ~ Component Display
14806 ~  ~ Board Display
14807 ~  ~ General Display
14808 ~  ~ Display node markers
14809 ~  ~ 3D Items&Polyshapes
14810 ~  ~ Auto-adjust cursor size
14811 ~  ~ Cursor Axis length
14812 ~  ~ Highlighting
14813 ~  ~ LARGE COMPONENTS BIN (TOP SIDE)
14814 ~  ~ MEDIUM COMPONENTS BIN (TOP SIDE)
14815 ~  ~ SMALL COMPONENTS BIN (TOP SIDE)
14816 ~  ~ LARGE COMPONENTS BIN (BOTTOM SIDE)
14817 ~  ~ MEDIUM COMPONENTS BIN (BOTTOM SIDE)
14818 ~  ~ SMALL COMPONENTS BIN (BOTTOM SIDE)

14819 ~  ~ Connections
14820 ~  ~ Tools to work with Nets&Traces
14821 ~  ~ Part
14822 ~  ~ Component

14823 ~  ~ Enter New category name:
14824 ~  ~ Category name
14825 ~  ~ Delete Category:
14826 ~  ~ Allow absolute Pin Swap?
14827 ~  ~ Split Net
14828 ~  ~ Properties
14829 ~  ~ Display
14830 ~  ~ 
14831 ~  ~ tested selected pour layer only, min. allowed bottleneck:
14832 ~  ~ tested all layers with net connections, min. allowed bottleneck:
14833 ~  ~ no fault with copper pour detected

14834 ~  ~ Can't route - pad outside of board detected
14835 ~  ~ Option to merge new net to existing net after split
14836 ~  ~ Merge to selected net:
14837 ~  ~ Option to merge new net to existing net after node transfer
14838 ~  ~ Tested selected pour layer only
14839 ~  ~ Tested all layers with net connections
14840 ~  ~ Min. allowed bottleneck
14841 ~  ~ layer:
14842 ~  ~ Cu pour areas overlap at selected flood point
14843 ~  ~ Select net and layer for test from the list below:
14844 ~  ~ No Cu pour area selected for test at this flood point
14845 ~  ~ Testing:
14846 ~  ~ flood through all layers?
14847 ~  ~ Applied pour precision
14848 ~  ~ min. allowed bottleneck:
14849 ~  ~ applied pour precision
14850 ~  ~ change of layer without via
14851 ~  ~ Cu pour area(s) found at flood point
14852 ~  ~ Preparing layer for test
14853 ~  ~ Can't route to this point.
14854 ~  ~ Pad in the same connection branch or in other net
14855 ~  ~ Trace in the same connection branch or in other net
14856 ~  ~ Routing attempt failed
14857 ~  ~ Clearing and re-routing connection in zone
14858 ~  ~ Delete Keep off Zone?
14859 ~  ~ This pin is not a node!
14860 ~  ~ is fully connected
14861 ~  ~ Attempt to connect failed. Try another point?
14862 ~  ~ Can't find any point for connection of this node
14863 ~  ~ Removing redundant via will affect traces on the whole booard.
14864 ~  ~ Lead-Outs without terminals will be removed.
14865 ~  ~ Removing redundant vias.
14866 ~  ~ Redundant vias removed
14867 ~  ~ Mitering applies to all traces on the board.
14868 ~  ~ Attempt to correct conflicts
14869 ~  ~ Re-route by nets
14870 ~  ~ Re-route by node pairs
14871 ~  ~ Prerouted traces Fixed
14872 ~  ~ Prerouted traces UnFixed
14873 ~  ~ Don't insert terminal
14874 ~  ~ Insert terminal
14875 ~  ~ Bending point
14876 ~  ~ Via
14877 ~  ~ Thruhole pad as Via
14878 ~  ~ Surface top layer
14879 ~  ~ Surface bottom layer
14880 ~  ~ Same layer as origin pad only
14881 ~  ~ All routing layers as in DR
14882 ~  ~ Top layer only
14883 ~  ~ Bottom layer only
14884 ~  ~ Selected below:
14885 ~  ~ Preferred mode
14886 ~  ~ Miter 45 degrees
14887 ~  ~ Terminate with
14888 ~  ~ Type of inserted terminal
14889 ~  ~ Preferred routing layer SMD pads
14890 ~  ~ Preferred routing layer PMD pads
14891 ~  ~ Selected layer
14892 ~  ~ Components in Re-reroute List
14893 ~  ~ Action
14894 ~  ~ Remove Selected
14895 ~  ~ Clear Re-reroute List
14896 ~  ~ Re-route connections
14897 ~  ~ Currently Inserted Lead-Out Terminals
14898 ~  ~ Remove mode
14899 ~  ~ Selected Terminals
14900 ~  ~ Selected Lead-Outs
14901 ~  ~ All Terminals
14902 ~  ~ All Lead-Outs
14903 ~  ~ Preferences for Auto-connect functions
14904 ~  ~ Auto-connect settings&&lists 
14905 ~  ~ Nets&&Components
14906 ~  ~ Lead_Outs
14907 ~  ~ Clear Re-route List?
14908 ~  ~ Re-routing connections for components in list
14909 ~  ~ Remove all Lead-Out Terminals?
14910 ~  ~ Remove all Lead-Outs?
14911 ~  ~ Remove selected components from Re-route List?
14912 ~  ~ Remove selected Lead-Out Terminals?
14913 ~  ~ Remove selected Lead-Outs?
14914 ~  ~ Re-route by net objects
14915 ~  ~ Clearance Errors Detected
14916 ~  ~ Duplicated Node Id: 
14917 ~  ~ Online Trace Clearance Check
14918 ~  ~ Ratsnest for unconnected node only
14919 ~  ~ Circular
14920 ~  ~ Check connectivity to copper pour
14921 ~  ~ Check shortcuts to copper pour
14922 ~  ~ Trace properties
14923 ~  ~ Total trace length (with average width)
14924 ~  ~ Minimal width
14925 ~  ~ Maximal width
14926 ~  ~ Width after trim (average)
14927 ~  ~ Number of segments
14928 ~  ~ Net properties
14929 ~  ~ Total connection length (with average width)
14930 ~  ~ Maximal connection length as in DR
14931 ~  ~ Can't fix more clearance errors
14932 ~  ~ Correction attempt failed
14933 ~  ~ No more trace clearance error found
14934 ~  ~ No clearance errors recorded for this trace
14935 ~  ~ Clearance Errors still found
14936 ~  ~ This is not trace clearance error
14937 ~  ~ Rip-up and reroute failed
14938 ~  ~ Insert trimming segements?
14939 ~  ~ Trimming length unspecified
14940 ~  ~ Trimming length less or equal current trace length
14941 ~  ~ Calculated amplitude bigger than specified maximal amplitude:
14942 ~  ~ No space to fit the trim from this point
14943 ~  ~ Step length adjusted to fit remaining length.
14944 ~  ~ Trimming segments inserted. Click to accept
14945 ~  ~ Point with cursor on the trace where to insert trimming segements
14946 ~  ~ Select second trace for equalizing lengths
14947 ~  ~ Miter corners?
14948 ~  ~ Remove taper for all trace segments connected to pads
14949 ~  ~ is not fully connected
14950 ~  ~ Change assignment to
14951 ~  ~ Selected component not in GROUPS BIN
14952 ~  ~ no shortcuts with copper pour detected
14953 ~  ~ Currently in
14954 ~  ~ Remove assignment?
14955 ~  ~ Currently not assigned. 
14956 ~  ~ Assign to:
14957 ~  ~ XY-Coordinates
14958 ~  ~ Edit Padstack
14959 ~  ~ Redraw on selected XY-coordinates
14960 ~  ~ Trace Frames
14961 ~  ~ View traces in frame format
14962 ~  ~ Enter absolute XY-coordinates
14963 ~  ~ Enter XY-displacement from board datum
14964 ~  ~ Enter XY-displacement from current reference point
14965 ~  ~ Format: x,y
14966 ~  ~ Automatic trace project function active !
14967 ~  ~ Correct clearance errors?
14968 ~  ~ Width after trim (average both traces)
14969 ~  ~ Width after trim (average all traces)
14970 ~  ~ Number of traces
14971 ~  ~ Setable electrical properties
14972 ~  ~ Voltage (V)
14973 ~  ~ Frequency (Hz)
14974 ~  ~ Cu thickness (meters)
14975 ~  ~ Calculated electrical properties
14976 ~  ~ Resistance (Ohm)
14977 ~  ~ Capacitance (F)
14978 ~  ~ Inductance (H)
14979 ~  ~ Impedance (Ohm)
14980 ~  ~ Place trimming pattern
14981 ~  ~ Place trimming 
14982 ~  ~ Miter
14983 ~  ~ Miter coefficient as fraction of step length (0.25<=Mf<0.5)
14984 ~  ~ Maximal amplitude
14985 ~  ~ Maximal step length
14986 ~  ~ Trim to length
14987 ~  ~ With average width
14988 ~  ~ Value for trimmed length unreasonably large
14989 ~  ~ Value for trimmed length should be greater than current trace length
14990 ~  ~ Value for trimmed length should be greater than current net connections length
14991 ~  ~ Amplitute should not be less then average trace width
14992 ~  ~ Step length should not be less than average trace width
14993 ~  ~ Miter coeficient should be in the range from 0.25 to less than 0.50
14994 ~  ~ Wrong voltage value
14995 ~  ~ Wrong frequency value
14996 ~  ~ Wrong average width
14997 ~  ~ Following variables are not set:
14998 ~  ~ Signals
14999 ~  ~ PWR/GND (ref.)
141000 ~  ~ Mixed (ref)
141001 ~  ~ Core
141002 ~  ~ Pre-Preg
141003 ~  ~ Stack Layers
141004 ~  ~ Type
141005 ~  ~ Material
141006 ~  ~ Permittivity (Epsilon r)
141007 ~  ~ Thickness of the material (H)
141008 ~  ~ Cu thickness (T)
141009 ~  ~ Manufacturer
141010 ~  ~ No components to renumber:
141011 ~  ~ Cannot trimm.
141012 ~  ~ Selected traces have equal length
141013 ~  ~ Schematics objects from copied block were placed on pages listed below:
141014 ~  ~ All segements of the same width - nothing to taper
141015 ~  ~ This is an element of system library - cannot be removed
141016 ~  ~ No traces or copper pour areas found on any layer
141017 ~  ~ is set as reference layer
141018 ~  ~ is dielectric
141019 ~  ~ has no adjacent reference layer in the stack
141020 ~  ~ none of implemented formulas apply
141021 ~  ~ also in
141022 ~  ~ Total trace length:
141023 ~  ~ Autocheck Setup
141024 ~  ~ Select layer(s)
141025 ~  ~ Conflict details:
141026 ~  ~ Trace:
141027 ~  ~ Copper element:
141028 ~  ~ RECTANGLE
141029 ~  ~ CIRCLE
141030 ~  ~ Preparing connectivity statistics ... 
141031 ~  ~ GROUPS BIN must contain more than one component
141032 ~  ~ Shorter trace properties
141033 ~  ~ Trim trace length
141034 ~  ~ First trace for length eqaulizing
141035 ~  ~ Eqaulize length of two traces
141036 ~  ~ Trim net connection length
141037 ~  ~ On one side of the trace
141038 ~  ~ On both sides of the trace
141039 ~  ~ To the left
141040 ~  ~ To the right
141041 ~  ~ Reset to original average width
141042 ~  ~ Set length from DRs
141043 ~  ~ Vias with this padstack found in project:
141044 ~  ~ (max 16 characters)
141045 ~  ~ Or enter
141046 ~  ~ to remove label
141047 ~  ~ Changing Via Padstack Label
141048 ~  ~ Microstrip
141049 ~  ~ Embedded Microstrip
141050 ~  ~ MICROSTRIP
141051 ~  ~ EMBEDDED MICROSTRIP
141052 ~  ~ Stripline
141053 ~  ~ Dual Stripline
141054 ~  ~ Calculate variable:
141055 ~  ~ Variable
141056 ~  ~ Click to select variable
141057 ~  ~ Make new stack?
141058 ~  ~ Stack Design
141059 ~  ~ Stack Design Report
141060 ~  ~ LAYER:
141061 ~  ~ none of implemented formulas apply for this layer
141062 ~  ~ STRIPLINE
141063 ~  ~ DUAL STRIPLINE
141064 ~  ~ dielectric (Core)
141065 ~  ~ dielectric(Pre-preg)
141066 ~  ~ (Signal)
141067 ~  ~ (PWR/GND Reference layer)
141068 ~  ~ (Mixed)
141069 ~  ~ (Mixed Reference layer)
141070 ~  ~ Remove
141071 ~  ~ from stack?
141072 ~  ~ is already in the library
141073 ~  ~ Overwite?
141074 ~  ~ Dielectrics Library
141075 ~  ~ Remove Material
141076 ~  ~ Double click on material in the list to select
141077 ~  ~ Charcteristic Impedance Caculator
141078 ~  ~ Double Click on layer to remove
141079 ~  ~ Calculations
141080 ~  ~ Dielectric Materials Library
141081 ~  ~ Select stack layers (Top --> Bottom)
141082 ~  ~ Dielectric material properties
141083 ~  ~ Make New Stack
141084 ~  ~ Insert selected layer(s) in the Stack
141085 ~  ~ Make stack of currently used layers
141086 ~  ~ Select material from library
141087 ~  ~ Store properties in library
141088 ~  ~ Select layer for calculations 
141089 ~  ~ Applicable formula 
141090 ~  ~ Output report to file
141091 ~  ~ Double Click on Signal/Mixed layer for calculation
141092 ~  ~ Remove selected from library
141093 ~  ~ Test Report
141094 ~  ~ Globat Test Report
141095 ~  ~ Integrity Check
141096 ~  ~ Redundancy Check
141097 ~  ~ Clearance Check
141098 ~  ~ Connectivity Check
141099 ~  ~ Copper Pour Connectivity Check
141100 ~  ~ Permittivity (Er)
141101 ~  ~ Thickness(H)
141102 ~  ~ The current Pinlist will be cleared.Are you sure?
141103 ~  ~ Invalid pinlist file; Error on line:
141104 ~  ~ Please use a valid pinlist file and try again
141105 ~  ~ Use project design rules
141106 ~  ~ As filled polygons
141107 ~  ~ Copper Pour Areas 
141108 ~  ~ Show Node Pairs
141109 ~  ~ &Place


#FILE = E2KLAYPS.EXE   'EDWin 2000 Fabrication Manager'


151 ~  ~ &Artwork
152 ~  ~ &Artwork&&Pwr/Gnd Planes
153 ~  ~ &Buried Vias
154 ~  ~ &Bury Vias
155 ~  ~ &Centrelines
156 ~  ~ &Continue ...
157 ~  ~ &Dimensions
158 ~  ~ &Full Board Outline
159 ~  ~ &Gerber
1510 ~  ~ &Gerber View
1511 ~  ~ &Holes
1512 ~  ~ &NC-Drill
1513 ~  ~ &Notes
1514 ~  ~ &Panel
1515 ~  ~ &Template
1516 ~  ~ &Template (dim)
1517 ~  ~ 'Execute' to start processing
1518 ~  ~ (offset&&distance)
1519 ~  ~ (Sdw:#
1520 ~  ~ (SMD)-Comp. Layer
1521 ~  ~ (SMD)-Solder Layer
1522 ~  ~ (Thru)
1523 ~  ~ (VER.
1524 ~  ~ (with multiple holes check)
1525 ~  ~ , Node :
1526 ~  ~ , Via
1527 ~  ~ ,Comp_name
1528 ~  ~ ,Comp_rot
1529 ~  ~ ,Comp_value
1530 ~  ~ ,Part_name
1531 ~  ~ ,Entry_1_XY_pos
1532 ~  ~ ,Global_cent_XY_pos
1533 ~  ~ ,Global_XY_size
1534 ~  ~ ,Outline_cent_XY_pos
1535 ~  ~ ,Outline_XY_size
1536 ~  ~ ,Pad_cent_XY_pos
1537 ~  ~ ,Pad_XY_size
1538 ~  ~ ,User_ref_XY_pos
1539 ~  ~ - Airgap Mask
1540 ~  ~ - Board Desc.Notes
1541 ~  ~ - Board Outline
1542 ~  ~ - Component HRf Pads
1543 ~  ~ - Component Pads
1544 ~  ~ - Component Standard Pads
1545 ~  ~ - Copper Planes
1546 ~  ~ - Dimensions
1547 ~  ~ - Dimensions and Notes
1548 ~  ~ - Hole Symbols
1549 ~  ~ - Legend
1550 ~  ~ - Save Board Notes
1551 ~  ~ - Save Template Notes
1552 ~  ~ - Select Artwork File ('Cover')
1553 ~  ~ - Select Artwork File ('Present')
1554 ~  ~ - Select Board Notes to Load
1555 ~  ~ - Select Gerber ASCII File
1556 ~  ~ - Select Template Notes to Load
1557 ~  ~ - Select/Define NC-Drill File Name
1558 ~  ~ - Select/Define Pick&Place File Name
1559 ~  ~ - Texts
1560 ~  ~ - Traces
1561 ~  ~ Via Pads
1562 ~  ~ 0 digits
1563 ~  ~ 1 digit
1564 ~  ~ 1/&1 Size
1565 ~  ~ 1/&2 Size
1566 ~  ~ 1/&3 Size
1567 ~  ~ 2 digits
1568 ~  ~ 3 digits
1569 ~  ~ Action:
1570 ~  ~ Add anyway?
1571 ~  ~ Add Msng &Hrf Items
1572 ~  ~ Add Prefix
1573 ~  ~ Add Suffix
1574 ~  ~ Add unit name to dimension
1575 ~  ~ ALL HOLES
1576 ~  ~ Angle =
1577 ~  ~ Aperture List Output
1578 ~  ~ Aperture(s) used
1579 ~  ~ Apertures used:
1580 ~  ~ AptsLst
1581 ~  ~ Arc Step(deg.):
1582 ~  ~ ArcStep
1583 ~  ~ Arrows :
1584 ~  ~ Artwork
1585 ~  ~ Artwork File (&2)
1586 ~  ~ ARTWORK FILES (Negative Plot):
1587 ~  ~ ARTWORK FILES (Positive Plot):
1588 ~  ~ Artwork of layer:
1589 ~  ~ Artwork Print Settings
1590 ~  ~ Artwork Print Settings (
1591 ~  ~ Artwork Printout ... <F10> to Cancel
1592 ~  ~ Artwork Printout <F10> to Cancel
1593 ~  ~ Artwork(s):
1594 ~  ~ Artworks List Output
1595 ~  ~ Artworks to Plort:
1596 ~  ~ Artworks:
1597 ~  ~ Artworks:
1598 ~  ~ ASCII
1599 ~  ~ ASCII ABSOLUTE
15100 ~  ~ Background:
15101 ~  ~ BadRate
15102 ~  ~ Baud Rate:
15103 ~  ~ BOARD
15104 ~  ~ Board Description Notes
15105 ~  ~ Board Notes
15106 ~  ~ Board Outline
15107 ~  ~ Board size too large
15108 ~  ~ Board Xmin,Ymin
15109 ~  ~ BOARD:
15110 ~  ~ BOTTOM
15111 ~  ~ Break Detected
15112 ~  ~ BurdVia
15113 ~  ~ Buried Vias
15114 ~  ~ Can't create Hrf Item in:
15115 ~  ~ Can't create Item in Panel Dimension Symbol
15116 ~  ~ Can't create Panel Dimension Symbol
15117 ~  ~ Can't find Aperture to fill Circle
15118 ~  ~ Can't find Aperture to fill Rectangle - needed <
15119 ~  ~ Can't find Aperture to finish Line:
15120 ~  ~ Can't find Aperture to finsh Arc/Circle
15121 ~  ~ Cant'find Aperture to finish Rectangle
15122 ~  ~ Center line Format
15123 ~  ~ Centre&holes
15124 ~  ~ Change Film for:
15125 ~  ~ Check for multiple holes in the same XY position
15126 ~  ~ Clear all dimensions
15127 ~  ~ Co&lors
15128 ~  ~ CODE:
15129 ~  ~ COM1
15130 ~  ~ COM2
15131 ~  ~ COM3
15132 ~  ~ COM4
15133 ~  ~ Completed OK
15134 ~  ~ Component Outlines
15135 ~  ~ Component pins
15136 ~  ~ Component Side:
15137 ~  ~ Contents  (Componet Geometric Data):
15138 ~  ~ Contents (Component Description:)
15139 ~  ~ Coordinate Sort
15140 ~  ~ Coordinates Reference:
15141 ~  ~ Coordinates Unit
15142 ~  ~ Coords:
15143 ~  ~ Copper &Relieve Edit View
15144 ~  ~ Copper Planes
15145 ~  ~ Count
15146 ~  ~ CP&&Ref.Points:
15147 ~  ~ CpValue
15148 ~  ~ Separate Aperture List File:
15149 ~  ~ Create Artworks List File
15150 ~  ~ CTS Timeout
15151 ~  ~ CXYRefe
15152 ~  ~ CXYUnit
15153 ~  ~ Project
15154 ~  ~ DCB Build Failed
15155 ~  ~ Dcodes:
15156 ~  ~ Define Artwork(s)
15157 ~  ~ Define Artworks
15158 ~  ~ Define Mech.Plot
15159 ~  ~ deg.
15160 ~  ~ Delete Artwork
15161 ~  ~ Delete Dimension?
15162 ~  ~ Part (alt. Symbol) Name
15163 ~  ~ Part Already Open
15164 ~  ~ Part Not Open
15165 ~  ~ PartName
15166 ~  ~ diameter:
15167 ~  ~ digits
15168 ~  ~ Dim =
15169 ~  ~ DimArrow
15170 ~  ~ DimArrowL
15171 ~  ~ DimArrowLM
15172 ~  ~ DimArrowW
15173 ~  ~ DimArrowWM
15174 ~  ~ DimDigits
15175 ~  ~ Dimension Prefix text:
15176 ~  ~ Dimension Suffix text:
15177 ~  ~ Dimensions text display setup:
15178 ~  ~ Dimensions text size:
15179 ~  ~ Dimensions Unit
15180 ~  ~ DimLineW
15181 ~  ~ DimLineWM
15182 ~  ~ DimMTsize
15183 ~  ~ DimPrefix
15184 ~  ~ DimPTsize
15185 ~  ~ Dims/Notes Printout (<F10> to Cancel)
15186 ~  ~ Dims/Notes Printout ... (<F10> to Cancel)
15187 ~  ~ DimSTsize
15188 ~  ~ DimSuffix
15189 ~  ~ DimUnit
15190 ~  ~ DimUtext
15191 ~  ~ Disk File
15192 ~  ~ Disk file:
15193 ~  ~ Displaying NC-Drill Project Contents
15194 ~  ~ Distance Sort
15195 ~  ~ Distance
15196 ~  ~ Double Click Column to change Prameter
15197 ~  ~ Draw Arrows
15198 ~  ~ Draw Color
15199 ~  ~ Drilled:
15200 ~  ~ DSR Timeout
15201 ~  ~ Edit Artwork Layer:
15202 ~  ~ Edit Prefix
15203 ~  ~ Edit Suffix
15204 ~  ~ 
15205 ~  ~  GERBER Mechanical Plot Contents:
15206 ~  ~ Define Artworks
15207 ~  ~ Dimensioning Parameters
15208 ~  ~ Generic Pick & Place Output
15209 ~  ~ GERBER ASCII Output Parameters Setup
15210 ~  ~ GERBER Output
15211 ~  ~ NC-Drill Output
15212 ~  ~ NC-Drill Parameters Setup
15213 ~  ~ EIA ABSOLUTE
15214 ~  ~ END OF TABLE
15215 ~  ~ Error in default parameters
15216 ~  ~ Establishing Board Format
15217 ~  ~ Execute NC-Drill
15218 ~  ~ Execute(&Artworks)
15219 ~  ~ Execute(&Mech.Plot)
15220 ~  ~ Execute(&Template)
15221 ~  ~ Extracting Pin Holes
15222 ~  ~ Extracting Via Holes
15223 ~  ~ File Name:
15224 ~  ~ Film Size:
15225 ~  ~ FlmChng
15226 ~  ~ For Layer:
15227 ~  ~ FORMAT
15228 ~  ~ Full Board
15229 ~  ~ Full Board Outline
15230 ~  ~ Generating NC-Drill Project
15231 ~  ~ Generic Pick&Place Output
15232 ~  ~ Gerber ASCII file
15233 ~  ~ Gerber ASCII files
15234 ~  ~ Gerber ASCII Output
15235 ~  ~ GERBER ASCII Output Completed
15236 ~  ~ GERBER ASCII Output:
15237 ~  ~ Gerber Input File Parameters
15238 ~  ~ Gerber Output - Artwork Selection
15239 ~  ~ Gerber Output Setup
15240 ~  ~ Gerber View
15241 ~  ~ Gerber View print Settings
15242 ~  ~ Gerber View Printout (<F10> to Cancel)
15243 ~  ~ Gerber View Printout ... (<F10> to Cancel)
15244 ~  ~ Global X,Y Centre (pads + outline)
15245 ~  ~ Global X,Y Size (pads + outline)
15246 ~  ~ Graphic
15247 ~  ~ Graphic Primitives
15248 ~  ~ Hardware Not Present
15249 ~  ~ Hatch pitch(
15250 ~  ~ Headers&Comments:
15251 ~  ~ Hole Category:
15252 ~  ~ Hole Outlines
15253 ~  ~ Hole Type:
15254 ~  ~ Holes
15255 ~  ~ Holes:
15256 ~  ~ HR-Pads
15257 ~  ~ Illegal Byte Size
15258 ~  ~ Image:
15259 ~  ~ Invalid or unsupported id
15260 ~  ~ is not of Pwr/Gnd type.
15261 ~  ~ ISO
15262 ~  ~ ISO ABSOLUTE
15263 ~  ~ Layer Printout ... (<F10> to Cancel)
15264 ~  ~ Layer:
15265 ~  ~ Layout Print Settings
15266 ~  ~ Layout Printout ... (<F10> to Cancel)
15267 ~  ~ Layout/Notes/Dims
15268 ~  ~ LEADING ZEROS OMITTED
15269 ~  ~ Legen&d
15270 ~  ~ Legend
15271 ~  ~ Length:
15272 ~  ~ Line width:
15273 ~  ~ Load &Notes
15274 ~  ~ Load &Template Notes
15275 ~  ~ LPT1
15276 ~  ~ LPT2
15277 ~  ~ LPT3
15278 ~  ~ LPT4
15279 ~  ~ LPTx Part not selected
15280 ~  ~ LPTx I/O Error
15281 ~  ~ LPTx Out-Of-Paper
15282 ~  ~ LPTx Timeout
15283 ~  ~ M.Plot C.Side
15284 ~  ~ M.Plot S.Side
15285 ~  ~ MagSize
15286 ~  ~ Make Photplotter Ready
15287 ~  ~ Mech. Plot (Sold.Layer)
15288 ~  ~ Mech.Plot (Comp.Layer)
15289 ~  ~ Mechanical Plot(s):
15290 ~  ~ mm ,
15291 ~  ~ Mono&chrome
15292 ~  ~ Monocolors Setup for Printing, Dimensioning & Template
15293 ~  ~ N&otes
15294 ~  ~ NameSrt
15295 ~  ~ NC OUTPUT FROM:
15296 ~  ~ NC-Drill Project Contents:
15297 ~  ~ NC-Drill Output
15298 ~  ~ NC-Drill Output Completed
15299 ~  ~ NC-Drill Setup
15300 ~  ~ NC-Drill Template
15301 ~  ~ NCD
15302 ~  ~ NCD Files (*.NCD)|*.NCD|
15303 ~  ~ NCD Header:
15304 ~  ~ Negative
15305 ~  ~ Negative Plot:
15306 ~  ~ No Artwork file selected
15307 ~  ~ No Artwork to Plot
15308 ~  ~ No check
15309 ~  ~ Not Found!
15310 ~  ~ not selected.
15311 ~  ~ Notes
15312 ~  ~ Notes(*.EBN)|*.EBN
15313 ~  ~ Offset:
15314 ~  ~ OMZeros
15315 ~  ~ Opening Output Channel
15316 ~  ~ OptAxis
15317 ~  ~ Optimalization :
15318 ~  ~ Optimalization:
15319 ~  ~ Options:
15320 ~  ~ OptType
15321 ~  ~ Outline:
15322 ~  ~ Output Files:
15323 ~  ~ Output Code:
15324 ~  ~ Output to:
15325 ~  ~ Outputing Board Outline
15326 ~  ~ Outputing CompInfo
15327 ~  ~ Outputing Componets
15328 ~  ~ Outputing Header
15329 ~  ~ Outputing Tape Label
15330 ~  ~ Overwrite existing files
15331 ~  ~ Overwrt
15332 ~  ~ P&&P
15333 ~  ~ P&&P Generation Completed
15334 ~  ~ P&arameters
15335 ~  ~ P&P Files (*.PCK)|*.PCK|
15336 ~  ~ P&reprocess
15337 ~  ~ Pad Frames:
15338 ~  ~ Pads:
15339 ~  ~ Panel
15340 ~  ~ Parallel
15341 ~  ~ Parallel Port:
15342 ~  ~ Patch
15343 ~  ~ PATCH-
15344 ~  ~ Patch:
15345 ~  ~ Patches:
15346 ~  ~ Pause .....
15347 ~  ~ Pick&Place Output
15348 ~  ~ Pin 1 X,Y Coordinates
15349 ~  ~ Place cursor at Copper Pouring point and click
15350 ~  ~ Planes:
15351 ~  ~ Plots:
15352 ~  ~ PMD pads
15353 ~  ~ PMD Pads:
15354 ~  ~ Port:
15355 ~  ~ Positive Plot:
15356 ~  ~ Possible Shortcuts
15357 ~  ~ Possible Unconnected Nodes
15358 ~  ~ Possible Unconnects (Net :
15359 ~  ~ Postprocessing
15360 ~  ~ Precision:
15361 ~  ~ Precision:
15362 ~  ~ Preference:
15363 ~  ~ Prefix text size
15364 ~  ~ Prepare Drill Database for Template only
15365 ~  ~ Preparing Artwork for connectivity check ...
15366 ~  ~ Primitives:
15367 ~  ~ Processing:
15368 ~  ~ PSTFSI.MEN
15369 ~  ~ Pwr/Gnd Planes
15370 ~  ~ r=
15371 ~  ~ Range Error - format:
15372 ~  ~ Receive Framing error
15373 ~  ~ Receive Overrun Error
15374 ~  ~ Receive Parity Error
15375 ~  ~ Receive Queue overflow
15376 ~  ~ Reference Nets in Pwr/Gnd Plane
15377 ~  ~ Requested mode unsupported
15378 ~  ~ Required Film Size:
15379 ~  ~ REV.
15380 ~  ~ RLSD Timeout
15381 ~  ~ Rnd.Pad
15382 ~  ~ Rotation
15383 ~  ~ Same XY
15384 ~  ~ Save N&otes
15385 ~  ~ Save T&emplate Notes
15386 ~  ~ Segments:
15387 ~  ~ Select .GBR file and preprocess again.
15388 ~  ~ Select Layer(s)
15389 ~  ~ Select Layers:
15390 ~  ~ Select Next Item(s)
15391 ~  ~ Select Refrence Net:
15392 ~  ~ Select the Reference Net first
15393 ~  ~ Selected .ART file was preprocessed in other Master Unit.
15394 ~  ~ Seperate Layers
15395 ~  ~ Seq_no
15396 ~  ~ Serial
15397 ~  ~ Serial Port:
15398 ~  ~ Set Comm. State Failed
15399 ~  ~ Set Size
15400 ~  ~ Si&zes
15401 ~  ~ Sides:
15402 ~  ~ SMD Pads
15403 ~  ~ SMD Pads:
15404 ~  ~ SMD-Pads
15405 ~  ~ Sort
15406 ~  ~ Sorting. Key:
15407 ~  ~ Sqr.Pad
15408 ~  ~ Stepping:
15409 ~  ~ STOP
15410 ~  ~ Stop for film change
15411 ~  ~ Suffix text size
15412 ~  ~ Template
15413 ~  ~ Template
15414 ~  ~ Template (note&s)
15415 ~  ~ Template Notes
15416 ~  ~ Template Notes(*.EPN)|*.EPN
15417 ~  ~ Template Notes(*.ETN)|*.ETN
15418 ~  ~ Template print Settings
15419 ~  ~ Template Printout (<F10> to Cancel)
15420 ~  ~ Template Printout ... (<F10> to Cancel)
15421 ~  ~ Texts:
15422 ~  ~ This function is not active in this mode
15423 ~  ~ Thru Vias
15424 ~  ~ ThruVia
15425 ~  ~ Tool Mag Size:
15426 ~  ~ Tool Sequencing
15427 ~  ~ Tool Sizes:
15428 ~  ~ Tool:
15429 ~  ~ Tooldgt
15430 ~  ~ Tools
15431 ~  ~ TOOLS USED (
15432 ~  ~ TOOLS:
15433 ~  ~ Toolunt
15434 ~  ~ TOP
15435 ~  ~ Total
15436 ~  ~ Trace Segments
15437 ~  ~ TRAILING ZEROS OMITTED
15438 ~  ~ TX Queue is full
15439 ~  ~ Type in Main NCD Header:
15440 ~  ~ Type in Patch
15441 ~  ~ Unable to allocate queues
15442 ~  ~ Unit:
15443 ~  ~ Unsupported BaudRate
15444 ~  ~ User Ref. X,Y Coordinates
15445 ~  ~ Vias Pads
15446 ~  ~ X - Axis
15447 ~  ~ X,Y Centre (outline)
15448 ~  ~ X,Y Centre (pads)
15449 ~  ~ X,Y Size (outlines)
15450 ~  ~ X,Y Size (pads)
15451 ~  ~ X-Panel:
15452 ~  ~ X-Size:
15453 ~  ~ X-Step:
15454 ~  ~ XYScale
15455 ~  ~ Y - Axis
15456 ~  ~ Y-Panel:
15457 ~  ~ Y-Size:
15458 ~  ~ Y-Step:
15459 ~  ~ You can't change Net Assigment for Copper Relieving Item
15460 ~  ~ Zero (0)
15461 ~  ~ Objects
15462 ~  ~ Airgap
15463 ~  ~ Trace Segments
15464 ~  ~ PMD Pads
15465 ~  ~ SMD Pads
15466 ~  ~ Conductors in Components
15467 ~  ~ Vias
15468 ~  ~ Copper Planes
15469 ~  ~ Texts
15470 ~  ~ Board Outline (all layers)
15471 ~  ~ Airgap for layer objects
15472 ~  ~ Heat Relief Items Autogenerations
15473 ~  ~ Options for Heat Relief Items Autogenerations:
15474 ~  ~ Only in padstacks with missing Hrf Items
15475 ~  ~ Regenerate Hrf Items in all padstacks
15476 ~  ~ Thrupath (contact width):
15477 ~  ~ Creating Aperture List
15478 ~  ~ Aperture List Output
15479 ~  ~ Coordinates outside limits
15480 ~  ~ Check parameters for .GBR file and preprocess again.
15481 ~  ~ Embed Offset && Stepping commands
15482 ~  ~ Circular Interpolation supported
15483 ~  ~ Filled Polygons supported
15484 ~  ~ Square Flash fill for rectangles
15485 ~  ~ Tear Drop Autogeneration
15486 ~  ~ Options for Tear Drops generation:
15487 ~  ~ Only on currently selected placement layer
15488 ~  ~ All layers
15489 ~  ~ Tear Drops on component PMD pads
15490 ~  ~ Tear Drops on component SMD pads
15491 ~  ~ Tear Drops on vias
15492 ~  ~ Tear Drop sizing options:
15493 ~  ~ Caluculated depending on pad size
15494 ~  ~ Ratio:
15495 ~  ~ Fixed Length along connecting trace
15496 ~  ~ Length:
15497 ~  ~ Make Drops concave
15498 ~  ~ "Tear &Drop" pads
15499 ~  ~ Copper Pour Area Vertex:
15500 ~  ~ Autogenerated
15501 ~  ~ - Copper Relieve Areas
15502 ~  ~ - Copper Pour Areas
15503 ~  ~ Copper Pour
15504 ~  ~ Areas
15505 ~  ~ Suffixes in Gerber file names indicate
15506 ~  ~ wrongly selected background file.
15507 ~  ~ The suffix should be in range 50-81.
15508 ~  ~ wrongly selected superimposed file.
15509 ~  ~ The suffix should be in range 00-31.
15510 ~  ~ that selected files contain artworks
15511 ~  ~ of different layers.
15512 ~  ~ Preprocess anyway?
15513 ~  ~ Gerber Viewer Setup
15514 ~  ~ aperture not found in the list during preprocessing.
15515 ~  ~ Select proper Aperture Table and preprocess again.
15516 ~  ~ Attempt to superimpose same Gerber file!
15517 ~  ~ Function not aplicable to Copper Pour Area
15518 ~  ~ Intersecting or Invalid boundaries of Copper Pour Area
15519 ~  ~ Copper Pour Areas not allowed on Silkscreen layer
15520 ~  ~ Copper Pour Areas must have net assignement
15521 ~  ~ Copper Pour Area to complex
15522 ~  ~ Nets with defined Copper Pour Areas:
15523 ~  ~ Autogenerated apertures
15524 ~  ~ Embedded
15525 ~  ~ Report File:
15526 ~  ~ Excellon Program Format:
15527 ~  ~ Offset and stepping definitions
15528 ~  ~ Hole Category (patches:
15529 ~  ~ Patch Headers:
15530 ~  ~ Main Header
15531 ~  ~ Output comments
15532 ~  ~ Output contents specification:
15533 ~  ~ Precision Format
15534 ~  ~ Superimpose positive image plot
15535 ~  ~ Gerber ASCII File (superimposed)
15536 ~  ~ Preprocess for display
15537 ~  ~ Artwork Display File
15538 ~  ~ Gerber Output Format
15539 ~  ~ Photoplotting options:
15540 ~  ~ Linear Interpolation Arc step (deg):
15541 ~  ~ Mixed polarity plot (Copper Pour Areas)
15542 ~  ~ Display with Black Background
15543 ~  ~ Print with Black Background
15544 ~  ~ Trace(s) with no connections to Nodes
15545 ~  ~ Testing for shortcuts
15546 ~  ~ Shortcuted
15547 ~  ~ No shortcuts detected
15548 ~  ~ Shortcuts detected
15549 ~  ~ - no faults detected
15550 ~  ~ - faults detected!
15551 ~  ~ (SMD - Solder Side)
15552 ~  ~ (SMD - Component Side)
15553 ~  ~ (PMD)
15554 ~  ~ Node in Net:
15555 ~  ~ in Net:
15556 ~  ~ Possible Unconnects in Net:
15557 ~  ~ Possible Shortcuts with Net:
15558 ~  ~ Point not in Copper Pour Area for
15559 ~  ~ Preparing HR Pads Display
15560 ~  ~ Preparing HR Pads for plotting
15561 ~  ~ Isolated
15562 ~  ~ Unconnected
15563 ~  ~ Copper Relieve
15564 ~  ~ Tools to work with Artwork & Pwr/Gnd Plane
15565 ~  ~ Tools to work with Template Notes
15566 ~  ~ Dimension
15567 ~  ~ Tools to work with Dimension Editing
15568 ~  ~ Template Dimensions
15569 ~  ~ Tools to work with Template Dimensions
15570 ~  ~ Tools to work with Copper
15571 ~  ~ Tools to work with Notes
15572 ~  ~ Gerber
15573 ~  ~ Tools to work with Gerber
15574 ~  ~ Tools to work with Bitmaps
15575 ~  ~ Ratsnest
15576 ~  ~ View Holes
15577 ~  ~ Centre lines
15578 ~  ~ View Centrelines
15579 ~  ~ Copper Relieve Edit View
15580 ~  ~ View Copper Relieve Edit
15581 ~  ~ Centre Holes
15582 ~  ~ View Centre Holes
15583 ~  ~ View Legend
15584 ~  ~ View Panel
15585 ~  ~ FullBoardOutline
15586 ~  ~ View FullBoardOutline
15587 ~  ~ Black Background
15588 ~  ~ Artwork&Pwr/GndPlanes
15589 ~  ~ Dimension Text Size
15590 ~  ~ Add Unit Name
15591 ~  ~ Arrows
15592 ~  ~ Are you sure you want to delete the entry
15593 ~  ~ NC Drill Database Contents
15594 ~  ~ 'Execute' to start processing
15595 ~  ~ Mechanical Plot(s)
15596 ~  ~ Artwork(s)
15597 ~  ~ Scale Factor:X
15598 ~  ~ Scale Factor:Y
15599 ~  ~ Precision Factor:X
15600 ~  ~ Precision Factor:Y
15601 ~  ~ ITEM
15602 ~  ~ COLOR
15603 ~  ~ Background Color
15604 ~  ~ CP & Ref Points
15605 ~  ~ Highlight
15606 ~  ~ Trace Length
15607 ~  ~ Fabrication Data Setup
15608 ~  ~ Select Location for saving Photoplotter files
15609 ~  ~ Please select a File Name Prefix using the Browse button in this cell.
15610 ~  ~ Invalid Operation
15611 ~  ~ Please select an Aperture Table using the Browse button in this cell.
15612 ~  ~ The folder you have specified does not exist!
15613 ~  ~ Do you want this folder to be created?
15614 ~  ~ Select Path
15615 ~  ~ A Path cannot be empty or contain any of the following characters:
15616 ~  ~ The original path has been restored
15617 ~  ~ Select Path Error
15618 ~  ~ The folder you specified could not be created due to the following reason
15619 ~  ~ Fabrication Data Manager
15620 ~  ~ Gerber Photoplotter Data
15621 ~  ~ Gerber Artworks
15622 ~  ~ Gerber Mechanical Plots
15623 ~  ~ NC-Drill Data
15624 ~  ~ Output Contents
15625 ~  ~ Generic Pick & Place Data
15626 ~  ~ NC Drill Data (Excellon Format)
15627 ~  ~ NC Drill Output Contents
15628 ~  ~ Generic Pick and Place
15629 ~  ~ Excellon Output Format
15630 ~  ~ Omitted Zeroes
15631 ~  ~ Tool Size Units
15632 ~  ~ Tool Size Precision
15633 ~  ~ Tool Magazine Size
15634 ~  ~ NCDrill bit movement Optimization
15635 ~  ~ Optimization method
15636 ~  ~ Preferred direction for Coordinate Sort optimization
15637 ~  ~ Output File Locations and Names
15638 ~  ~ Location
15639 ~  ~ File Name Prefix
15640 ~  ~ Output File Format Standard
15641 ~  ~ Photoplotter Options
15642 ~  ~ Aperture table type
15643 ~  ~ User Specified
15644 ~  ~ Selected Aperture Table
15645 ~  ~ Number of Horizontal Steps
15646 ~  ~ Number of Vertical Steps
15647 ~  ~ Horizontal Inter-Pattern Distance
15648 ~  ~ Vertical Inter-Pattern Distance
15649 ~  ~ Horizontal Offset
15650 ~  ~ Vertical Offset
15651 ~  ~ Film Size (Horz x Vert)
15652 ~  ~ Include in Artwork
15653 ~  ~ Mirror Image
15654 ~  ~ Comp PMD Pads
15655 ~  ~ Comp SMD Pads
15656 ~  ~ Layer for which (Mechanical Plot - Component Side) is to be generated
15657 ~  ~ Current Layer
15658 ~  ~ Board entities to be plotted
15659 ~  ~ Padstack entities to be plotted
15660 ~  ~ Line Width for Pad Frames
15661 ~  ~ Line Width for Hole Outlines
15662 ~  ~ Layer for which (Mechanical Plot - Solder Side) is to be generated
15663 ~  ~ Miscellaneous
15664 ~  ~ Mirrored Plot
15665 ~  ~ Hole Type/s
15666 ~  ~ Through Hole Vias
15667 ~  ~ Hole Categories (Patches) to be included in Output File
15668 ~  ~ Hole Category (Patch)
15669 ~  ~ Include Comments in NCDrill File
15670 ~  ~ Header for Hole Category (Patch)
15671 ~  ~ Pick and Place Machine Setup
15672 ~  ~ Co-ordinates Reference
15673 ~  ~ Contents (Component Description)
15674 ~  ~ Contents (Component Geometric Data)
15675 ~  ~ User Ref X, Y Co-ordinates
15676 ~  ~ Select Layers for Preview
15677 ~  ~ Specify Filename Prefix
15678 ~  ~ Specify a Filename Prefix for all Photoplotter files
15679 ~  ~ Maximum number of characters allowed =
15680 ~  ~ Select Filename Error
15681 ~  ~ No Filename Prefix has been specified!
15682 ~  ~ Previous prefix will be restored
15683 ~  ~ One or more files with the same prefix as that you have selected already exist in this folder!
15684 ~  ~ Do you wish to overwrite any files that may have the same names?
15685 ~  ~ Pick and Place Files
15686 ~  ~ NCDrill Job Report Files
15687 ~  ~ NCDrill Template Notes
15688 ~  ~ NCDrill Template Files
15689 ~  ~ All NCDrill Files
15690 ~  ~ Aperture List Files
15691 ~  ~ Gerber Job Report Files
15692 ~  ~ All Photoplotter Files
15693 ~  ~ Select Filename Prefix
15694 ~  ~ Selected Filename Prefix
15695 ~  ~ Current Path
15696 ~  ~ Current Path :
15697 ~  ~ File Attributes
15698 ~  ~ Do not show Hidden Files
15699 ~  ~ Do not Show Hidden and System Files
15700 ~  ~ Show All Files
15701 ~  ~ Show Files of Type
15702 ~  ~ Short Bar ...
15703 ~  ~ Paste from Clipboard
15704 ~  ~ Incremental
15705 ~  ~ Absolute
15706 ~  ~ -Aperture Tables
15707 ~  ~ Fabrication Setup
15708 ~  ~ Generate Mechanical Plot for Solder Side
15709 ~  ~ Generate Mechanical Plot for Component Side
15710 ~  ~ Custom Toolbar
15711 ~  ~ Fa&brication
15712 ~  ~ Execute Gerber Template
15713 ~  ~ Artwork Layer:
15714 ~  ~ Select Items
15715 ~  ~ Item Params
15716 ~  ~ Gerber &Viewer Setup...
15717 ~  ~ PCB Assembly Outputs
15718 ~  ~ Millimeters and Radians
15719 ~  ~ Inches and Degrees
15720 ~  ~ Millimeters and Degrees
15721 ~  ~ Inches and Radians
15722 ~  ~ Sequence of Component
15723 ~  ~ PMD Components first
15724 ~  ~ SMD Components first
15725 ~  ~ Job description)
15726 ~  ~ Revision	
15727 ~  ~ PCB Parameters	
15728 ~  ~ Thickness of PCB 	
15729 ~  ~ Height of PMD components over PCB	
15730 ~  ~ Number of PCB Fiducials	
15731 ~  ~ PCB Fiducials Size	
15732 ~  ~ PCB Fiducials Horizontal Shift 	
15733 ~  ~ PCB Fiducials Veritcal Shift	
15734 ~  ~ Output PCB Patern Tolerance	
15735 ~  ~ PCB Patern Horizontal Tolerance	
15736 ~  ~ PCB Patern Vertical Tolerance	
15737 ~  ~ Output PMD Components Tolerance	
15738 ~  ~ PMD Components Horizontal Tolerance	
15739 ~  ~ PMD Components Vertical Tolerance 	
15740 ~  ~ PMD Components Angular Tolerance	
15741 ~  ~ Output SMD Components Tolerance	
15742 ~  ~ SMD Components Horizontal Tolerance	
15743 ~  ~ SMD Components Vertical Tolerance	
15744 ~  ~ SMD Components Angular Tolerance	
15745 ~  ~ Glue and Solder Paterns	
15746 ~  ~ Output Glue Pattern 	
15747 ~  ~ Glue Dot Size	
15748 ~  ~ Output Solder Paste Pattern	
15749 ~  ~ Solder Paste Dot Size	
15750 ~  ~ Step and Repeat Definition	
15751 ~  ~ Stepping 	
15752 ~  ~ Panel Horizontal Offset	
15753 ~  ~ Panel Vertical Offset	
15754 ~  ~ Number of Panel Fiducials	
15755 ~  ~ Panel Fiducial Size	
15756 ~  ~ Output Panel Tolerance	
15757 ~  ~ Panel Horizontal Tolerance	
15758 ~  ~ Panel Vertical Tolerance	
15759 ~  ~ Board Viewed	
15760 ~  ~ From Top	
15761 ~  ~ From Bottom	
15762 ~  ~ Test Data Output Contents	
15763 ~  ~ Measure Distance	
15764 ~  ~ Measure Distance from selected object	
15765 ~  ~ Bare Board Testing	
15766 ~  ~ Conductors	
15767 ~  ~ Through Vias	
15768 ~  ~ Buried Vias	
15769 ~  ~ Board Edge Data	
15770 ~  ~  - Select Gerber ASCII File(superimposed)	
15771 ~  ~ Following Superimposed file(s) selected.	
15772 ~  ~ Remove Superimposed file(s) and Continue?	
15773 ~  ~ Delete all artwork(s)	
15774 ~  ~ Move up in the order	
15775 ~  ~ Move down in the order	
15776 ~  ~ Merge view selected artwork file(s)	
15777 ~  ~ View all selected artwork file(s)	
15778 ~  ~ Apply with selected options and send to editor	
15779 ~  ~ Close Artwork Manager	
15780 ~  ~ Color or Black/White mode	
15781 ~  ~ Negative (Black/White)	
15782 ~  ~ Select all artwork file(s)	
15783 ~  ~ Merge and draw one over other	
15784 ~  ~ Set frame si&ze (	
15785 ~  ~ Gerber Preprocessor	
15786 ~  ~ Gerber Preprocessor and Viewer Setup	
15787 ~  ~ Clear All	
15788 ~  ~ Browse Artwork	
15789 ~  ~ Artwork Info	
15790 ~  ~ Move Up	
15791 ~  ~ Move Down	
15792 ~  ~ View All	
15793 ~  ~ Merge View	
15794 ~  ~ Fit in window	
15795 ~  ~ Set frame si&ze
15796 ~  ~ Continous rows having contents will be overwritten. Continue?
15797 ~  ~ Gerber File selection is limited to 32 numbers
15798 ~  ~ Superimposed files are not allowed for multiple artwork display
15799 ~  ~ Checked
15800 ~  ~ Bro&wse Artwork
15801 ~  ~ Artwork &Info
15802 ~  ~ Clear &All
15803 ~  ~ Move &Up
15804 ~  ~ Move D&own
15805 ~  ~ Me&rge View
15806 ~  ~ &View All
15807 ~  ~ Co&lor
15808 ~  ~ Nega&tive
15809 ~  ~ &Fit in window
15810 ~  ~ Clear selected file
15811 ~  ~ Clear all files
15812 ~  ~ Preprocess gerber to arwork
15813 ~  ~ Browse artwork files
15814 ~  ~ Artwork aperture and size information
15815 ~  ~ Delete selected artwork
15816 ~  ~ Superimposed
15817 ~  ~ Selection
15818 ~  ~ Select color
15819 ~  ~ Line
15820 ~  ~ Process Incomplete
15821 ~  ~ Successfully processed selected files
15822 ~  ~ has no Gerber Filename or Filename invalid
15823 ~  ~ has no SuperImpose Gerber Filename or filename invalid
15824 ~  ~ has no Artwork Filename or Filename invalid
15825 ~  ~ Gerber File
15826 ~  ~ Superimpose Gerber File
15827 ~  ~ &Destination
15828 ~  ~ Set arwork location
15829 ~  ~ Artwork File selection is limited to 32 numbers
15830 ~  ~ View Layer Alignment &Targets
15831 ~  ~ Check parameters for 
15832 ~  ~ file and preprocess again.
15833 ~  ~ Circle
15834 ~  ~ Rectangle
15835 ~  ~ Obound
15836 ~  ~ Reg.polygon
15837 ~  ~ Y Vertex
15838 ~  ~ already present, Overwrite?
15839 ~  ~ Skipped
15840 ~  ~ Created
15841 ~  ~ Overwritten
15842 ~  ~ REPORT ON GERBER FILE PREPROCESS
15843 ~  ~ SELECTED
15844 ~  ~ PROCESSED
15845 ~  ~ CREATED
15846 ~  ~ SKIPPED
15847 ~  ~ Report
15848 ~  ~ Set all arwork's file location
15849 ~  ~  - Select/Define IPC-D-355 File Name
15850 ~  ~  - Select/Define IPC-D-356A File Name
15851 ~  ~  - Select/Define BBT Data File Name
15852 ~  ~ Net Name
15853 ~  ~ Net Id
15854 ~  ~ Macros/Special Apertures supported
15855 ~  ~ View Panel Overview
15856 ~  ~ &All Layers
15857 ~  ~ Graphic &Imports
15858 ~  ~ &Reconstruct from Graphics
15859 ~  ~ Export in GenCAM format
15860 ~  ~ Import Categories...
15861 ~  ~ Load &Graphic Imports
15862 ~  ~ Save Graphic &Imports
15863 ~  ~ Display output file
15864 ~  ~ GenCAM Export
15865 ~  ~ Graphic Imports
15866 ~  ~ Include in project 
15867 ~  ~ Tools to work with Graphic Imports
15868 ~  ~ Reconstruct from Graphics
15869 ~  ~ Tools to reconstruct project from imported graphics
15870 ~  ~ View Import Categories
15871 ~  ~ - Save Graphic Imports
15872 ~  ~ - Export in GenCAM format
15873 ~  ~ part:
15874 ~  ~ package:
15875 ~  ~ Reconstruction of layout components
15876 ~  ~ Select component from the list below
15877 ~  ~ Reconstruction master net
15878 ~  ~ not found
15879 ~  ~ Number of nets in reconstructed netlist
15880 ~  ~ Reconstruction of vias
15881 ~  ~ Select padstack for via(s) 
15882 ~  ~ Delete vertex
15883 ~  ~ None of the pads matches master pad positions.
15884 ~  ~ Not all of the pads match master pad positions.
15885 ~  ~ Place anyway?
15886 ~  ~ Reconstructing components
15887 ~  ~ Reconstruct all vias?
15888 ~  ~ Reconstructing vias
15889 ~  ~ Reconstruct all traces?
15890 ~  ~ Reconstructing traces
15891 ~  ~ Reconstruct Netlist?
15892 ~  ~ Reconstructing netlist
15893 ~  ~ Reconstruct all copper?
15894 ~  ~ Reconstructing copper
15895 ~  ~ Include in project 
15896 ~  ~ Component type incompatible with category of selected pad position
15897 ~  ~ Files Selected
15898 ~  ~ DXF Input File Parameters :
15899 ~  ~ Internal Units for Length
15900 ~  ~ Internal Units for Angle
15901 ~  ~ No of Layers
15902 ~  ~ Selected Layers
15903 ~  ~ DXF ASCII File
15904 ~  ~ Select Artwork Files
15905 ~  ~ DXF Preprocessor
15906 ~  ~ Set pad X position 
15907 ~  ~ Set pad Y position
15908 ~  ~ Original Aperture Dcode
15909 ~  ~ Select target category for transfer
15910 ~  ~ PAD POSITION
15911 ~  ~ Original Dcode 
15912 ~  ~ Transfer items to 
15913 ~  ~ items
15914 ~  ~ Empty
15915 ~  ~ Board Outline
15916 ~  ~ Board Cutouts
15917 ~  ~ Silkscreen Comp.Side
15918 ~  ~ Thrupads Positions
15919 ~  ~ SMD Pads Positions Comp.Side
15920 ~  ~ Thrupads Padstacks
15921 ~  ~ SMD Padstacks Comp.Side 
15922 ~  ~ Via Positions
15923 ~  ~ Via Padstacks
15924 ~  ~ Trace Master
15925 ~  ~ Copper Planes Master
15926 ~  ~ SMD Padstacks Solder Side
15927 ~  ~ SMD Pads Positions Solder Side
15928 ~  ~ Silkscreen Master Solder Side
15929 ~  ~ Template Outlines
15930 ~  ~ Line
15931 ~  ~ Rnd.Pad 
15932 ~  ~ Sqr.Pad 
15933 ~  ~ Special
15934 ~  ~ Clear before import
15935 ~  ~ Append
15936 ~  ~ Change import color
15937 ~  ~ Default import color
15938 ~  ~ Import mode
15939 ~  ~ Import in color
15940 ~  ~ Filled Rectangles
15941 ~  ~ Open Rectangles
15942 ~  ~ Arcs
15943 ~  ~ Filled circles
15944 ~  ~ 
15945 ~  ~ Open circles
15946 ~  ~ Filled triangles
15947 ~  ~ Open triangles
15948 ~  ~ Polygons
15949 ~  ~ Texts
15950 ~  ~ Pad positions
15951 ~  ~ Number of files
15952 ~  ~ Image X Offset
15953 ~  ~ Image Y Offset
15954 ~  ~ Mirror Image
15955 ~  ~ Source path
15956 ~  ~ Import to layer
15957 ~  ~ Airgap size
15958 ~  ~ Import Filters:
15959 ~  ~ Import lines
15960 ~  ~ Import pads
15961 ~  ~ Import arcs
15962 ~  ~ Import polygons
15963 ~  ~ Import macros
15964 ~  ~ Import pad positions
15965 ~  ~ D-Code filter
15966 ~  ~ Aperture (D-Code)
15967 ~  ~ do Not import
15968 ~  ~ Property
15969 ~  ~ Import Categories
15970 ~  ~ Import Artwork files
15971 ~  ~ Clear contents of
15972 ~  ~ Graphic Imports
15973 ~  ~ Clear contents of all categories?
15974 ~  ~ No files to import
15975 ~  ~ Import failed
15976 ~  ~ Import successful
15977 ~  ~ Import all categories?
15978 ~  ~ categories imported
15979 ~  ~ Import to
15980 ~  ~ View info
15981 ~  ~ Import Categories
15982 ~  ~ Set visibility and display order
15983 ~  ~ Select &Not Empty
15984 ~  ~ D-Code
15985 ~  ~ Hole Category
15986 ~  ~ Assign Hole Parameters
15987 ~  ~ Path Not found
15988 ~  ~ Ignored
15989 ~  ~ Error in reading DXF file
15990 ~  ~ Supporting units are ;Metric; and ;Engineering; for length
15991 ~  ~ ;Decimal Degrees; for Angle
15992 ~  ~ Error in file format
15993 ~  ~ Specify
15994 ~  ~ Select Artwork
15995 ~  ~ &Destination Path
15996 ~  ~ Destination Path
15997 ~  ~ REPORT ON
15998 ~  ~ FILE PREPROCESS
15999 ~  ~ Error in file reading
151000 ~  ~ Out of Limits
151001 ~  ~ Disk is full
151002 ~  ~ Disk not ready
151003 ~  ~ Error in Creation
151004 ~  ~ View X offset
151005 ~  ~ View Y offset
151006 ~  ~ Set X offset for this artwork view
151007 ~  ~ Set Y offset for this artwork view
151008 ~  ~ Mirrored view for this artwork
151009 ~  ~ within Copper Pour Area(s)
151010 ~  ~ Copper Pour Areas - special settings
151011 ~  ~ Special Settings for plotting of Copper Pour Areas
151012 ~  ~ Using hatch lines (RS-274-X format only)
151013 ~  ~ Using hatch copper relief
151014 ~  ~ Artwork for layer
151015 ~  ~ Copper Pour Areas plot mode for Net:
151016 ~  ~ Plot HRF PMD pads
151017 ~  ~ Plot HRF SMD pads/Airgap for SMD pads with fanouts
151018 ~  ~ Hatched Copper Pour
151019 ~  ~ Plot boundaries
151020 ~  ~ Hatch lines width
151021 ~  ~ Hatch step
151022 ~  ~ Interval width
151023 ~  ~ Relief square size
151024 ~  ~ Copper Pour Areas

151025 ~  ~ Currently edited layer only
151026 ~  ~ All layers with reference net connections
151027 ~  ~ Some initially isolated copper pour areas are connected through links on other layers!

151028 ~  ~ Airgap change mode:
151029 ~  ~ Change to set value
151030 ~  ~ Increase by set value
151031 ~  ~ Decrease by set value
151032 ~  ~  Not isolated
151033 ~  ~ Preparing layer:
151034 ~  ~ Checking layer:
151035 ~  ~ Checking SMDs on top/bottom layer(s):
151036 ~  ~  - Copper Pour Relieve

151037 ~  ~ Plated hole for component pins
151038 ~  ~ Non-plated hole for component pins
151039 ~  ~ Plated hole for mounting
151040 ~  ~ Non-plated hole for mounting
151041 ~  ~ Plated hole for tooling
151042 ~  ~ Non-plated hole for tooling
151043 ~  ~ Mils (1/1000 inch)
151044 ~  ~ Millimeters 
151045 ~  ~ Electrical
151046 ~  ~ Mechanical
151047 ~  ~ using package 3D data
151048 ~  ~ using package 2D frame
151049 ~  ~ using both package 2D&3D data
151050 ~  ~ absolute
151051 ~  ~ relative to min. X&Y of board outline

151052 ~  ~ Select IDF Board File
151053 ~  ~ Select IDF Panel File
151054 ~  ~ Select IDF Library File
151055 ~  ~ IDF V3.0 Export

151056 ~  ~ IDF EXPORT
151057 ~  ~ Board File
151058 ~  ~ Library File

151059 ~  ~ Board file name
151060 ~  ~ Board file version
151061 ~  ~ Export unit
151062 ~  ~ Export coordinates as
151063 ~  ~ Board thickness

151064 ~  ~ Maximal component height
151065 ~  ~ Hole category
151066 ~  ~ Panel file name
151067 ~  ~ X-Offset
151068 ~  ~ Y-Offset
151069 ~  ~ Horizontal (X) steps
151070 ~  ~ Verical (Y) steps
151071 ~  ~ Horizontal (X) distance between boards
151072 ~  ~ Verical (Y) distance between boards

151073 ~  ~ Library file name
151074 ~  ~ Library file version
151075 ~  ~ Package type
151076 ~  ~ Package height
151077 ~  ~ Package mounting offset
151078 ~  ~ Calculate boundary polygon
151079 ~  ~ Refreshing bitmap

151080 ~  ~ IDF file viewer
151081 ~  ~ Tools to import and view files in IDF format
151082 ~  ~ IDF file 3D view

151083 ~  ~ Copper Relieve Area Vertex: 

151084 ~  ~ Test Mode
151085 ~  ~ View progress
151086 ~  ~ Pour Precision
151087 ~  ~ Check for bottlenecks
151088 ~  ~ Minimal allowed(approx.)
151089 ~  ~ Do not change items with airgap set to zero

151090 ~  ~ Previous copper pour connectivity check
151091 ~  ~ detected unconnected nodes in tested net.
151092 ~  ~ Automatic copper removal is not recommended
151093 ~  ~ until all connectivity errors are corrected.
151094 ~  ~ Do you still want to continue?
151095 ~  ~ Warning! 
151096 ~  ~ Removing copper .... 
151097 ~  ~ Select isolated pocket ('black') 
151098 ~  ~ Rectangle
151099 ~  ~ Square
151100 ~  ~ Circle
151101 ~  ~ Press F6 to change tool shape and size, ESC to finish
151102 ~  ~ Tool not inside Copper Pour Area for
151103 ~  ~ Bottleneck Test
151104 ~  ~ All layers test can't be perfomed with this pour precision - board size too large
151105 ~  ~  Unconnected pad
151106 ~  ~ Removing copper in area:
151107 ~  ~ band
151108 ~  ~ relieving polygon ...
151109 ~  ~ Relieve with:
151110 ~  ~ Trimming area
151111 ~  ~ Relieve with:
151112 ~  ~ Tool shape
151113 ~  ~ Tool diameter
151114 ~  ~ Tool length
151115 ~  ~ Tool height
151116 ~  ~ Tool size
151117 ~  ~ Auto Copper Cleanup"
151118 ~  ~ Trim Copper
151119 ~  ~ Isolated copper (black)
151120 ~  ~ Connected copper (red)
151121 ~  ~ Remove selected isolated pocket (black)
151122 ~  ~ Rectangles
151123 ~  ~ Polygons
151124 ~  ~ Exports 
151125 ~  ~ Add Solder Paste/Glue Mask Items to padstacks 
151126 ~  ~ No available layers
151127 ~  ~ Bitmaps
151128 ~  ~ Solder Paste/Glue Mask layers
151129 ~  ~ Item shape
151130 ~  ~ With size calculated as
151131 ~  ~ of padstack frames on layer
151132 ~  ~ Percent
151133 ~  ~ Increase(+)/Decrease(-) size by
151134 ~  ~ Increase(+)/Decrease(-) length by
151135 ~  ~ Increase(+)/Decrease(-) width by
151136 ~  ~ Add Solder Paste/Glue Mask Items
151137 ~  ~ Rectangular
151138 ~  ~ Square
151139 ~  ~ Oval
151140 ~  ~ percentage
151141 ~  ~ fixed increase/decrease"
151142 ~  ~ Degrees
151143 ~  ~ Radians
151144 ~  ~ Full
151145 ~  ~ Fabrication data
151146 ~  ~ Assembly data
151147 ~  ~ All
151148 ~  ~ Default
151149 ~  ~ None
151150 ~  ~ Fabrication Exports
151151 ~  ~ GenCAM Export
151152 ~  ~ ODB++ Export
151153 ~  ~ GenCAM file name
151154 ~  ~ Export unit (coordinates)
151155 ~  ~ Export unit (angles)
151156 ~  ~ ODB++ Job Name
151157 ~  ~ Job Output Path
151158 ~  ~ Interpretation
151159 ~  ~ Settings
151160 ~  ~ Top solder paste layer
151161 ~  ~ Bottom solder paste layer
151162 ~  ~ ODB++ Job
151163 ~  ~ Output modes
151164 ~  ~ Remove EDA data
151165 ~  ~ Neutralize Nets
151166 ~  ~ Compressed output (.tgz)
151167 ~  ~ XML output
151168 ~  ~ Export mode
151169 ~  ~ Level (1-4)
151170 ~  ~ Level (1-6)
151171 ~  ~ Layer mode
151172 ~  ~  - Component & Via holes
151173 ~  ~ Scratch part
151174 ~  ~ part
151175 ~  ~ Component Name
151176 ~  ~ Assign
151177 ~  ~ Part Name
151178 ~  ~ Do not remove package template
151179 ~  ~ Package Name
151180 ~  ~ Assign new
151181 ~  ~ Suggest use 'Copy and Place' function
151182 ~  ~ SIncompatible package
151183 ~  ~ Reconsctruct component from package template
151184 ~  ~ Reassign Part for copied component
151185 ~  ~ Copy & Place Component
151186 ~  ~ Enter component name
151187 ~  ~ Pin #
151188 ~  ~ Assign Pin Number to Pad
151189 ~  ~ Allowed values in range from 1 to
151190 ~  ~ Package
151191 ~  ~ created in the PROJECT LIBRARY
151192 ~  ~ Can't create package - no pads
151193 ~  ~ Can't create package - there are PMD pads with hole diameter=0
151194 ~  ~ Can't create package - SMD pad positions on oposite sides of the board
151195 ~  ~ Can't create package - silkscreen items on oposite sides of the board
151196 ~  ~ Component by this name already exists:
151197 ~  ~ Part by this name already exists:
151198 ~  ~ Package by this name already exists:
151199 ~  ~ Part:
151200 ~  ~ is incompatible with reconstructed package
151201 ~  ~ 'Square' holes
151202 ~  ~ Remove package template items
151203 ~  ~ Please check whether Valor Gateway for ODB++ is installed and environment variable 'GW2ODB_DIR' is set
151204 ~  ~ ODB++ Export not supported on Windows 9X
151205 ~  ~ Meshed Copper Pour Areas display
151206 ~  ~ &IDF Import 3D view
151207 ~  ~ Including PMD Pads
151208 ~  ~ Including SMD Pads
151209 ~  ~ Importing
151210 ~  ~ Board outlines
151211 ~  ~ Silkscreen
151212 ~  ~ Remove previous import
151213 ~  ~ Pads & pads positions
151214 ~  ~ Import Category
151215 ~  ~ Mode
151216 ~  ~ Import to categories
151217 ~  ~ Display file?
151218 ~  ~ Unrecognized  format
151219 ~  ~ Nothing to import
151220 ~  ~ - Board Outline Export in G-CODE format
151221 ~  ~ Fabrication Export Formats
151222 ~  ~ G-CODE file name
151223 ~  ~ Board material thickness
151224 ~  ~ Include board outline
151225 ~  ~ Outline cutter diameter
151226 ~  ~ Cut outside board outline
151227 ~  ~ Cutouts 
151228 ~  ~ Include cutouts
151229 ~  ~ Cutouts cutter diameter
151230 ~  ~ Cut inside cutouts outline
151231 ~  ~ Pad slots
151232 ~  ~ Include slots
151233 ~  ~ Slots cutter diameter
151234 ~  ~ Cut inside slots outline
151235 ~  ~ Arc step length
151236 ~  ~ X Steps
151237 ~  ~ X Gap
151238 ~  ~ Y Steps
151239 ~  ~ Y Gap
151540 ~  ~ Metric (3.2)
151541 ~  ~ Metric (4.2)
151542 ~  ~ Copper Relief
151543 ~  ~ Tools to work with Copper Relief
151544 ~  ~ Trace Frames
151545 ~  ~ View traces in frame format
151546 ~  ~ Enter absolute XY-coordinates
151547 ~  ~ Enter XY-displacement from board datum
151548 ~  ~ Enter XY-displacement from current reference point
151549 ~  ~ Format: x,y
151550 ~  ~ Alignemt vector
151551 ~  ~ Currently in 
151552 ~  ~ Change assignment to 
151553 ~  ~ Redraw on selected XY-coordinates
151554 ~  ~ Remove assignment?
151555 ~  ~ Currently not assigned.
151556 ~  ~ Assign to:
151557 ~  ~ this file is not in correct format
151558 ~  ~ - Slots
151559 ~  ~ Can't create package - silkscreen items and SMD pad positions on oposite sides of the board
151560 ~  ~ Element transfer from category
151561 ~  ~ Select target category from list below:
151562 ~  ~ Proceed with transfer of category
151563 ~  ~ Category transfer to project should not be executed if Reconstruction from Graphics is planned.
151564 ~  ~ to project?
151565 ~  ~ No transfers allowed from category

151566 ~  ~ Core (double sided)
151567 ~  ~ Core(single sided)
151568 ~  ~ not calculated
151569 ~  ~ or Double Click on DIELECTRIC to change to
151570 ~  ~ Change dielectric
151571 ~  ~ to
151572 ~  ~ Design Rules Settings
151573 ~  ~ Select impedance controlled nets
151574 ~  ~ Available nets
151575 ~  ~ Save to design rules
151576 ~  ~ Trace segment too wide for this layer
151577 ~  ~ Trace segment too thin for this layer
151578 ~  ~ Detected trace segment with width less than allowed (Impedance controlled net)
151579 ~  ~ Parallel routing
151580 ~  ~ Enter spacing
151581 ~  ~ Can't relocate locked components
151582 ~  ~ Fit arc? (select 'No' for mitering)
151583 ~  ~ on wrong layer - blind via insert O.K?
151584 ~  ~ Delete all connectivity in current circuit.
151585 ~  ~ Entered parallel spacing
151586 ~  ~ is too small
151587 ~  ~ is too large
151588 ~  ~ Characteristic Impedance Calculator
151589 ~  ~ Inherit Trace Width from T-connection
151590 ~  ~ Display traces in XOR mode
151591 ~  ~ Auto-taper after routing
151592 ~  ~ Copper Pour Shortcuts Check
151593 ~  ~ Design Rules Check
151594 ~  ~ Unused Parts
151595 ~  ~ Netlist
151596 ~  ~ Object
151597 ~  ~ Problem
151598 ~  ~ No problems found
151599 ~  ~ Component(s):
151600 ~  ~ Available Net(s):
151601 ~  ~ Selected Net(s):
151602 ~  ~ Net with no nodes
151603 ~  ~ Single node net
151604 ~  ~ Parts(s)
151605 ~  ~ in trace:
151606 ~  ~ Via hole:
151607 ~  ~ Pad hole: 
151608 ~  ~ Conductor in component:
151609 ~  ~ Copper Pour Area Polygon
151610 ~  ~ See  Connectivity Check details above
151611 ~  ~ Isolated nodes detected
151612 ~  ~ Copper poured at: 
151613 ~  ~ Polygon vertex on layer 
151614 ~  ~ Shortcuts on layer
151615 ~  ~ Copper poured into all polygons on this layer
151616 ~  ~ Duplicated packing of:
151617 ~  ~ removed
151618 ~  ~ Can't read gate index
151619 ~  ~ Packaging corrupted
151620 ~  ~ Recreate components listed above
151621 ~  ~ also in
151622 ~  ~ Netlist errors fixed
151623 ~  ~ Trace errors fixed
151624 ~  ~ Wire errors fixed
151625 ~  ~ Vias with unknown padstack
151626 ~  ~ Via errors fixed
151627 ~  ~ and
151628 ~  ~ Not included as node in any net
151629 ~  ~ Split net. Trace branch
151630 ~  ~ Connected nodes in this brach
151631 ~  ~ Available Component(s):
151632 ~  ~ Selected Component(s):
151633 ~  ~ Split net. Copper Pour Area
151634 ~  ~ Nodes inside this area
151635 ~  ~ Unpackaged schematic components
151636 ~  ~ Straight
151637 ~  ~ Tapered
151638 ~  ~ Total length
151639 ~  ~ Total trace length
151640 ~  ~ Width at start
151641 ~  ~ Width at end
151642 ~  ~ Format
151643 ~  ~ Width at the start of segment
151644 ~  ~ Width at the end of segment
151645 ~  ~ Gate and entry name
151646 ~  ~ General Options
151647 ~  ~ Preferred routing layer
151648 ~  ~ Automatic trace project
151649 ~  ~ Correct clearance error by:
151650 ~  ~ After manual route or re-route:
151651 ~  ~ Correct errors starting from:
151652 ~  ~ Clearance Errors Auto-correction
151653 ~  ~ Re-routing the whole trace
151654 ~  ~ Re-routing conflicting trace segment
151655 ~  ~ Don't correct clearance error
151656 ~  ~ Ask to correct clearance errors
151657 ~  ~ Always correct clearance errors
151658 ~  ~ Currently routed trace
151659 ~  ~ Traces in conflict with routed trace
151660 ~  ~ Currently selected layer
151661 ~  ~ No recorded clearance errors found
151662 ~  ~ Results of latest clearence check:
151663 ~  ~ Fanout Autogeneration Setup: Component
151664 ~  ~ Renumber Components by name prefixes
151665 ~  ~ Component Name Prefixes
151666 ~  ~ Renumbering Mode
151667 ~  ~ Component Centre
151668 ~  ~ Mode
151669 ~  ~ Settings
151670 ~  ~ Row /Col. channel size
151671 ~  ~ Start Number
151672 ~  ~ Start from board corner
151673 ~  ~ Direction
151674 ~  ~ 
151675 ~  ~ Net(s):
151676 ~  ~ Double Click on DIELECTRIC to change
151677 ~  ~ Difference in parts
151678 ~  ~ Enter new label for via padstack
151679 ~  ~ Layout Editor is disabled. Close Oscillograph to continue
151680 ~  ~ 0. Checking Packaging
151681 ~  ~ Difference in parts:
151682 ~  ~ Can't read gate index in:
151683 ~  ~ Packaging OK
151684 ~  ~ Packaging corrupted - recreate components listed above
151685 ~  ~  Tested OK: 
151686 ~  ~ Removing conflicts. 
151687 ~  ~ Removing faulty fanouts. 
151688 ~  ~ Longer trace properties
151689 ~  ~ Select to edit ..


#FILE = E2KLAYRT.EXE  'EDWin 2000 Layout AutoRouter'

161 ~  ~ ! - Letter
162 ~  ~ # - Number
163 ~  ~ %   Completed:
164 ~  ~ %   Completed:
165 ~  ~ % of connections completed.
166 ~  ~ %. Process Interrupted.
167 ~  ~ &Clearance...
168 ~  ~ &Fanouts
169 ~  ~ &Layers...
1610 ~  ~ &Net
1611 ~  ~ &On Line
1612 ~  ~ Optimize cost
1613 ~  ~ &Parameters...
1614 ~  ~ &Stop
1615 ~  ~ Width && Via
1616 ~  ~ * - Symbols
1617 ~  ~ : Process Interrupted...
1618 ~  ~ ? - Symbol
1619 ~  ~ 1 via per pair
1620 ~  ~ 2 vias per pair
1621 ~  ~ 3 vias per pair
1622 ~  ~ Arizona Standard Router
1623 ~  ~ Autorouter
1624 ~  ~ Autorouting finished.
1625 ~  ~ Autorouting interrupted.
1626 ~  ~ Batch Design Error
1627 ~  ~ Strategy already exists
1628 ~  ~ C.MASK
1629 ~  ~ C.PRINT
1630 ~  ~ Can't create strategy in Project
1631 ~  ~ Can't find selected Strategy
1632 ~  ~ Can't find strategy in Project 
1633 ~  ~ Can't open strategy
1634 ~  ~ Can't save strategy
1635 ~  ~ Change Fanout
1636 ~  ~ Change Route
1637 ~  ~ Change ViaPadstack
1638 ~  ~ Change Width
1639 ~  ~ Chared fanouts
1640 ~  ~ CL
1641 ~  ~ CL HOR POWER SIGNAL
1642 ~  ~ CLEAN UP
1643 ~  ~ Clean Up...
1644 ~  ~ Cleanup  - Interrupted.
1645 ~  ~ Cleanup Pass number:
1646 ~  ~ Clearance
1647 ~  ~ CLEARANCE
1648 ~  ~ CLEARANCE  8 mils
1649 ~  ~ CLEARANCE 8 mils
1650 ~  ~ component no found
1651 ~  ~ connections.  Tested OK:
1652 ~  ~ Copy to clipboard
1653 ~  ~ Cost
1654 ~  ~ Create and Select Batch
1655 ~  ~ Create new
1656 ~  ~ Create, edit and select strategy
1657 ~  ~ Delete all fanouts for board.
1658 ~  ~ Delete and Reroute selected trace
1659 ~  ~ Delete fanouts completed.
1660 ~  ~ Deleting fanouts completed:
1661 ~  ~ Delete fanouts for selected component.
1662 ~  ~ Delete fanouts for selected net.
1663 ~  ~ Delete fanouts for selected pad.
1664 ~  ~ Delete fanouts...
1665 ~  ~ Delete fanouts:
1666 ~  ~ Delete selected trace
1667 ~  ~ Delete traces connecting selected component
1668 ~  ~ Delta X
1669 ~  ~ Delta Y
1670 ~  ~ Design Batch Error
1671 ~  ~ Part
1672 ~  ~ Deviation
1673 ~  ~ DEVIATION
1674 ~  ~ Deviation :
1675 ~  ~ DEVIATION 80%
1676 ~  ~ DEVIATION 90%
1677 ~  ~ DIRECTION ANY
1678 ~  ~ DIRECTION ANY (
1679 ~  ~ DIRECTION ANY (HUGE, HUGE)
1680 ~  ~ DIRECTION IN
1681 ~  ~ DIRECTION OUT
1682 ~  ~ DIRECTION X
1683 ~  ~ DIRECTION XY
1684 ~  ~ DIRECTION Y
1685 ~  ~ Directions
1686 ~  ~ Disable
1687 ~  ~ Display list of unrouted pairs
1688 ~  ~ DISTANCE
1689 ~  ~ DISTANCE 30 - 300 - 50 mils
1690 ~  ~ DISTANCE 30 - 300 - 50 mils
1691 ~  ~ Escape direction :
1692 ~  ~ Autorouter
1693 ~  ~ Standard Autorouter
1694 ~  ~ Autorouter
1695 ~  ~ No specified Strategy Name
1696 ~  ~ Enable
1697 ~  ~ Enable via
1698 ~  ~ Enter the menu of edit functions
1699 ~  ~ Enter the menu of fanouts functions
16100 ~  ~ Enter the menu of semi-auto functions
16101 ~  ~ Enter the menu of setup and auto functions
16102 ~  ~ Execute?
16103 ~  ~ existing traces in the layout Project.
16104 ~  ~ Fanout
16105 ~  ~ Fanout dimentions
16106 ~  ~ Fanout directions
16107 ~  ~ Fanout parameters
16108 ~  ~ For interrupting the process.
16109 ~  ~ Full
16110 ~  ~ HOR
16111 ~  ~ Huge
16112 ~  ~ HUGE)
16113 ~  ~ HUGE,
16114 ~  ~ Insert after
16115 ~  ~ Insert before
16116 ~  ~ Routing Interrupted.
16117 ~  ~ Invalid format of Strategy file
16118 ~  ~ is already exist. Overwrite it ?
16119 ~  ~ Key Route/Delete mode.
16120 ~  ~ Layer display status:
16121 ~  ~ LINE COST RIGHT
16122 ~  ~ LINE COST WRONG
16123 ~  ~ List of &Unroutes
16124 ~  ~ List of commands :
16125 ~  ~ Load Copper
16126 ~  ~ Load From 
16127 ~  ~ Load Strategy
16128 ~  ~ Loading components and symbols...
16129 ~  ~ Loading nets ...
16130 ~  ~ LROUTER_BATCH_
16131 ~  ~ Maximal
16132 ~  ~ Maximal deviation: 
16133 ~  ~ Maximal distance:
16134 ~  ~ mils
16135 ~  ~ mils
16136 ~  ~ mils
16137 ~  ~ Minimal
16138 ~  ~ Minimal distance:
16139 ~  ~ MITER
16140 ~  ~ Miter all orthogonal Traces (45º)
16141 ~  ~ Miter corners...
16142 ~  ~ MITER must be last command
16143 ~  ~ Mitering finished
16144 ~  ~ Mitering finished.
16145 ~  ~ Mitering terminates routing.
16146 ~  ~ Net Name:
16147 ~  ~ Nets :
16148 ~  ~ Nets parameters:
16149 ~  ~ New Strategy
16150 ~  ~ No traces found for testing...
16151 ~  ~ Node one
16152 ~  ~ Node two
16153 ~  ~ Number of Nets
16154 ~  ~ Number of pairs:
16155 ~  ~ Number of vias
16156 ~  ~ One axis
16157 ~  ~ Optimization pass completed.
16158 ~  ~ Optimization pass. Completed:
16159 ~  ~ OPTIMIZE
16160 ~  ~ Optimize...
16161 ~  ~ Out
16162 ~  ~ out
16163 ~  ~ Pairs
16164 ~  ~ Pan_Width
16165 ~  ~ Parameters
16166 ~  ~ Partial
16167 ~  ~ Pin to pin pairs:
16168 ~  ~ PMD
16169 ~  ~ PMD
16170 ~  ~ PMD OFF
16171 ~  ~ PMD ON
16172 ~  ~ POWER
16173 ~  ~ POWER  16 mils  #2
16174 ~  ~ POWER OFF
16175 ~  ~ POWER ON
16176 ~  ~ Predicted completion:
16177 ~  ~ Preparing Project ...
16178 ~  ~ Preparing trees ...
16179 ~  ~ Preroute fanouts completed.
16180 ~  ~ Preroute fanouts completed:
16181 ~  ~ Preroute fanouts for board.
16182 ~  ~ Preroute fanouts for selected component.
16183 ~  ~ Preroute fanouts for selected net.
16184 ~  ~ Preroute fanouts for selected pad.
16185 ~  ~ Preroute fanouts...
16186 ~  ~ Preroute fanouts...
16187 ~  ~ Preroute fanouts:
16188 ~  ~ Done
16189 ~  ~ REDUCE FULL
16190 ~  ~ REDUCE PARTIAL
16191 ~  ~ REDUCE SIMPLE
16192 ~  ~ Remove redundant Vias
16193 ~  ~ Remove redundant Vias...
16194 ~  ~ Removing Vias finished.
16195 ~  ~ Removing Vias finished.
16196 ~  ~ Removing Vias. Completed:
16197 ~  ~ Removing Vias. Predicted completion:
16198 ~  ~ Removing Vias. Predicted completion:
16199 ~  ~ RIPUP
16200 ~  ~ RIPUP OFF
16201 ~  ~ RIPUP ON
16202 ~  ~ Route component completed:
16203 ~  ~ Route component:
16204 ~  ~ Route on layers:
16205 ~  ~ Route selected trace
16206 ~  ~ Route traces connecting selected component
16207 ~  ~ Route...
16208 ~  ~ Routing Completed.
16209 ~  ~ Routing component...
16210 ~  ~ Routing scheme:
16211 ~  ~ S&trategy
16212 ~  ~ S.MASK
16213 ~  ~ S.PRINT
16214 ~  ~ Save Strategy
16215 ~  ~ Save To 
16216 ~  ~ Saving autorouted and preloaded traces will overwrite
16217 ~  ~ Select any column
16218 ~  ~ Select Name
16219 ~  ~ Select visible layers and upper layer
16220 ~  ~ Selected command :
16221 ~  ~ Selected Strategy
16222 ~  ~ Set optimize costs
16223 ~  ~ Setting Panel
16224 ~  ~ Setup costs:
16225 ~  ~ Setup clearances for pads, traces and vias
16226 ~  ~ Setup fanout parameters.
16227 ~  ~ Setup nets parameters
16228 ~  ~ Setup routing parameters
16229 ~  ~ Setup trace widths for nets
16230 ~  ~ SHARED
16231 ~  ~ SHARED 50 mils
16232 ~  ~ Shared fanouts
16233 ~  ~ SHARED NO
16234 ~  ~ SIGNAL
16235 ~  ~ SIGNAL 8 mils  #1
16236 ~  ~ SIGNAL OFF
16237 ~  ~ SIGNAL ON
16238 ~  ~ Simple
16239 ~  ~ SL
16240 ~  ~ SL VER POWER SIGNAL
16241 ~  ~ SMD
16242 ~  ~ SMD OFF
16243 ~  ~ SMD ON
16244 ~  ~ SMD only
16245 ~  ~ SOLD
16246 ~  ~ Sorting trees ...
16247 ~  ~ Start AutoRouter
16248 ~  ~ Status of layers
16249 ~  ~ Strategies :
16250 ~  ~ Strategy Design
16251 ~  ~ Strategy Files (*.BS)|*.BS
16252 ~  ~ Terminal
16253 ~  ~ TERMINAL
16254 ~  ~ TERMINAL WITH VIA
16255 ~  ~ TERMINAL WITHOUT VIA
16256 ~  ~ Test for conflicts...
16257 ~  ~ Testing
16258 ~  ~ Testing fanouts..
16259 ~  ~ Toggle on/off active layers for routing and setup their direction
16260 ~  ~ Too many MITER commands
16261 ~  ~ Trace (Right)
16262 ~  ~ TRACE COST RIGHT
16263 ~  ~ TRACE COST RIGHT 1
16264 ~  ~ Trace (Wrong)
16265 ~  ~ TRACE COST WRONG
16266 ~  ~ TRACE COST WRONG 2
16267 ~  ~ Trace width & via type selection:
16268 ~  ~ Trace wrong direction :
16269 ~  ~ Two axis
16270 ~  ~ Types :
16271 ~  ~ Unknown version of Strategy file
16272 ~  ~ Unrouted pairs:
16273 ~  ~ Unroutes
16274 ~  ~ Update Project and Exit
16275 ~  ~ Upper
16276 ~  ~ VER
16277 ~  ~ VIA  COST
16278 ~  ~ VIA  COST        50
16279 ~  ~ Via :
16280 ~  ~ VIA 1
16281 ~  ~ VIA 2
16282 ~  ~ VIA 3
16283 ~  ~ Via cost
16284 ~  ~ VIA COST 1
16285 ~  ~ VIA COST 2
16286 ~  ~ VIA COST 3
16287 ~  ~ VIA COST WITHOUT
16288 ~  ~ Via reduction
16289 ~  ~ VIA WITHOUT
16290 ~  ~ Visible
16291 ~  ~ WIDTH & VIA
16292 ~  ~ With via
16293 ~  ~ With vias
16294 ~  ~ Without
16295 ~  ~ Without via
16296 ~  ~ Wrong layer cost:
16297 ~  ~ X and Y
16298 ~  ~ X only
16299 ~  ~ Y only
16300 ~  ~ Zoom :
16301 ~  ~ Fix prerouted traces
16302 ~  ~
16303 ~  ~ Shared fanouts:
16304 ~  ~ Width :
16305 ~  ~ Type
16306 ~  ~ Delete all fanouts ?
16307 ~  ~ Saving Autorouted and Preloaded Traces in Project
16308 ~  ~ Load Board to Route from Project
16309 ~  ~ Load &Options ..
16310 ~  ~ &Fix Prerouted Traces
16311 ~  ~ Include &Copper Planes
16312 ~  ~ &Save Router Results in Project
16313 ~  ~ Not Loaded
16314 ~  ~ Autorouter
16315 ~  ~ Loaded
16316 ~  ~ &Layer Display Satus
16317 ~  ~ Component &Outlines
16318 ~  ~ &Unroutes
16319 ~  ~ Can't create router project
16320 ~  ~ Can't create router field array
16321 ~  ~ Can't load prerouted wires
16322 ~  ~ Finish autorouting
16323 ~  ~ Layer Status
16324 ~  ~ Orthogonalise traces on the board?
16325 ~  ~ My error:
16326 ~  ~ Before quitting the router, You have to update the project with the changes
16327 ~  ~ Click '&Update project and exit' to update the project
16328 ~  ~ Click 'E&xit' to quit without updating
16329 ~  ~ Dir.
16330 ~  ~ Pow
16331 ~  ~ Sig
16332 ~  ~ Y Value
16333 ~  ~ Without Vias
16334 ~  ~ Select Strategy
16335 ~  ~ Edit Strategy
16336 ~  ~ Too many bending points
16337 ~  ~ Position outside of board
16338 ~  ~ Nonorthogonal segment
16339 ~  ~ Illegal Sequence
16340 ~  ~ Invalid padstack shape
16341 ~  ~ Memory allocation error
16342 ~  ~ Memory lock error
16343 ~  ~ Memory reallocation error
16344 ~  ~ Too many components
16345 ~  ~ Too many Nodes
16346 ~  ~ Too many Pins
16347 ~  ~ Error reading Component
16348 ~  ~ Too many Nets
16349 ~  ~ Error reading net
16350 ~  ~ Too many Symbols
16351 ~  ~ Error reading Node
16352 ~  ~ Error reading padstack
16353 ~  ~ Too many padstack items
16354 ~  ~ Pad position outside of board
16355 ~  ~ Error creating trace
16356 ~  ~ Error creating via
16357 ~  ~ Error created Bending Point
16358 ~  ~ Error inserting trace record
16359 ~  ~ Merged nets on the board:
16360 ~  ~ Error deleting trace map
16361 ~  ~ Trace identification error
16362 ~  ~ Error deleting trace
16363 ~  ~ Invalid record status
16364 ~  ~ Invalid type of via
16365 ~  ~ Too many bending point in the net
16366 ~  ~ Too many Crossing Points in the Net
16367 ~  ~ Too many Traces in the net
16368 ~  ~ Error reading bending point
16369 ~  ~ Erorr reading trace
16370 ~  ~ Erorr reading Via
16371 ~  ~ Not found components:
16372 ~  ~ Connection Not found:
16373 ~  ~ Component name =
16374 ~  ~ Too many pairs (Bend-to-Bend) in one Net
16375 ~  ~ &Update Project and Exit
16376 ~  ~ Set Clearance Value :
16377 ~  ~ Setup costs
16378 ~  ~ &Load
16379 ~  ~ Create &New
16380 ~  ~ R&emove
16381 ~  ~ List of strategies in project:
16382 ~  ~ Strategy name :
16383 ~  ~ Error loading net to field
16384 ~  ~ Layer display status 
16385 ~  ~ Set/View layer status
16386 ~  ~ Select a command from the list of commands and use the insert buttons for adding to current strategy
16387 ~  ~ Dimensions :
16388 ~  ~ Directions :
16389 ~  ~ Wildcard
16390 ~  ~ Class 'Signal'  
16391 ~  ~ Class 'Power/Gnd' 
16392 ~  ~ Do you wish Layers settings to replace rules specified in Circuit Design Rules
16393 ~  ~ Text
16394 ~  ~ Net
16395 ~  ~ Trace record
16396 ~  ~ Copper Plane
16397 ~  ~ Erorr reading trace record
16398 ~  ~ Resetting Design Rules ...
16399 ~  ~ Do you wish Layers settings to override rules specified in Circuit Design Rules
16400 ~  ~ % of connections routed.
16401 ~  ~ Use these settings if not explicitly specified in design rules
16402 ~  ~ Override setting specified in design rules
16403 ~  ~ List filter 
16404 ~  ~ Routing Parameter Settings
16405 ~  ~ FANOUT
16406 ~  ~ Shared
16407 ~  ~ SETUP
16408 ~  ~ Clearance, Width & Via
16409 ~  ~ TEST
16410 ~  ~ Reduce
16411 ~  ~ VIA REDUCE
16412 ~  ~ ROUTE
16413 ~  ~ Rows Routing: 
16414 ~  ~ Bus Routing: 
16415 ~  ~ Components Routing:
16416 ~  ~ Scope :
16417 ~  ~ Valid DR :
16418 ~  ~ Routing
16419 ~  ~ Via Rules
16420 ~  ~ Trace Rules
16421 ~  ~ Clearances
16422 ~  ~ Autorouter
16423 ~  ~ Locked Edit
16424 ~  ~ Placement
16425 ~  ~ Net - 
16426 ~  ~ Comp - 
16427 ~  ~ Design Rule
16428 ~  ~ Not Used
16429 ~  ~ Routing layers & direction
16430 ~  ~ Layout Component Placement
16431 ~  ~ All Steps
16432 ~  ~ Design Rule:
16433 ~  ~ Signal
16434 ~  ~ Groups
16435 ~  ~ New Group Name
16436 ~  ~ Give a new group name.
16437 ~  ~ Page link
16438 ~  ~ Pass 
16439 ~  ~ Test for Conflicts
16440 ~  ~ Removed 
16441 ~  ~ Discard previous router results
16442 ~  ~ Multipass Routing?
16443 ~  ~ XY-Coordinates
16444 ~  ~ Redraw on selected XY-coordinates
16445 ~  ~ Enter absolute XY-coordinates
16446 ~  ~ Enter XY-displacement from board datum
16447 ~  ~ Enter XY-displacement from current reference point
16448 ~  ~ Format: x,y
16449 ~  ~  Failed:
16450 ~  ~ Routing pair connections. 
16451 ~  ~ Attempt to correct conflicts. 
16452 ~  ~ Board Routing Statistics:
16453 ~  ~  Total of node pair connections on the board: 
16454 ~  ~  Total of fixed pair connections on the board: 
16455 ~  ~  Number of fully connected node pairs: 
16456 ~  ~  Number of unrouted pairs: 
16457 ~  ~  Board routed in: 
16458 ~  ~ List of unrouted node pair connections:
16459 ~  ~ Batch Routing 
16460 ~  ~ Autorouter is disabled. Close Oscillograph to continue
16461 ~  ~ Dev

#FILE = E2KSIM.EXE 'EDWin 2000 Mixed Mode Simulator'


171 ~  ~ &About...
172 ~  ~ &AC Sweep
173 ~  ~ &Analog Nets
174 ~  ~ Analysis
175 ~  ~ &Bias Point
176 ~  ~ &Break
177 ~  ~ &CenterZoom
178 ~  ~ &Circuit
179 ~  ~ &Component
1710 ~  ~ &Continue
1711 ~  ~ &Copies:
1712 ~  ~ &Current
1713 ~  ~ &Current Display
1714 ~  ~ &DC Sweep
1715 ~  ~ &Delete TP
1716 ~  ~ &Diff. Volt.
1717 ~  ~ &Digital Nets
1718 ~  ~ Display Test point  Values
1719 ~  ~ &Edit
1720 ~  ~ End Frequency
1721 ~  ~ End value
1722 ~  ~ &Forces
1723 ~  ~ &Grid...
1724 ~  ~ Group Delay
1725 ~  ~ &Help
1726 ~  ~ &Imaginary Part
1727 ~  ~ &Magnitude
1728 ~  ~ &Move TP
1729 ~  ~ &Open voltage
1730 ~  ~ &Parameter
1731 ~  ~ &Phase
1732 ~  ~ &Primitives
1733 ~  ~ &Print
1734 ~  ~ Real Part
1735 ~  ~ &Setup..
1736 ~  ~ &Sim. Limits...
1737 ~  ~ &Start
1738 ~  ~ &State
1739 ~  ~ &TD Sim.
1740 ~  ~ &TD Simulation
1741 ~  ~ &TestPoints
1742 ~  ~ &View
1743 ~  ~ &Voltage
1744 ~  ~ &Voltage Display
1745 ~  ~ 'H','L','X','N' expected in gen def
1746 ~  ~ 'H','L','Z','X','D','U','N' expected in gen def
1747 ~  ~ , Pin
1748 ~  ~ \a&Help = F1
1749 ~  ~ 1st node
1750 ~  ~ About Simulator
1751 ~  ~ AboutBox
1752 ~  ~ AC &IN+
1753 ~  ~ AC &OUT+
1754 ~  ~ AC IN-
1755 ~  ~ AC OUT-
1756 ~  ~ AC Probe Points undefined !
1757 ~  ~ AC Simulation
1758 ~  ~ AC Simulation in progress
1759 ~  ~ AC Simulation Limits
1760 ~  ~ ACSIMLIMITS
1761 ~  ~ All
1762 ~  ~ All rights reserved by Norlinvest Ltd.
1763 ~  ~ Ambient &Temperature
1764 ~  ~ Analog Sim. Ste&p Time
1765 ~  ~ Analog Simulation Error
1766 ~  ~ Bias Point Calculation in progress
1767 ~  ~ Button
1768 ~  ~ C&lear
1769 ~  ~ C&urrent
1770 ~  ~ Clear
1771 ~  ~ Collate Cop&ies
1772 ~  ~ Comp. &Params
1773 ~  ~ Comp. Pa&rameter
1774 ~  ~ Complete current iteration and exit.
1775 ~  ~ Complete current step and exit.
1776 ~  ~ Component
1777 ~  ~ Component
1778 ~  ~ Components
1779 ~  ~ Copyright \251 1992-1997
1780 ~  ~ Create Testpoints IN+
1781 ~  ~ Create Testpoints IN-
1782 ~  ~ Create Testpoints OUT+
1783 ~  ~ Create Testpoints OUT-
1784 ~  ~ Create Testpoints To Display Logic State
1785 ~  ~ Create Testpoints To Display Logic WaveForm
1786 ~  ~ Cu&rrent Waveform
1787 ~  ~ DC points not Defined!
1788 ~  ~ Simulation Error
1789 ~  ~ DC Sweep in progress
1790 ~  ~ DC Sweep Limits
1791 ~  ~ Delete &All TPs
1792 ~  ~ Delete All Test Points ?
1793 ~  ~ Delete Mark Point
1794 ~  ~ Design &Notes
1795 ~  ~ Diagram
1796 ~  ~ Dig. Inputs
1797 ~  ~ Dig. Outputs
1798 ~  ~ Digital &Input
1799 ~  ~ Digital &Output
17100 ~  ~ Display
17101 ~  ~ Display &Iteration Errors
17102 ~  ~ Display Buffer Full
17103 ~  ~ Display Dia&gram
17104 ~  ~ Display waveform
17105 ~  ~ Mixed Mode Simulator
17106 ~  ~  Simulator
17107 ~  ~ Electronics Design for Windows
17108 ~  ~ Enter
17109 ~  ~ Error:
17110 ~  ~ Esc
17111 ~  ~ Floating Number &Precision
17112 ~  ~ FloatingMenu
17113 ~  ~ Force &D (down)
17114 ~  ~ Force &High
17115 ~  ~ Force &Low
17116 ~  ~ Force &Pulse
17117 ~  ~ Force &U (up)
17118 ~  ~ Force &X (unknown)
17119 ~  ~ Force &Z (high-imp)
17120 ~  ~ Frequency
17121 ~  ~ Frequency
17122 ~  ~ General Simulation Options
17123 ~  ~ Grid
17124 ~  ~ Grid Option
17125 ~  ~ Ground net (SPL0) must be present
17126 ~  ~ GroupDelay
17127 ~  ~ HIGH
17128 ~  ~ IN source
17129 ~  ~ Initialize LC
17130 ~  ~ Input
17131 ~  ~ Input A/Ds
17132 ~  ~ Invalid gen def nesting
17133 ~  ~ Iteration &Limit
17134 ~  ~ Iteration Limit reached...
17135 ~  ~ Iteration:
17136 ~  ~ L&inear
17137 ~  ~ L&ogar.
17138 ~  ~ Log&State Display
17139 ~  ~ Logic Part of the Circuit unstable.
17140 ~  ~ LogS&tate Waveform
17141 ~  ~ LOW
17142 ~  ~ M&ultimeter
17143 ~  ~ Magnitude
17144 ~  ~ MainMenu
17145 ~  ~ Matrix Solving Error
17146 ~  ~ Max. Iteration &Error
17147 ~  ~ Max:
17148 ~  ~ Min. Displayable Units
17149 ~  ~ Min:
17150 ~  ~ Mixed-Mode Simulation Preprocess Result
17151 ~  ~ MixSim
17152 ~  ~ MonoC&hrome
17153 ~  ~ Multimeter
17154 ~  ~ Net
17155 ~  ~ New Generator string:
17156 ~  ~ Not simulated component.
17157 ~  ~ OUT variable
17158 ~  ~ Output :
17159 ~  ~ Output D/As
17160 ~  ~ OverflowCheck
17161 ~  ~ &Preprocess
17162 ~  ~ Page No&tes
17163 ~  ~ Phase
17164 ~  ~ Phase range
17165 ~  ~ PICK (Pix)
17166 ~  ~ Points per &Decade
17167 ~  ~ Preproced the Circuit
17168 ~  ~ PREPROCESS
17169 ~  ~ Preprocessing Error
17170 ~  ~ Print
17171 ~  ~ Print &Quality:
17172 ~  ~ Print to Fi&le
17173 ~  ~ Printer:
17174 ~  ~ Pts/&Dec
17175 ~  ~ Real
17176 ~  ~ Redraw
17177 ~  ~ Reference net undefined
17178 ~  ~ Run Transient Analysis or Bias Point Calculations first !
17179 ~  ~ S&hort current
17180 ~  ~ S&tart Frequency
17181 ~  ~ S&tart value
17182 ~  ~ Se&t
17183 ~  ~ Select &Page...
17184 ~  ~ Select Page
17185 ~  ~ set to
17186 ~  ~ SetupDialog
17187 ~  ~ SIMLIMITS
17188 ~  ~ SIMMESSAGES
17189 ~  ~ SIMPROGRESS_
17190 ~  ~ Simulation Messages
17191 ~  ~ Simulation Time Li&mit
17192 ~  ~ Simulator
17193 ~  ~ Simulator for 
17194 ~  ~ Snap
17195 ~  ~ Sol&ve
17196 ~  ~ St&ep
17197 ~  ~ Static
17198 ~  ~ Status
17199 ~  ~ Sweep
17200 ~  ~ Sweep Mode
17201 ~  ~ Sweep Variables
17202 ~  ~ SWEEPLIMITS
17203 ~  ~ System Default
17204 ~  ~ T&est TP
17205 ~  ~ T-VOLTM.BMP
17206 ~  ~ T-VOLTW.BMP
17207 ~  ~ TD Simulation
17208 ~  ~ TD Simulation in progress
17209 ~  ~ TD Simulation Limits
17210 ~  ~ TDSIMLIMITS
17211 ~  ~ Te&mperature
17212 ~  ~ TEMP
17213 ~  ~ Temp.
17214 ~  ~ Temperature
17215 ~  ~ Test Point To Display Current
17216 ~  ~ Test Point To Display Current WaveForm
17217 ~  ~ Test Point To Display Voltage
17218 ~  ~ Test Point To Display Voltage WaveForm
17219 ~  ~ Testpoint To Activate Place Voltage Reference
17220 ~  ~ Time
17221 ~  ~ To Activate Multimeter
17222 ~  ~ To Check Test Point
17223 ~  ~ To Create Logic State Generators
17224 ~  ~ To Delete Test Point
17225 ~  ~ To Force 'D' Logic Level
17226 ~  ~ To Force 'H' Logic Level
17227 ~  ~ To Force 'L' Logic Level
17228 ~  ~ To Force 'U' Logic Level
17229 ~  ~ To Force 'X' Logic Level
17230 ~  ~ To Force 'Z' Logic Level
17231 ~  ~ To Move Test Point
17232 ~  ~ To View Simulation Parameters Of Components
17233 ~  ~ Too many nets
17234 ~  ~ ToolsData
17235 ~  ~ Unrecoverable exit from current iteration loop.
17236 ~  ~ Unrecoverable exit from iteration loop.
17237 ~  ~ Update Generator String
17238 ~  ~ Update Generator string:
17239 ~  ~ Version 1.52
17240 ~  ~ Vo&ltage Waveform
17241 ~  ~ Voltage Re&ference
17242 ~  ~ wn SIM: Access to wrong ANALOG PIN %d in %s\r\n
17243 ~  ~ wn SIM: Wrong use LOGPEEK(%d) in %s\r\n
17244 ~  ~ wn SIM: Wrong use LOGPOKE(%d) in %s\r\n
17245 ~  ~ Yes
17246 ~  ~ ZIMP
17247 ~  ~ &Record Test Point Values
17248 ~  ~ &Open Test Point Values Record File for Append
17249 ~  ~ &Save Recorded Test Point Values 
17250 ~  ~ Recorded Test Point Values:  
17251 ~  ~ Borrow Spice Params
17252 ~  ~ Load from library
17253 ~  ~ Save to library
17254 ~  ~ Load
17255 ~  ~ Return
17256 ~  ~ Select Model Library
17257 ~  ~ Find Model
17258 ~  ~ Select Model :
17259 ~  ~ Find
17260 ~  ~ Description      :
17261 ~  ~ Model Lib Name :
17262 ~  ~ Borrow Spice Parameters
17263 ~  ~ Specific Variant :
17264 ~  ~ Model Code     :
17265 ~  ~ Load Component Parameters
17266 ~  ~ Copy
17267 ~  ~ Delete
17268 ~  ~ Sim Code :
17269 ~  ~ Drive Not Accessible
17270 ~  ~ Error
17271 ~  ~  items
17272 ~  ~ Can't Load Model :
17273 ~  ~ Select a Part
17274 ~  ~ Message
17275 ~  ~ Model type selected not applicable
17276 ~  ~ Simulation Functions mismatch
17277 ~  ~ Are you sure to load parameters of
17278 ~  ~ for the selected symbol ?
17279 ~  ~ Can't Find Part
17280 ~  ~ Simulator - Select target parameter library
17281 ~  ~ Invalid File Extension
17282 ~  ~ Overwrite model
17283 ~  ~ in Library:
17284 ~  ~ Can't Create Model :
17285 ~  ~ from library :
17286 ~  ~ Can't Delete Model :
17287 ~  ~ Save Parameters in Library
17288 ~  ~ Model Lib.Id.
17289 ~  ~ Model Lib Name :
17290 ~  ~ Save Parameters in Library
17291 ~  ~ Save
17292 ~  ~ characters
17293 ~  ~ Preset marker
17294 ~  ~ Reference Point marker
17295 ~  ~ Test point marker
17296 ~  ~ Waveform marker
17297 ~  ~ No Recorded Test Point values to Save
17298 ~  ~ Assign parameters for:
17299 ~  ~ Original Symbol has been restored
17300 ~  ~ Restore old symbol
17301 ~  ~ Accept new simulation function
17302 ~  ~ Edit Simulation Function:
17303 ~  ~ AC Sweep
17304 ~  ~ DC Sweep
17305 ~  ~ No simulation function attached to component
17306~  ~ Transient
17307~  ~ Simulation Limits 
17308~  ~ Bias Point Calculation
17309~  ~ DC Sweep Analysis
17310~  ~ AC Sweep Analysis
17311~  ~ Setup Simulation Parameters
17312~  ~ Run Analysis
17313~  ~ is not properly added. Preprocess the circuit
17314~  ~ EMA_SI
17315 ~  ~ Component [1]:
17316 ~  ~ Component [2]:
17317 ~  ~ Uniform
17318 ~  ~ Gaussian
17319 ~  ~ YMaximum
17320 ~  ~ Maximum
17321 ~  ~ Minimum
17322 ~  ~ Raise Edge
17323 ~  ~ Monte Carlo
17324 ~  ~ Sensitivity
17325 ~  ~ Monte Carlo points not Defined!
17326 ~  ~ Monte Carlo Simulation Error
17327 ~  ~ Sensitivity Analysis aborted...
17328 ~  ~ Analysis completed...
17329 ~  ~ Transient Analysis in progress...
17330 ~  ~ Transient Analysis Analysis aborted...
17331 ~  ~ Analysis completed...
17332 ~  ~ Parameter sweep Analysis in progress ...
17333 ~  ~ Parameter sweep Analysis aborted
17334 ~  ~ DC Sweep Analysis in progress ...
17335 ~  ~ DC Sweep Analysis aborted ...
17336 ~  ~ AC Sweep Analysis in progress ...
17337 ~  ~ AC Sweep Analysis aborted ...
17338 ~  ~ Monte-Carlo Analysis in progress ...
17339 ~  ~ Monte-Carlo Analysis aborted ...
17340 ~  ~ Bias Point Analysis in progress ...
17341 ~  ~ Sensitivity Analysis in progress ...
17342 ~  ~ Sensitivity Analysis
17343 ~  ~ Parameter Sweep Analysis
17344 ~  ~ Monte Carlo Analysis
17345 ~  ~ Tolerance :
17346 ~  ~ Step Value :
17347 ~  ~ Input format : x1, x2, x3...., xn
17348 ~  ~ Variables not selected for Nested DC Sweep Analysis !
17349 ~  ~ Variables not selected for MonteCarlo Analysis
17350 ~  ~ Variables not selected for Sensitivity Analysis !
17351 ~  ~ Fill Comp(2)
17352 ~  ~ Fill Comp(1)
17353 ~  ~ Start value
17354 ~  ~ Analysis Type
17355 ~  ~ Pts/Dec
17356 ~  ~ Parameter Name
17357 ~  ~ Parameter value
17358 ~  ~ Parameter value not defined!
17359 ~  ~ Parameter Analysis
17360 ~  ~ General Settings
17361 ~  ~ Max.Iteration Error
17362 ~  ~ Iteration Limit
17363 ~  ~ Floating No. Precision
17364 ~  ~ Display Iteration Errors
17365 ~  ~ Display TP Values
17366 ~  ~ %Change in Parameter Value
17367 ~  ~ Analog Sim. Step Time
17368 ~  ~ OUT Source
17369 ~  ~ Components for DC Analysis not selected
17370 ~  ~ Component for Parameter Analysis not selected 
17371 ~  ~ Component(s) for MonteCarlo Analysis not Selected 
17372 ~  ~ Transient Analysis not executed
17373 ~  ~ Parameter Sweep Analysis not executed
17374 ~  ~ DC Sweep Analysis not executed
17375 ~  ~ AC Analysis not executed
17376 ~  ~ Analysis results
17377 ~  ~ Si&mulation
17378 ~  ~ Net/Node not selected for Fourier Analysis !
17379 ~  ~ Wavelength longer than time span !
17380 ~  ~ Error: Insufficient samples. Interpolation failed !
17381 ~  ~ Error: polydegree greater than no of samples, can't interpolate !
17382 ~  ~ Failed to Interpolate: Internal Error !
17383 ~  ~ Memory insufficient. Allocation failed !
17384 ~  ~ Net/Node not selected for MonteCarlo Analysis !
17385 ~  ~ Fundamental Frequency
17386 ~  ~ No. of Harmonics (nfreq)
17387 ~  ~ Deg. of Polynomial (polydegree)
17388 ~  ~ Fourier Analysis in progress ...
17389 ~  ~ Fourier Analysis aborted ...
17390 ~  ~ Fourier Analysis completed...
17391 ~  ~ Error in Circuit, Simulation Aborted ...
17392 ~  ~ Error in Circuit, Preprocess failed ...
17393 ~  ~ Description :
17394 ~  ~ Sim. Code :
17395 ~  ~ Assign Parameters
17396 ~  ~ Model Lib. Name
17397 ~  ~ Specific Variant
17398 ~  ~ Library Path
17399 ~  ~ Select Library Files
17400 ~  ~ Mixed-Mode Simulator
17401 ~  ~ Circuit Preprocess in progress, please wait ...
17402 ~  ~ Preprocess completed
17403 ~  ~ Initializing parameters, please wait ...
17404 ~  ~ Simulation Function :
17405 ~  ~ Sim Function :
17406 ~  ~ Component Parameter Setup
17407 ~  ~ Current
17408 ~  ~ Sim. Time Limits
17409 ~  ~ Parameter Desc
17410 ~  ~ View &Log File
17411 ~  ~ Transient Analysis:-
17412 ~  ~ Parameter Analysis:-
17413 ~  ~ DC Sweep Analysis:-
17414 ~  ~ AC Sweep Analysis:-
17415 ~  ~ Monte Carlo Analysis:-
17416 ~  ~ Sensitivity Analysis:-
17417 ~  ~ Fourier Analysis:-
17418 ~  ~ Simulation Messages:-
17419 ~  ~ Bias Point Calculation:-
17420 ~  ~ Variable
17421 ~  ~ Select variable to display
17422 ~  ~ Set Time per Division
17423 ~  ~ X /div
17424 ~  ~ X - Scale
17425 ~  ~ Multiply X axis
17426 ~  ~ Y /div
17427 ~  ~ Y - Scale
17428 ~  ~ Multiply Y axis
17429 ~  ~ Step Time
17430 ~  ~ Stop
17431 ~  ~ Multiply X axis with
17432 ~  ~ Set Volts/Amps per division
17433 ~  ~ Multiply Y axis with
17434 ~  ~ Set simulation step time
17435 ~  ~ Set LC initialization mode
17436 ~  ~ Start simulation
17437 ~  ~ Pause simulation
17438 ~  ~ Stop simulation
17439 ~  ~ &Run Transient analysis (Ocillograph)
17440 ~  ~ OSCILLOGRAPH - Transient Analysis
17441 ~  ~ Continue simulation
17442 ~  ~ Insufficient memory!
17443 ~  ~ Too many samples per division.
17444 ~  ~ Next step
17445 ~  ~ Step by step simulation
17446 ~  ~ Step
17447 ~  ~ View with Black Background
17448 ~  ~ View Messages
17449 ~  ~ Mixedmode Simulator is disabled. Close Oscillograph in Edspice Simulator.
17450 ~  ~ Run Transient Analysis (Oscillograph)
17451 ~  ~ Simulation model cannot be assigned while Oscillograph is running
17452 ~  ~ Hierarchy cannot be changed while Oscillograph is running
17453 ~  ~ No test points can be added while Oscilllograph is running
17454 ~  ~ No reference points can be added while Oscillograph is running
17455 ~  ~ Test points cannot be recorded while Oscillograph is running
17456 ~  ~ Test point cannot be displayed while Oscillograph is running
17457 ~  ~ Net info cannot be displayed while Oscillograph is running
17458 ~  ~ View with White Background
17459 ~  ~ Input Variable
17460 ~  ~ Record PWL File
17461 ~  ~ Record Output as PWL File
17462 ~  ~ Assign Input Variable for Transfer Function Analysis
17463 ~  ~ Assign Output Variable for Transfer Function Analysis
17464 ~  ~ Input and Output Variables for Transfer Function Analysis are same
17465 ~  ~ Simulation model cannot be assigned while Oscillograph/Logic Analyzer is running
17466 ~  ~ Select Clock Pattern...
17467 ~  ~ &Set Pattern
17468 ~  ~ Single Pattern:
17469 ~  ~ Repeatable Pattern:
17470 ~  ~ Clock Editor

#FILE = E2KDIAGR.EXE  'EDWin 2000 Waveform viewer'


181 ~  ~ About Waveform viewer
182 ~  ~ &Add...
183 ~  ~ &Auto Redraw
184 ~  ~ Common-units
185 ~  ~ &Copy
186 ~  ~ &Delete...
187 ~  ~ &Diagram
188 ~  ~ &Enable...
189 ~  ~ &File
1810 ~  ~ &FillScreen
1811 ~  ~ &Merge ...
1812 ~  ~ Move to last
1813 ~  ~ &New
1814 ~  ~ &No of Samples
1815 ~  ~ &Open ...
1816 ~  ~ &Options...
1817 ~  ~ Overlapped
1818 ~  ~ &Parameters...
1819 ~  ~ &Print...
1820 ~  ~ &Redraw
1821 ~  ~ &Save ...
1822 ~  ~ &Separated
1823 ~  ~ &Variables
1824 ~  ~ <- Error !
1825 ~  ~ Recalc
1826 ~  ~ << Reset
1827 ~  ~ A&uto FillScreen
1828 ~  ~ ABORT
1829 ~  ~ About
1830 ~  ~ Actual string
1831 ~  ~ Apply
1832 ~  ~ Available %d buffers %u samples each
1833 ~  ~ Axis description
1834 ~  ~ BkgColor
1835 ~  ~ BUFFER
1836 ~  ~ Cannot print.
1837 ~  ~ Co&lors...
1838 ~  ~ COLORCAT
1839 ~  ~ ColorLogH
1840 ~  ~ ColorLogL
1841 ~  ~ ColorLogName
1842 ~  ~ ColorLogWordValue
1843 ~  ~ ColorLogWordWave
1844 ~  ~ ColorLogX
1845 ~  ~ ColorLogZ
1846 ~  ~ ColorWordValue
1847 ~  ~ ColorWordWave
1848 ~  ~ Create Symbol
1849 ~  ~ Creating Symbol
1850 ~  ~ Cur&ves...
1851 ~  ~ D&isable...
1852 ~  ~ Data not available in %s.
1853 ~  ~ Delete variable %s ?
1854 ~  ~ Diagram Drawing Options
1855 ~  ~ Waveform Viewer
1856 ~  ~ Waveform Viewer - %s
1857 ~  ~ Diagram Hardcopy
1858 ~  ~ DiagramGen
1859 ~  ~ DiagramIcon
1860 ~  ~ DiagramTableWClass
1861 ~  ~ DiagramTestWClass
1862 ~  ~ Disable
1863 ~  ~ Display Data Files (*.MCR)\0
1864 ~  ~ Do you want to save %s
1865 ~  ~ EDIT
1866 ~  ~ Waveform Viewer
1867 ~  ~ Enable
1868 ~  ~ Enter Symbol Name
1869 ~  ~ Error %d creating %s.
1870 ~  ~ Error %d opening %s.
1871 ~  ~ Expression:
1872 ~  ~ ExtTextOut
1873 ~  ~ i value
1874 ~  ~ Insufficient memory to load Waverform Viewer
1875 ~  ~ Invalid Expression!
1876 ~  ~ Linear
1877 ~  ~ Loading stopped
1878 ~  ~ Log. Raster
1879 ~  ~ Logarithmic
1880 ~  ~ Logical Values
1881 ~  ~ MAINHIER
1882 ~  ~ Memory insufficient
1883 ~  ~ Meta
1884 ~  ~ MULTIVARSELECT
1885 ~  ~ New
1886 ~  ~ Normal
1887 ~  ~ NULL Abort window handle
1888 ~  ~ Number of samples:
1889 ~  ~ NUMBERUPDATE
1890 ~  ~ O&verlapped
1891 ~  ~ OPTIONS
1892 ~  ~ Out
1893 ~  ~ Parameters of the Variable
1894 ~  ~ Placement mode
1895 ~  ~ recordsize
1896 ~  ~ Save the Color Setting ?
1897 ~  ~ Scaling mode
1898 ~  ~ Select
1899 ~  ~ Select Variables
18100 ~  ~ Select-Diplay
18101 ~  ~ Show Cursor
18102 ~  ~ Symbol Already Exist, Overwrite?
18103 ~  ~ Symbol Deleted
18104 ~  ~ Symbol Name
18105 ~  ~ Table
18106 ~  ~ Thick lines
18107 ~  ~ Title:
18108 ~  ~ Too many samples in %s.
18109 ~  ~ Unable to draw!. Error in the Input Data.
18110 ~  ~ Unable to start print job
18111 ~  ~ Units location
18112 ~  ~ Units:
18113 ~  ~ UNTITLED
18114 ~  ~ Va&lues
18115 ~  ~ Values
18116 ~  ~ Variable name
18117 ~  ~ Variable Name:
18118 ~  ~ Variable Select
18119 ~  ~ VARPARAMS
18120 ~  ~ VarSelected
18121 ~  ~ &Window
18122 ~  ~ X Variable:
18123 ~  ~ X-axis
18124 ~  ~ XColor
18125 ~  ~ Y Variables:
18126 ~  ~ Y-axis
18127 ~  ~ YColors
18128 ~  ~ Zoom Area
18129 ~  ~ Co&lors...
18130 ~  ~ OK
18131 ~  ~ Diagram Color Assignment
18132 ~  ~ Diagram Frame
18133 ~  ~ Crv. 1
18134 ~  ~ Crv. 2
18135 ~  ~ Crv. 3
18136 ~  ~ Crv. 4
18137 ~  ~ Crv. 5
18138 ~  ~ Crv. 6
18139 ~  ~ Crv. 7
18140 ~  ~ Crv. 8
18141 ~  ~ LogVar Name
18142 ~  ~ Logic Z-IMP
18143 ~  ~ Logic LOW
18144 ~  ~ Logic HIGH
18145 ~  ~ Logic X
18146 ~  ~ Word Waveform
18147 ~  ~ Word Value
18148 ~  ~ Background
18149 ~  ~ Printer Hardcopy
18150 ~  ~ To print spooler
18151 ~  ~ Select a Variable
18152 ~  ~ For  Mixed Mode Simulators
18153 ~  ~  
18154 ~  ~  
18155 ~  ~ Copy Screen to Clip Board\tCtrl+C
18156 ~  ~ Re&draw\tF3
18157 ~  ~ Mixed Mode Simulator Help
18158 ~  ~ &Setup...
18159 ~  ~ No
18160 ~  ~ Copyright © 1992-1997
18161 ~  ~ Can't Read File :
18162 ~  ~ File Not Found
18163 ~  ~ Symbol Library File Name:
18164 ~  ~ Number of Symbols
18165 ~  ~ Select Library
18166 ~  ~ Symbol Files:
18167 ~  ~ Bits
18168 ~  ~ Variables
18169 ~  ~ Save all Waveforms
18170 ~  ~ Save all to project
18171 ~  ~ Save all
18172 ~  ~ Waveform Files
18173 ~  ~ Display data files
18174 ~  ~ Save all waveforms as disk file(*.mcr
18175 ~  ~ Saves all waveforms to project
18176 ~  ~ Digital Source Files
18177 ~  ~ PWL Source Files
18178 ~  ~ Cannot allocate more than 1000 samples/division. X-Division is adjusted
18179 ~  ~
18180 ~  ~
18181 ~  ~
18182 ~  ~
18183 ~  ~
18184 ~  ~
18185 ~  ~
18186 ~  ~
18187 ~  ~
18188 ~  ~
18189 ~  ~
18190 ~  ~
18191 ~  ~
18192 ~  ~
18193 ~  ~
18194 ~  ~
18195 ~  ~
18196 ~  ~
18197 ~  ~
18198 ~  ~
18199 ~  ~
18200 ~  ~ Available
18201 ~  ~ buffers
18202 ~  ~ samples each
18203 ~  ~ Monochrome
18204 ~  ~ Logic analyzer
18205 ~  ~ Word Format Output
18206 ~  ~ Word Size
18207 ~  ~ 8 Bit
18208 ~  ~ 16 Bit
18209 ~  ~ Time :
18210 ~  ~ Value
18211 ~  ~ Values:
18212 ~  ~ Bin
18213 ~  ~ Dec
18214 ~  ~ Oct
18215 ~  ~ Hex
18216 ~  ~ Recal >
18217 ~  ~ 32 Bit
18218 ~  ~ Digital Source Output
18219 ~  ~ PWL Source Output
18220 ~  ~ Setup PWL output format
18221 ~  ~ Voltage / Current :
18222 ~  ~ Low :
18223 ~  ~ High :
18224 ~  ~ Save PWL Source Output
18225 ~  ~ Save Digital Source Output
18226 ~  ~ Set High Greater than Low
18227 ~  ~ Reset
18228 ~  ~ Open waveforms from project:
18229 ~  ~ Save waveform to project:
18230 ~  ~ Open
18231 ~  ~ Enter a Name to Save!
18232 ~  ~ Already exists! Enter new Name
18233 ~  ~ Select Waveform File to Load
18234 ~  ~ No waveforms currently saved in project
18235 ~  ~ Save Display Data File
18236 ~  ~ Delete Curve   :
18237 ~  ~ Recalculate
18238 ~  ~ Save &file as
18239 ~  ~ &Digital Source Output
18240 ~  ~ &PWL Source Output
18241 ~  ~ Binary
18242 ~  ~ Decimal
18243 ~  ~ Octal
18244 ~  ~ HexaDecimal
18245 ~  ~ Edit curve
18246 ~  ~ <<   Default
18247 ~  ~ Save colors
18248 ~  ~ Select Color  :
18249 ~  ~ Y -  Variables  :
18250 ~  ~ Separated
18251 ~  ~ X -  Variable  :
18252 ~  ~ Curve Title :
18253 ~  ~ Select Curve  :
18254 ~  ~ Add Curve
18255 ~  ~ Delete Curve
18256 ~  ~ Function :
18257 ~  ~ Argument Variable :
18258 ~  ~ Curve Name :
18259 ~  ~ Dark Red
18260 ~  ~ Dark Green
18261 ~  ~ Dark Yellow
18262 ~  ~ Dark Blue
18263 ~  ~ Dark Magenta
18264 ~  ~ Dark Cyan
18265 ~  ~ Dark Gray
18266 ~  ~ Light Gray
18267 ~  ~ Red
18268 ~  ~ Green
18269 ~  ~ Yellow
18270 ~  ~ Blue
18271 ~  ~ Magenta
18272 ~  ~ Cyan
18273 ~  ~ White
18274 ~  ~ Voltage/Current
18275 ~  ~ Save Waveform as:
18276 ~  ~ Select zoom rectangle
18277 ~  ~ Set Low greater than High
18278 ~  ~ Waveform viewer
18279 ~  ~ Send waveform to project as special part:
18280 ~  ~ Error creating file :
18281 ~  ~ :  From Ref Point  :
18282 ~  ~ Open waveform file(*.mcr)
18283 ~  ~ Save active Waveform
18284 ~  ~ Save active waveform as disk file(*.mcr
18285 ~  ~ Open from project
18286 ~  ~ Opens a waveform stored in project
18287 ~  ~ Save to project
18288 ~  ~ Saves a waveform to project
18289 ~  ~ Print active waveform
18290 ~  ~ Prints active waveform
18291 ~  ~ Select zoom Area
18292 ~  ~ View waveform as curves seperated
18293 ~  ~ View waveform as curves overlapped
18294 ~  ~ Common units
18295 ~  ~ View waveform as all curves having common Units
18296 ~  ~ View waveform in monochrome
18297 ~  ~ Waveform properties
18298 ~  ~ Edit properties for active waveform
18299 ~  ~ Logic analyzer for digital simulation
18300 ~  ~ Create as special part in project
18301 ~  ~ Send waveform to project library as a special part
18302 ~  ~ Reset waveform
18303 ~  ~
18304 ~  ~ Resets active waveform
18305 ~  ~ Create special part
18306 ~  ~ &Reset
18307 ~  ~ Main menu
18308 ~  ~ Cascade
18309 ~  ~ Tile horizontally
18310 ~  ~ Tile vertically
18311 ~  ~ Arrange icons
18312 ~  ~ Add/Edit curves
18313 ~  ~ Axes
18314 ~  ~ Insufficient memory to open more waveforms
18315 ~  ~ Select curves to display
18316 ~  ~ Select curves to display(Max: 8)
18317 ~  ~ Displays previous 8 curves
18318 ~  ~ Displays next 8 curves
18319 ~  ~ Previous
18320 ~  ~ Curves
18321 ~  ~ Curve name should not be a numeric value!
18322 ~  ~ Enter a string
18323 ~  ~ Add new curve
18324 ~  ~ Mixed Mode Simulator
18325 ~  ~ EDSpice Simulator
18326 ~  ~  Invalid File Format
18327 ~  ~ Open file type (*.mcr)
18328 ~  ~ Old format
18329 ~  ~ Open files of type


#FILE = E2KFMEED.EXE  'EDWin 2000 EEDIII to EDWin ASCII Conversion'

191 ~  ~ ' was missing in previously loaded SCHEMATIC ASCII file.
192 ~  ~ (Netlist Test)
193 ~  ~ (Wirelist Test)
194 ~  ~ and
195 ~  ~ ASCII Project load cancelled
196 ~  ~ ASCII Project loaded O.K
197 ~  ~ Can't Create Padstack Item
198 ~  ~ Can't Create Via Padstack
199 ~  ~ Can't read Component ID=
1910 ~  ~ Can't read Entry Nr:
1911 ~  ~ Can't read Net ID=
1912 ~  ~ Can't read Net Node:
1913 ~  ~ Can't reconctruct Bus/Net crossreferences
1914 ~  ~ Can't reconstruct Copper Plane/Net crossrefrences
1915 ~  ~ Can't reconstruct Padstacks
1916 ~  ~ Can't reconstruct Page Outline
1917 ~  ~ Can't reconstruct Schematic/Layout Netlist.
1918 ~  ~ Can´t create net:
1919 ~  ~ Can´t create node in net:
1920 ~  ~ Check for components which may use this Part!
1921 ~  ~ Check nets:
1922 ~  ~ COMP.LAYER
1923 ~  ~ Coordinates in ASCII Project can't offset from Board/Page Outline
1924 ~  ~ Coordinates/Sizes in ASCII Project must be in inches
1925 ~  ~ Part '
1926 ~  ~ Converted EED3 Project
1927 ~  ~ Project
1928 ~  ~ EED3 Project Conversion
1929 ~  ~ EED3 Lay.ASCII Files(*.ALA)|*.ALA
1930 ~  ~ EED3 Sch.ASCII Files(*.ASC)|*.ASC
1931 ~  ~ EEDIII to EDWin ASCII Project Conversion
1932 ~  ~ Integrating Layout ASCII Project
1933 ~  ~ Load and integrate EED3 Schematics&&Layout ASCII Projects
1934 ~  ~ Load EED3 Layout ASCII Project
1935 ~  ~ Load EED3 Schematic ASCII Project
1936 ~  ~ Load Options:
1937 ~  ~ Loading Layout ASCII Project
1938 ~  ~ Loading Schematic ASCII Project
1939 ~  ~ Node in other Net:
1940 ~  ~ Node referenced in this trace/branch record is either missing or in other net.
1941 ~  ~ Reconstructing Bus references
1942 ~  ~ Reconstructing Copper Planes
1943 ~  ~ Reconstructing Padstacks
1944 ~  ~ Reconstructing Page Outlines
1945 ~  ~ Reconstructing Wirelist - phase 1
1946 ~  ~ Reconstructing Wirelist - phase 2
1947 ~  ~ Record will be omitted.
1948 ~  ~ Schematic and Layout Netlists don`t match
1949 ~  ~ Select EED3 Layout ASCII Project to Load:
1950 ~  ~ Select EED3 Schematic ASCII Project to Load:
1951 ~  ~ Testing Layout WireList
1952 ~  ~ Testing Schematic Netlist
1953 ~  ~ Testing Traces
1954 ~  ~ Testing Wires
1955 ~  ~ This indicates that Project may be not properly back- or frontannotated.
1956 ~  ~ Unknown ASCII Project Version
1957 ~  ~ View
1958 ~  ~ will not be loaded.
1959 ~  ~ EEDIII to
1960 ~  ~ ASCII Project Conversion

#FILE = E2KTOEED.EXE  'EDWin 2000 Export EED3 ASCII Project'

201 ~  ~ ASCII Projects (*.ALA)|*.ALA
202 ~  ~ ASCII Projects (*.ASC)|*.ASC
203 ~  ~ Can't Find Package
204 ~  ~ Can't Find Symbol
205 ~  ~ COMP.LAY
206 ~  ~ Con&vert
207 ~  ~ Conversion Cancelled
208 ~  ~ Conversion completed O.K
209 ~  ~ COPPER.
2010 ~  ~ Part
2011 ~  ~ to EED Layer Conversion:
2012 ~  ~ To EED3 ASCII Project Conversion
2013 ~  ~ to EED3 Conversion
2014 ~  ~ EED3 - ASCII Project File Name:
2015 ~  ~ Error In Saving Buses
2016 ~  ~ Error In Saving Project Header
2017 ~  ~ Error In Saving Parts
2018 ~  ~ Error In Saving Junctions
2019 ~  ~ Error In Saving Layout Components
2020 ~  ~ Error In Saving Netlist
2021 ~  ~ Error In Saving Page Format
2022 ~  ~ Error In Saving Schematic Components
2023 ~  ~ Error In Saving Symbols
2024 ~  ~ Error In Saving Text sizes
2025 ~  ~ Error In Saving TextItems
2026 ~  ~ Error In Saving Wirelist
2027 ~  ~ Export Layout Project  to EED3
2028 ~  ~ Export  Schematic Project to EED3
2029 ~  ~ Saving Board Outline
2030 ~  ~ Saving Buses
2031 ~  ~ Saving Parts
2032 ~  ~ Saving Header
2033 ~  ~ Saving Junction Points
2034 ~  ~ Saving Layout Components
2035 ~  ~ Saving Packages
2036 ~  ~ Saving Schematic Components
2037 ~  ~ Saving Symbols
2038 ~  ~ Saving Schematic Texts
2039 ~  ~ Saving Text Size Table
2040 ~  ~ Saving Wires
2041 ~  ~ Select Project:
2042 ~  ~ SOLD.LAY
2043 ~  ~ Will be omitted


#FILE = E2KTFMST.EXE  'EDWin 2000 MAXROUTE Translator'

2168 ~  ~ .min
2169 ~  ~ before translation of MAXROUTE ASCII file.
2170 ~  ~ to Massteck Layer Conversion:
2171 ~  ~ To/From MAXROUTE Translator
2172 ~  ~  
2173 ~  ~ from MAXROUTE ASCII File Name:
2174 ~  ~ Import results from MAXROUTE Autoplacer
2175 ~  ~ Import results from MAXROUTE Autorouter
2176 ~  ~ Inializing Net
2177 ~  ~ Initializing Tables:
2178 ~  ~ Layer Map
2179 ~  ~ Massteck
2181 ~  ~ MAXROUTE Translator
2182 ~  ~ Mirrored
2183 ~  ~ Processing Component
2184 ~  ~ Processing Padstack
2185 ~  ~ Retry Enabled
2186 ~  ~ Routing Enabled
2187 ~  ~ Saving Board Boundaries
2188 ~  ~ Saving Header Information
2189 ~  ~ Saving Layer
2190 ~  ~ Saving Layout Component
2191 ~  ~ Saving Net
2192 ~  ~ Saving Obstacles
2193 ~  ~ Saving Padstack
2194 ~  ~ Saving Prerouted Traces
2195 ~  ~ Saving Texts
2196 ~  ~ Select Routing Layers and Spacing :
2197 ~  ~ Set Value
2198 ~  ~ Share Enabled
2199 ~  ~ Shove Enabled
21100 ~  ~ Spacing:
21101 ~  ~ To MAXROUTE ASCII File Name:
21102 ~  ~ Trace Widths & Vias
21103 ~  ~ Track to Pad:
21104 ~  ~ Track to Track:
21105 ~  ~ Track to Via:
21106 ~  ~ Translate Project to MAXROUTE ASCII file
21107 ~  ~ Uid
21108 ~  ~ Via padstack No:
21109 ~  ~ Via to Pad:
21110 ~  ~ Via to Via
21111 ~  ~ VIA1
21112 ~ ~ Layer conversion
21113 ~ ~ Conversion to Massteck layer 
21114 ~ ~ Translate Project to MAXROUTE ASCII file
21115 ~ ~ Import from file :
21116 ~ ~ Export to file :
21117 ~ ~ Layer &Map
21118 ~ ~ Spacing
21119 ~ ~ Set Routing Layers
21120 ~ ~ Trace Widths & Vias
21121 ~ ~ Trace && Vias
21122 ~ ~ Trace Width && Via
21123 ~ ~ layers
21124 ~ ~ Browse ...
21125 ~ ~ Click for setup
21126 ~ ~ Translate
21127 ~ ~ Project to MAXROUTE ASCII file

#FILE = E2KTFSPC.EXE  'EDWin 2000 To/ From SPECCTRA Translator'

2255 ~  ~ Antipad (Hrf pad) gap:
2256 ~  ~ back
2257 ~  ~ before translation of SPECCTRA Routes file.
2258 ~  ~ Buried via gap:
2259 ~  ~ Design Files (*.DSN)|*.DSN
2260 ~  ~ Direction:
2261 ~  ~ Drill gap:
2262 ~  ~ To/From SPECCTRA Translator
2263 ~  ~ 
2264 ~  ~ Extra via will be created.
2265 ~  ~ front
2266 ~  ~ Global clearance:
2267 ~  ~ Grids:
2268 ~  ~ has been found in .RTE file
2269 ~  ~ has been found in .RTE file.
2270 ~  ~ Import results from SPECCTRA Autoplacer
2271 ~  ~ Import results from SPECCTRA Autorouter
2272 ~  ~ inch)
2273 ~  ~ Layer Type:
2274 ~  ~ mixed
2275 ~  ~ mm)
2276 ~  ~ No via found defined in this position.
2277 ~  ~ node not found:
2278 ~  ~ Normal
2279 ~  ~ pcb
2280 ~  ~ PCB
2281 ~  ~ place
2282 ~  ~ placement
2283 ~  ~ Placer files (*.plc)|*.plc
2284 ~  ~ plc
2285 ~  ~ PMD pad <> turn gap:
2286 ~  ~ Pnets:
2287 ~  ~ Power/GND nets:
2288 ~  ~ Protect
2289 ~  ~ Routes files (*.rte)|*.rte
2290 ~  ~ Saving Boundaries
2291 ~  ~ Saving design descriptor
2292 ~  ~ Saving Padstacks
2293 ~  ~ Select Trace Layer  types and routing directions:
2294 ~  ~ Signal Nets:
2295 ~  ~ SMD pad <> turn gap:
2296 ~  ~ SMD pad<>Via same net:
2297 ~  ~ SPECCTRA  AutoPlacer File Name:
2298 ~  ~ SPECCTRA Design File Name:
2299 ~  ~ SPECCTRA Routes File Name:
22100 ~  ~ SPECCTRA Translator
22101 ~  ~ Specctra:
22102 ~  ~ Terminal via in pos:
22103 ~  ~ Trace Widths & Vias & Grids:
22104 ~  ~ Traces:
22105 ~  ~ Translate  Project to SPECCTRA design file
22106 ~  ~ type fix
22107 ~  ~ type normal
22108 ~  ~ type protect
22109 ~  ~ type route
22110 ~  ~ Unconnected via in pos:
22111 ~  ~ Via<>Via same net:
22112 ~  ~ Vias:
22113 ~  ~ VIAx
22114 ~  ~ vertical
22115 ~  ~ horizontal
22116 ~  ~ signal
22117 ~  ~ power
22118 ~  ~ Translate Project to SPECCTRA design file
22119 ~  ~ Layer Type
22120 ~  ~ Layer  types && directions
22121 ~  ~ Trace widths,vias & grids
22122 ~  ~ Trace, Vias && Grids
22123 ~  ~ 
22124 ~  ~ SPECCTRA router/Placer file name:
22125 ~  ~ Auto router file:
22126 ~  ~ Auto placer file:
22127 ~  ~ Specctra
22128 ~  ~ File integrity check successful
22129 ~  ~ Session file:
22130 ~  ~ Syntax error: Parenthesis mismatch
22131 ~  ~ Can't open file
22132 ~  ~ Syntax error in Session file, translator exiting
22133 ~  ~ Unknown file format
22134 ~  ~ File type mismatch
22135 ~  ~ No parameters set for prerouted traces.
22136 ~  ~ Ignore existing traces?
22137 ~  ~ Translate
22138 ~  ~ project to SPECCTRA design file


#FILE = E2KDXFSC.EXE  'EDWin 2000 Export DXF Schematic'

231 ~  ~ DXF Schematics Export
232 ~  ~ DXF Schematics Export
233 ~  ~ Schematics DXF Export
234 ~  ~ ENTITIES Page:

#FILE = E2KDXFLY.EXE  'EDWin 2000 Export EDWin DXF layout'

241 ~  ~ $COPPER
242 ~  ~ $VIA
243 ~  ~ &Board Outline
244 ~  ~ &Comp. Outlines
245 ~  ~ &Contents
246 ~  ~ &Pads
247 ~  ~ &Vias
248 ~  ~ BLOCKS /Via Padstacks
249 ~  ~ Board Description
2410 ~  ~ Comp. &Names
2411 ~  ~ Coppe&r
2412 ~  ~ Layout DXF Export
2413 ~  ~ ENTITIES /Lay. Comps
2414 ~  ~ ENTITIES /Lay. Texts
2415 ~  ~ ENTITIES /Traces
2416 ~  ~ ENTITIES /Vias
2417 ~  ~ Layout DXF Export
2418 ~  ~ Select contents
2419 ~  ~ True Sizes
2420 ~  ~ 3d Out
2421 ~  ~ 3D Contents
2422 ~  ~ Autocad Library
2423 ~  ~  Library
2424 ~  ~ Board Face
2425 ~  ~ Board Side Face
2426 ~  ~ Board Thickness in MM
2427 ~  ~ Select location of drawing files for packages
2428 ~  ~ Plating Thickness 
2429 ~  ~ In mm
2430 ~  ~ Board Thickness 

#FILE = E2KVIEWR.EXE  'EDWin 2000 Project Viewer

291 ~  ~ &Settings Panel
292 ~  ~ Active Layers
293 ~  ~ Airgap View
294 ~  ~ Always On Top
295 ~  ~ Can't find component:
296 ~  ~ Close &All
297 ~  ~ Project have Changed
298 ~  ~ Viewer
299 ~  ~ Viewer is quitting
2910 ~  ~ Viewer(1)
2911 ~  ~ Entry Number
2912 ~  ~ New &Instance
2913 ~  ~ PA Text
2914 ~  ~ Pad Numbers
2915 ~  ~ Page format Undefined
2916 ~  ~ Page outline
2917 ~  ~ Ratsnests
2918 ~  ~ Scale             ZoomMode              Grid             Hierarchies/Pages
2919 ~  ~ Sy&mbol
2920 ~  ~ True  Size
2921 ~  ~ View Package
2922 ~  ~ View Layout
2923 ~  ~ View Symbol
2924 ~  ~ View Schematic
2925 ~  ~ Project Viewer(1)
2926 ~  ~ Print ...
2927 ~  ~ Zoom Block in Main Editors
2928 ~  ~ &White Background
2929 ~  ~ Board Cabinet View
2930 ~  ~ Tool to work with 3D Board Viewer
2931 ~  ~ Tool to work with 3D Trace Viewer
2932 ~  ~ 3D Board Cabinet Viewer
2933 ~  ~ Tool to work with 3D Board Cabinet Viewer
2934 ~  ~ Package List [ Project Library ]
2935 ~  ~ 3D View
2936 ~  ~ Close other 3D View
2937 ~  ~ Duplicate in 'Board Cutouts'
2938 ~  ~ Duplicate in 'Template Outlines'
2939 ~  ~ Tool No.
2940 ~  ~ Dcode:
2941 ~  ~ Polygon (macro or special aperture)
2942 ~  ~ Holes with diameter
2943 ~  ~ Original Dcode:
2944 ~  ~ Pad position

#FILE = E2KWRIMP.EXE  'EDWin 2000 Wirelist Import [EED3 format]'

301 ~  ~ &EED/EDWin
302 ~  ~ &OrCad PCB II
303 ~  ~ (also in:
304 ~  ~ Board Outline Definition Invalid
305 ~  ~ Bus member already exist
306 ~  ~ Can't add Bus member
307 ~  ~ Can't Create Board Outline
308 ~  ~ Can't create Bus
309 ~  ~ Can't create Net:
3010 ~  ~ Can't Create Page Outline
3011 ~  ~ Can't find component:
3012 ~  ~ Can't find Package:
3013 ~  ~ Can't find Symbol:
3014 ~  ~ Can't read group in Part:
3015 ~  ~ Collecting Componet References
3016 ~  ~ Coordinates out of range
3017 ~  ~ Creating Componets
3018 ~  ~ Part not found:
3019 ~  ~ Disk Error
3020 ~  ~ Wirelist Import 
3021 ~  ~ Wirelist Import (OrCad PCB II format)
3022 ~  ~ Wirelist(*.WRL)|*.WRL
3023 ~  ~ Exit Main before You run EED3 to EDWin conversion
3024 ~  ~ File Empty
3025 ~  ~ Fo&rmat
3026 ~  ~ Import
3027 ~  ~ Import cancelled.
3028 ~  ~ Importing Wirelist
3029 ~  ~ Invalid Pin Number:
3030 ~  ~ Less then 3 corners
3031 ~  ~ Net already exists:
3032 ~  ~ Node already in other Net:
3033 ~  ~ OrCad PCB II Wirelist(*.NET)|*.NET
3034 ~  ~ Page Outline Definition Invalid
3035 ~  ~ Pin number to high
3036 ~  ~ Rotation out of range
3037 ~  ~ Select Wirelist to Import:
3038 ~  ~ symbol not found:
3039 ~  ~ Unresolved Component Refrences.
3040 ~  ~ Wirelist file:
3041 ~  ~ Wirelist Import
3042 ~  ~ Wirelist Import - Unresolved Component References:
3043 ~  ~ Wirelist Import cancelled
3044 ~  ~ Wirelist Import failed - Disk/Data Error
3045 ~  ~ Wirelist imported O.K
3046 ~  ~ Wirelist Load Error:
3047 ~  ~ Append Wirelist Mode:

#FILE = E2KLIBDC.EXE  'EDWin 2000 Library List Generator'

311 ~  ~ ! no package
312 ~  ~ ! no symbol
313 ~  ~ &Start
314 ~  ~ 'Used in Part' List
315 ~  ~ (in libraries:)
316 ~  ~ *** PART DESCRIPTIONS IN LIBRARIES ***
317 ~  ~ *** PARTS WITH MISSING PACKAGES ***
318 ~  ~ *** PARTS WITH MISSING SYMBOLS ***
319 ~  ~ *** PACKAGES IN  LIBRARIES ***
3110 ~  ~ *** SYMBOLS IN  LIBRARIES ***
3111 ~  ~ All Files
3112 ~  ~ Can't Continue
3113 ~  ~ Check Symbol Libraries
3114 ~  ~ Collecting references from:
3115 ~  ~ Current operation takes time
3116 ~  ~ Part Library
3117 ~  ~ Part Name
3118 ~  ~ Part Name(s)
3119 ~  ~ parts...
3120 ~  ~ Partlist.txt
3121 ~  ~ Dir. For Part Libs
3122 ~  ~ Dir. For Packages
3123 ~  ~ Dir. For Symbols
3124 ~  ~ Disk full
3125 ~  ~ List Generator
3126 ~  ~ Part list File Name:
3127 ~  ~ Library List File Name:
3128 ~  ~ File Already open
3129 ~  ~ File List
3130 ~  ~ Following Parts are contained in the Library
3131 ~  ~ Generating list for:
3132 ~  ~ Generating list...
3133 ~  ~ Grps
3134 ~  ~ Initializing tables...
3135 ~  ~ Internal Err
3136 ~  ~ is not Complete
3137 ~  ~ Package Name
3138 ~  ~ Laylist.txt
3139 ~  ~ Package
3140 ~  ~ Library File Name
3141 ~  ~ List Generator
3142 ~  ~ Merging
3143 ~  ~ Missing Symbol
3144 ~  ~ No files selected
3145 ~  ~ No. of Groups
3146 ~  ~ not found in any library
3147 ~  ~ Out of Memory
3148 ~  ~ Out of Stack Space
3149 ~  ~ Panel3D3
3150 ~  ~ Preview
3151 ~  ~ Print Format Options
3152 ~  ~ Print Selection
3153 ~  ~ references...
3154 ~  ~ Symbol(s)
3155 ~  ~ Symbol Name
3156 ~  ~ Symbol(s)
3157 ~  ~ Selected File(s)
3158 ~  ~ Set Directory
3159 ~  ~ Sim.Code
3160 ~  ~ Simulation Code
3161 ~  ~ Sorting
3162 ~  ~ Sorting...
3163 ~  ~ Start
3164 ~  ~ symbols...
3165 ~  ~ The list created in the file
3166 ~  ~ The list is created in the file
3167 ~  ~ Project &Properties
3168 ~  ~ Pre&view
3169 ~  ~ Circuit &Properties
3170 ~  ~ Diagram &Properties
3171 ~  ~ Page &Properties
3172 ~  ~ Layout &Properties
3173 ~  ~ Net &Properties
3174 ~  ~ &Find (Ctrl+F)
3175 ~  ~ Library Item &Properties
3176 ~  ~ Part &Properties
3177 ~  ~ &Search output of
3178 ~  ~ Symbol &Properties
3179 ~  ~ Package &Properties
3180 ~  ~ Padstack &Properties
3181 ~  ~ &Open ListBook
3182 ~  ~ &Send to ListBook
3183 ~  ~ Open ListBook
3184 ~  ~ Send to ListBook
3185 ~  ~ List properties
3186 ~  ~ Preview list
3187 ~  ~ Enter List Name:
3188 ~  ~ Generating part items...
3189 ~  ~ Generating symbol items...
3190 ~  ~ Generating package items...
3191 ~  ~ package(s)
3192 ~  ~ Generating padstack items...
3193 ~  ~ padstack(s)
3194 ~  ~ Searching library details...
3195 ~  ~ object(s) selected
3196 ~  ~ Generating item details...
3197 ~  ~ [PROJECT LIBRARY]
3198 ~  ~ Properties - 
3199 ~  ~ Page Properties 
31100 ~  ~ Generating project details...
31101 ~  ~ Generating all circuit details...
31102 ~  ~ Generating circuit details...
31103 ~  ~ Generating diagram details...
31104 ~  ~ Generating all page details...
31105 ~  ~ Generating page details...
31106 ~  ~ Generating layout details...
31107 ~  ~ Generating net details...
31108 ~  ~ Generating hierarchy details...
31109 ~  ~ Search Finished
31110 ~  ~ Padstacks
31111 ~  ~ Hierarchy
31112 ~  ~ Search Not Found
31113 ~  ~ Preview Output
31114 ~  ~ Library Items
31115 ~  ~ Generating
31116 ~  ~ item(s)...
31117 ~  ~ &Merge List
31118 ~  ~ &List Viewer
31119 ~  ~ Merge list(s)
31120 ~  ~ Delete list(s)
31121 ~  ~ View list
31122 ~  ~ Save As...
31123 ~  ~ Search List&Name
31124 ~  ~ List(s)
31125 ~  ~ Are yot sure you want to delete the selected item(s) from List Book?
31126 ~  ~ Enter Merge Name:
31127 ~  ~ List Book
31128 ~  ~ List Name
31129 ~  ~ Class
31130 ~  ~ Current operation takes time, Accept?
31131 ~  ~ Update current Item List?
31132 ~  ~ Circuit Properties
31133 ~  ~ Output is too long to be displayed in Preview. Open Output in Text Viewer?
31134 ~  ~ Processing property
31135 ~  ~ takes time, Accept?
31136 ~  ~ Ctrl+A - SelectAll Ctrl+U - UnselectAll
31137 ~  ~ Write to DiskFile
31138 ~  ~ Refresh
31139 ~  ~ Search all library
31140 ~  ~ Search all library for
31141 ~  ~ &Search all library...
31142 ~  ~ List is too long to be displayed in Preview. Open list in Text Viewer?
31143 ~  ~ Search output list
31144 ~  ~ Search list of
31145 ~  ~ Select Library Location for
31146 ~  ~ &Library path
31147 ~  ~ &Insert Format
31148 ~  ~ Insert Format
31149 ~  ~ &Generate List
31150 ~  ~ Generate List
31151 ~  ~ Small Icons
31152 ~  ~ Library path(s) found invalid and reset to default
31153 ~  ~ Path Invalid
31154 ~  ~ Search String cannot be empty
31155 ~  ~ &Checked
31156 ~  ~ &Unchecked
31157 ~  ~ &Search library...
31158 ~  ~ Search library
31159 ~  ~ Select &Library
31160 ~  ~ like
31161 ~  ~ Select Hide/Show Settings:
31162 ~  ~ Cancel job and exit List Generator?

#FILE = E2KSPCVR.EXE  'EDWin 2000 Spice Viewer'

321 ~  ~ Current Line is :
322 ~  ~ Spice Viewer
323 ~  ~ File Viewer
324 ~  ~ File exceeds the Limit of 64281 lines
325 ~  ~ Find Next
326 ~  ~ Find what:
327 ~  ~ NEXT
328 ~  ~ Nothing to Search
329 ~  ~ Page Copy
3210 ~  ~ Total No of Lines is :
3211 ~  ~ Casca&de
3212 ~  ~ Clos&e All
3213 ~  ~ De&lete
3214 ~  ~ &Find...
3215 ~  ~ Tile &Horizontally
3216 ~  ~ &Open...
3217 ~  ~ Page Se&tup...
3218 ~  ~ &Replace...
3219 ~  ~ Save &As...
3220 ~  ~ Set &Font...
3221 ~  ~ Tile &Vertically
3222 ~  ~ &Word Wrap
3223 ~  ~ File Viewer
3224 ~  ~ F&ind what
3225 ~  ~ R&eplace with
3226 ~  ~ Match &Case
3227 ~  ~ &Find Next
3228 ~  ~ &Replace
3229 ~  ~ Replace &All
3230 ~  ~ Replace
3231 ~  ~ No open documents.
3232 ~  ~ open document(s).
3233 ~  ~ File Viewer (
3234 ~  ~ Cannot find the specified string : 
3235 ~  ~ Not found



#FILE = E2KLIBSC.EXE  'EDWin 2000 Library Search Engine'

331 ~  ~ &Alias (gating&&pinout)
332 ~  ~ &Context
333 ~  ~ &Element Code (EDSpice)
334 ~  ~ &Full Part Name
335 ~  ~ &Name
336 ~  ~ &Simulation Code (Mixed-Mode)
337 ~  ~ &Subcircuit (EDSpice)
338 ~  ~ &Used by Part
339 ~  ~ (Not all Libs Scanned!)
3310 ~  ~ ,library,
3311 ~  ~  [ASCII string]
3312 ~  ~ [Name]
3313 ~  ~ [Name]
3314 ~  ~ [Prefix]
3315 ~  ~ [Wildcard]
3316 ~  ~ ALIAS
3317 ~  ~ ALIAS,
3318 ~  ~ CMOS
3319 ~  ~ Context:
3320 ~  ~ Context: EDSpice Element Codes:
3321 ~  ~ Context: EDSpice Library Subcircuits:
3322 ~  ~ Context: Mixed ModeSimulation Codes:
3323 ~  ~ Part(s) found
3324 ~  ~ Part(s) found [ESPice Simulatation]
3325 ~  ~ Part(s) found [Mixed-Mode Simulatation]
3326 ~  ~ EDSpice Simulation reference
3327 ~  ~ EDSpice Simulation reference:
3328 ~  ~ Library Search Engine
3329 ~  ~ Library Search Engine (PARTS)
3330 ~  ~ Library Search Engine (PACKAGES)
3331 ~  ~ Library Search Engine (SYMBOLS)
3332 ~  ~ External Index Code:
3333 ~  ~ Find Now
3334 ~  ~ for Aliases
3335 ~  ~ for EDSPice Element:
3336 ~  ~ for Sim Code:
3337 ~  ~ for Symbols
3338 ~  ~ full name:
3339 ~  ~ Packages
3340 ~  ~ Package(s) found
3341 ~  ~ Library File:
3342 ~  ~ Options valid for this context:
3343 ~  ~ or ASCII string in code ex.
3344 ~  ~ or ASCII string in full name ex.
3345 ~  ~ or ASCII string in name ex.
3346 ~  ~ or ASCII string in reference ex.
3347 ~  ~ or full name prefix ex.
3348 ~  ~ or name prefix ex.
3349 ~  ~ or wildcard and full name prefix ex.
3350 ~  ~ or wildcard and name prefix ex.
3351 ~  ~ or wildcard and prefix ex.
3352 ~  ~ Remarks
3353 ~  ~ Symbol(s)
3354 ~  ~ Symbol
3355 ~  ~ Symbol(s) found
3356 ~  ~ Symbol(s) found [EDSPice Simulatation]
3357 ~  ~ Symbol(s) found [Mixed-Mode Simulatation]
3358 ~  ~ Search for:
3359 ~  ~ Simulation &Reference (Edspice)
3360 ~  ~ Trans*
3361 ~  ~ Transistor??????????
3362 ~  ~ USAGE
3363 ~  ~ USAGEL
3364 ~  ~ USAGEL,
3365 ~  ~ USAGES
3366 ~  ~ USAGES,
3367 ~  ~ XOR
3368 ~  ~ Family Lib.
3369 ~  ~ Loading Library References ...
3370 ~  ~ Parsing Spice Circuit Element Profiles ...
3371 ~  ~ Parsing Spice Model Profiles ...
3372 ~  ~ Building Spice Subcircuit References ...
3373 ~  ~ Building Mixed Mode Simulator References ...
3374 ~  ~ Building Spice Model Parameters Library References ...
3375 ~  ~ Library Search Engine Options
3376 ~  ~ Context String Search: 
3377 ~  ~ Mixed-Mode Simulator Models: 
3378 ~  ~ Analog Models
3379 ~  ~ Digital Models
3380 ~  ~ EDSpice Library:
3381 ~  ~ Standard Circuit Elements
3382 ~  ~ Code Models
3383 ~  ~ Subcircuit Family:   


#FILE = E2KSPCED.EXE 'EDWin 2000 EDSpice Simulator'

341 ~  ~ &Circuit (SPICE Netlist)
342 ~  ~ Circuit Elements
343 ~  ~ &DC Transfer Function
344 ~  ~ &Diagram Contents for:
345 ~  ~ &EDSpice Reference
346 ~  ~ Fourier Analysis
347 ~  ~ &How to use EDSpice
348 ~  ~ &Model Library Editor
349 ~  ~ &Noise Analysis
3410 ~  ~ Operating Point Analysis
3411 ~  ~ Pole-Zero Analysis
3412 ~  ~ &Preprocess
3413 ~  ~ &Print (Stout) Contents for:
3414 ~  ~ &Rawfile
3415 ~  ~ &Sim
3416 ~  ~ &Simulation Engine
3417 ~  ~ &Simulation Paramers for:
3418 ~  ~ &Standard Output
3419 ~  ~ &Temperatures
3420 ~  ~ Transient Analysis
3421 ~  ~ &View EDSpice Files
3422 ~  ~ (F)
3423 ~  ~ (Fourier Analysis)
3424 ~  ~ (hier:
3425 ~  ~ (lib:
3426 ~  ~  (polyn.)
3427 ~  ~ - not a SPICE element
3428 ~  ~ - not a SPICE element.
3429 ~  ~ .model
3430 ~  ~ .SBC file not found]
3431 ~  ~ : (Netlist view)
3432 ~  ~ : GND Node not set
3433 ~  ~ : Operating Point Analysis
3434 ~  ~  [ EDSpice id:
3435 ~  ~ [ Edspice Node Id:
3436 ~  ~ [incomplete node assignment]
3437 ~  ~ [instance parameters not set
3438 ~  ~ [Invalid/missing def. of input/output nodes]
3439 ~  ~ [model parameters not set
3440 ~  ~ [s]
3441 ~  ~ [SUBCKT:Node
3442 ~  ~ [unknown model]
3443 ~  ~ AC Analysis
3444 ~  ~ AC Sensitivity
3445 ~  ~ AC Sensitivity Analysis
3446 ~  ~ Add Ref.
3447 ~  ~ All files(*.*)|*.*
3448 ~  ~ All Points
3449 ~  ~ already exist. Overwrite?
3450 ~  ~ already set as GND Node !
3451 ~  ~ already set as Subcircuit I/O Node
3452 ~  ~ already taged
3453 ~  ~ Analyses cannot be executed with above Hierarchy Stack
3454 ~  ~ &Apply
3455 ~  ~ as
3456 ~  ~ As Marked
3457 ~  ~ Assign Hierarchy as Subcircuit
3458 ~  ~ Assign Library Subcircuit
3459 ~  ~ Attach Function
3460 ~  ~ Branch Current marker
3461 ~  ~ Branch Currents:
3462 ~  ~ Bus member text
3463 ~  ~ Bus name text
3464 ~  ~ Calling:
3465 ~  ~ Can't add String type parameters to this component:
3466 ~  ~ can't create)
3467 ~  ~ Can't Export the rawfile
3468 ~  ~ characters.
3469 ~  ~ Circuit description comment:
3470 ~  ~ Circuit not fully defined - cannot be simulated
3471 ~  ~ Circuit Preprocessing:
3472 ~  ~ Circuit Save failed
3473 ~  ~ Circuit Saved O.K.
3474 ~  ~ cmdllp=
3475 ~  ~ Code       Function
3476 ~  ~ Coefficients: p0, p1, p3 , ....,pn
3477 ~  ~ Comment:
3478 ~  ~ Completed
3479 ~  ~ constant
3480 ~  ~ Copy instance params from:
3481 ~  ~ Copy parameters from:
3482 ~  ~ Current for comp:
3483 ~  ~ Current Hierarchy:
3484 ~  ~ Currently defined:
3485 ~  ~ DC Analysis
3486 ~  ~ DC/AC Sensitivity Analysis
3487 ~  ~ DCSET
3488 ~  ~ Decade
3489 ~  ~ Delete GND Node setting?
3490 ~  ~ Delete Modifier
3491 ~  ~ Description:
3492 ~  ~ Diagram
3493 ~  ~ Diagram Contents (
3494 ~  ~ Dimension:
3495 ~  ~ DISTO
3496 ~  ~ Disto&rtion Analysis
3497 ~  ~ Distortion Analysis
3498 ~  ~ E&xport
3499 ~  ~ EDSpice
34100 ~  ~ EDSpice - Check Assigment of Subcircuit Nodes
34101 ~  ~ EDSpice - Extracting Model Parameters
34102 ~  ~ EDSpice - Load Model Parameters
34103 ~  ~ Model Parameter Library
34104 ~  ~ EDSpice - Save Model in Library
34105 ~  ~ EDSpice - Save Symbol(s)
34106 ~  ~ EDSpice - Select File Containing Subcircuit
34107 ~  ~ EDSpice - Select File for Model Extraction
34108 ~  ~ EDSpice - Select Target Model Library
34109 ~  ~ EDSpice - Subcircuits Adaptor
34110 ~  ~ EDSpice Communication
34111 ~  ~ EDspice Comp. id tag
34112 ~  ~ EDSpice id tag
34113 ~  ~ EDSpice Simulation Engine
34114 ~  ~ EDSpice Sub&directories
34115 ~  ~ EDSpice Simulator
34116 ~  ~ Element:
34117 ~  ~ End Frequency:
34118 ~  ~ Event Data as Logic Waveform
34119 ~  ~ Export to &Waveform Viewer
34120 ~  ~ Expression:
34121 ~  ~ Extract
34122 ~  ~ Final Time
34123 ~  ~ Find model:
34124 ~  ~ First Source
34125 ~  ~ FOUR Analysis
34126 ~  ~ Fourier:
34127 ~  ~ Frequency:
34128 ~  ~ FRSET
34129 ~  ~ Function Code:
34130 ~  ~ Function Parameters
34131 ~  ~ GND Node is not set!
34132 ~  ~ Hi(
34133 ~  ~ Hierarchical Subcircuits:
34134 ~  ~ Importing Results
34135 ~  ~ incompatible)
34136 ~  ~ INITCOND
34137 ~  ~ Initial
34138 ~  ~ Initial Node Voltage Guesses
34139 ~  ~ input format: t1,t2,.....tn
34140 ~  ~ Input Source
34141 ~  ~ Instance Parameters
34142 ~  ~ Instance Parameters -
34143 ~  ~ Instance Parameters not set
34144 ~  ~ is a Subcircuit. No parameters to set.
34145 ~  ~ is not
34146 ~  ~ is not a EDSpice element
34147 ~  ~ is not a Subcircuit.
34148 ~  ~ is not a Voltage Source
34149 ~  ~ is not set as a Library Subcircuit.
34150 ~  ~ is not set as hierarchical subcircuit!
34151 ~  ~ is not set as Subcircuit Node
34152 ~  ~ Keyword
34153 ~  ~ Length=
34154 ~  ~ Library Subcircuits:
34155 ~  ~ Linear
34156 ~  ~ Lo(
34157 ~  ~ Load from Library
34158 ~  ~ Max .Step
34159 ~  ~ Measure Parameters -
34160 ~  ~ Measure?
34161 ~  ~ Mod.
34162 ~  ~ Mod:
34163 ~  ~ Model Lib Name:
34164 ~  ~ Model Lib. Id.
34165 ~  ~ Model libraries(*.SML)|*.SML
34166 ~  ~ Model Parameters
34167 ~  ~ Model Parameters -
34168 ~  ~ Model Type:
34169 ~  ~ Neg.
34170 ~  ~ Negative Node (Nc-)
34171 ~  ~ Net Name text
34172 ~  ~ Netlist files(*.CIR)|*.CIR|All files(*.*)|*.*
34173 ~  ~ No .MODEL lines found.
34174 ~  ~ No output
34175 ~  ~ No Output Parameters to measure for this element
34176 ~  ~ no_rawfile
34177 ~  ~ Node 1
34178 ~  ~ Node 2
34179 ~  ~ Node 3
34180 ~  ~ Node 4
34181 ~  ~ Node description:
34182 ~  ~ Node Logic State marker
34183 ~  ~ Node Pair
34184 ~  ~ Node Setup
34185 ~  ~ Node to Node Voltage Difference marker:
34186 ~  ~ Node Voltage Guesses
34187 ~  ~ Node Voltage marker
34188 ~  ~ Node Voltages:
34189 ~  ~ Node:
34190 ~  ~ Node]
34191 ~  ~ Nodes Setup -
34192 ~  ~ NOISE Analysis
34193 ~  ~ Nominal Circuit:
34194 ~  ~ Nonlinear
34195 ~  ~ not found)
34196 ~  ~ not set
34197 ~  ~ NSSET
34198 ~  ~ Octave
34199 ~  ~ OP Analysis
34200 ~  ~ Operating Point
34201 ~  ~ Option
34202 ~  ~ Output Instance Parameters
34203 ~  ~ Output variable
34204 ~  ~ Overwrite Model:
34205 ~  ~ P&lot (Stout) Contents for:
34206 ~  ~ Parameter Setup
34207 ~  ~ Parameters:
34208 ~  ~ path=
34209 ~  ~ Plot
34210 ~  ~ Points/Summary
34211 ~  ~ Positive Node (Nc+)
34212 ~  ~ Preprocessing circuit
34213 ~  ~ PZ Analysis
34214 ~  ~ RAW
34215 ~  ~ rawfile(*.raw)|*.raw
34216 ~  ~ Recursive!
34217 ~  ~ Ref. Net
34218 ~  ~ Repeat times:
34219 ~  ~ Run
34220 ~  ~ Save as &Circuit
34221 ~  ~ Save as &SubCircuit
34222 ~  ~ Save EDSpice Circuit File
34223 ~  ~ Save EDSpice Subcircuit File
34224 ~  ~ Save in Library
34225 ~  ~ Saving Circuit ...
34226 ~  ~ Saving EDSpice Circuit File
34227 ~  ~ Saving EDSpice Subcircuit File
34228 ~  ~ Saving Subcircuit ...
34229 ~  ~ SBC
34230 ~  ~ Second Source (opt.):
34231 ~  ~ Select  Source:
34232 ~  ~ Select  Voltage Source:
34233 ~  ~ Select .MODEL Line:
34234 ~  ~ Select controlling:
34235 ~  ~ Select Model Library:
34236 ~  ~ Select Model Type:
34237 ~  ~ Select model:
34238 ~  ~ Select Modifier:
34239 ~  ~ Select Nets
34240 ~  ~ Select Rawfile to plot
34241 ~  ~ Select Source Function:
34242 ~  ~ Select Sources :
34243 ~  ~ Select specific variant of
34244 ~  ~ Select Subcircuit:
34245 ~  ~ Select Voltage Source:
34246 ~  ~ Sending
34247 ~  ~ SENS Analysis
34248 ~  ~ set as GND Node
34249 ~  ~ Set Model Parameters:
34250 ~  ~ Set Modifier
34251 ~  ~ Set Polynomial (Current Controlled Source)
34252 ~  ~ Set Polynomial (Voltage Controlled Source)
34253 ~  ~ Set up model!
34254 ~  ~ Set value (string) of:
34255 ~  ~ Set value of:
34256 ~  ~ Simulation Completed
34257 ~  ~ Simulation Engine Busy
34258 ~  ~ Simulation Engine Busy...<F10> to Cancel
34259 ~  ~ Simulation Tempertures
34260 ~  ~ Simulator &Variables (Options)
34261 ~  ~ Simulator Variables (Options)
34262 ~  ~ Small-Signal AC Analysis
34263 ~  ~ source
34264 ~  ~ Source
34265 ~  ~ Source Currents:
34266 ~  ~ Source Function -
34267 ~  ~ SourceCurrents:
34268 ~  ~ Specific variant:
34269 ~  ~ F2OVERF1
34270 ~  ~ SPICE Naming Convs.
34271 ~  ~ Plot(Standard Output)
34272 ~  ~ Print(Standard Output)
34273 ~  ~ Standard output:
34274 ~  ~ Start Frequency
34275 ~  ~ Start Time
34276 ~  ~ Start Voltage
34277 ~  ~ Step
34278 ~  ~ Step
34279 ~  ~ Stop Voltage
34280 ~  ~ Subcircuit description comment:
34281 ~  ~ Subcircuit Files(*.SBC)|*.SBC
34282 ~  ~ Subcircuit I/O &Nodes
34283 ~  ~ Subcircuit I/O Nodes
34284 ~  ~ Subcircuit name:
34285 ~  ~ Subcircuit Node Tag
34286 ~  ~ Subcircuit Save failed
34287 ~  ~ SubCircuit Saved O.K.
34288 ~  ~ Subcircuits &Adaptor
34289 ~  ~ SUBNODES
34290 ~  ~ Sure to unselect this source function?
34291 ~  ~ Sweep Parameters
34292 ~  ~ Temperture  vector (C°):
34293 ~  ~ Tempertures:
34294 ~  ~ TF Analysis
34295 ~  ~ TFSET
34296 ~  ~ To file:
34297 ~  ~ To many samples in RawFile:
34298 ~  ~ Total Points
34299 ~  ~ Total Points:
34300 ~  ~ TRAN
34301 ~  ~ TRAN Analysis
34302 ~  ~ Transfer Function Analysis
34303 ~  ~ Transfer function
34304 ~  ~ Transient Initial Conditions
34305 ~  ~ Transient Analysis
34306 ~  ~ Transient Conditions
34307 ~  ~ udndllp=
34308 ~  ~ Un(
34309 ~  ~ Unable to run the EDSpice Simulation Engine
34310 ~  ~ undefined
34311 ~  ~ unknown
34312 ~  ~ unknown!
34313 ~  ~ unknown)
34314 ~  ~ Unselect Function
34315 ~  ~ unselected
34316 ~  ~ V  - voltage
34317 ~  ~ V[0]
34318 ~  ~ Value Type:
34319 ~  ~ Variation
34320 ~  ~ VDB - 20log10(magnitude)
34321 ~  ~ Vect.Size
34322 ~  ~ Vector
34323 ~  ~ VI - imaginary
34324 ~  ~ View File
34325 ~  ~ VM - magnitude
34326 ~  ~ Voltage Source
34327 ~  ~ Voltage Source:
34328 ~  ~ Voltage:
34329 ~  ~ Voltage Source:
34330 ~  ~ VP - phase
34331 ~  ~ VR - real
34332 ~  ~ Updating Subcircuit list...
34333 ~  ~ Can't find or load subcircuit:
34334 ~  ~ Family Name Invalid
34335 ~  ~ Create Family Path:
34336 ~  ~ Can't create Family Path:
34337 ~  ~ Type: Analog
34338 ~  ~ Type: Digital
34339 ~  ~ Type: Mixed Analog/Digital
34340 ~  ~ Analog
34341 ~  ~ Digital
34342 ~  ~ Mixed Analog/Digital
34343 ~  ~ Change Bridge
34344 ~  ~ Incompatible Bridge to Input Node
34345 ~  ~ Incompatible Bridge from Output Node
34346 ~  ~ Model Parameters Lib.Name
34347 ~  ~ Bridge Model Reference
34348 ~  ~ PWL Values files
34349 ~  ~ Select PWL Function Values File
34350 ~  ~ Load values from file
34351 ~  ~ AD/DA &Bridges for Mixed Mode Simulation
34352 ~  ~ Analog Node 
34353 ~  ~ Select Bridge Model:
34354 ~  ~ Default AD/DA Bridge Models for Mixed Mode Simulation  
34355 ~  ~ Direction: 
34356 ~  ~ to Inputs 
34357 ~  ~ from Outputs 
34358 ~  ~ Sort by EDSpice ID
34359 ~  ~ Sort by Name
34360 ~  ~ Element
34361 ~  ~ Remarks:
34362 ~  ~ Circuit Elements
34363 ~  ~ Dig.Input
34364 ~  ~ Dig.Output
34365 ~  ~ N/A
34366 ~  ~ Type
34367 ~  ~ Complex values:
34368 ~  ~ real part
34369 ~  ~ imaginary part
34370 ~  ~ magnitude
34371 ~  ~ phase
34372 ~  ~ Second Source
34373 ~  ~ Spectral Analysis
34374 ~  ~ Select Net/Source
34375 ~  ~ Select Nodes
34376 ~  ~ Select Poles/Zeroes
34377 ~  ~ DC Transfer Function Analysis
34378 ~  ~ Fourier(Setup)
34379 ~  ~ Select EDSpice Raw File
34380 ~  ~ Select EDSpice Standard Output File
34381 ~  ~ &Map
34382 ~  ~ &Circuit Element
34383 ~  ~ Analysis Setup :
34384 ~  ~ Select Analyses
34385 ~  ~ Set Parameters for transient analysis :
34386 ~  ~ &Analysis
34387 ~  ~ Finish current operation for Waveform Viewer
34388 ~  ~ E&dspice Interactive Interpreter...
34389 ~  ~ Parts/Symbols : 
34390 ~  ~ Standard Output
34391 ~  ~ Edspice Interactive Interpreter
34392 ~  ~ Edspice Simulator is disabled. Close Oscillograph in Mixedmode Simulator.
34393 ~  ~ Simulation model cannot be assigned while Oscillograph is running
34394 ~  ~ Subcircuit cannot be assigned while Oscillograph is running
34395 ~  ~ Hierarchy cannot be changed while Oscillograph is running
34396 ~  ~ Voltage marker is not allowed on GND Node !
34397 ~  ~ Cannot redraw. Close Oscillograph in Mixedmode Simulator.
34398 ~  ~ No hierarchical subcircuit is assigned to the component
34399 ~  ~ Hierarchy operations cannot be done while Oscillograph is running
34400 ~  ~ Setup AD/DA &Bridges...
34401 ~  ~ Update Profile Database
34402 ~  ~ &Open Circuit
34403 ~  ~ &New / Edit Circuit

#FILE = E2KSPCLE.EXE  'EDWin 2000 Spice Library Symbol Editor'

351 ~  ~ &Create list for SPICE Netlist import
352 ~  ~ &Editors
353 ~  ~ &New
354 ~  ~ &Symbol
355 ~  ~ &Select
356 ~  ~ &Use Template
357 ~  ~ (not set as EDSpice Circuit Element)
358 ~  ~ ** Part Referencing Library Model Parameters **
359 ~  ~ ** Part Referencing Specific Library Subcircuits **
3510 ~  ~ ** Part with unresolved EDSPice references **
3511 ~  ~ ** Symbols defined as EDSPice Circuit Elements **
3512 ~  ~ ** Symbols defined as EDSPice Subcircuits **
3513 ~  ~ ******* EDSPICE SYMBOLS IN
3514 ~  ~ ********************** Format *************************************
3515 ~  ~ *Element Code , Model Code, Spec.Variant, Symbol Name,Library Name,
3516 ~  ~ *No. of Pins,Description
3517 ~  ~ -1 -Model name insert
3518 ~  ~ -2 -Source Function
3519 ~  ~ -3 -Expression
3520 ~  ~ -4 -Values after keyword
3521 ~  ~ -5 -Initial Conditions
3522 ~  ~ -6 -IC vector value
3523 ~  ~ -7 -Constant
3524 ~  ~ :   ModDesc = Us(2)
3525 ~  ~ : ModDll = Us(2)
3526 ~  ~ : ModType = Us(2)
3527 ~  ~ 0 -Keyword
3528 ~  ~ 1 - Input
3529 ~  ~ 1 -Input
3530 ~  ~ 1 -Single value
3531 ~  ~ 2 - Output
3532 ~  ~ 2 -Input/Output
3533 ~  ~ 3 -Output
3534 ~  ~ 4 -EDSPICE o/p
3535 ~  ~ 4 -File path\name
3536 ~  ~ 5 -Controlling source insert
3537 ~  ~ 6 -Controlling node insert
3538 ~  ~ 7 -Linear/Nonlinear VS
3539 ~  ~ 8 -Linear/Nonlinear CS
3540 ~  ~ Add >>
3541 ~  ~ are not of the same type
3542 ~  ~ Assign Subcircuit
3543 ~  ~ Can't create Node Modifiers vector
3544 ~  ~ Cancel Assignment
3545 ~  ~ Clear All Entries ?
3546 ~  ~ Const
3547 ~  ~ Constant
3548 ~  ~ Create list for all Elements
3549 ~  ~ Creating the list
3550 ~  ~ Del. Ref.
3551 ~  ~ Descrption
3552 ~  ~ Part Libraries
3553 ~  ~ Part Specific Library Subcircuit
3554 ~  ~ Parts:
3555 ~  ~ Dir.
3556 ~  ~ DLL Name
3557 ~  ~ Do you wish to save new profile
3558 ~  ~ Do you wish to save updates
3559 ~  ~ Edit Type
3560 ~  ~ Editing Cancelled
3561 ~  ~ EDSpice - Part: <
3562 ~  ~ EDSpice - Library Symbol Update
3563 ~  ~ EDSpice Element:
3564 ~  ~ EDSpice Symbol Editor
3565 ~  ~ Profile Editor
3566 ~  ~ Setup of Symbols for EDSPice
3567 ~  ~ SpcCode list File Name:
3568 ~  ~ SpcCodeD list File Name:
3569 ~  ~ Element Code
3570 ~  ~ Element Codes
3571 ~  ~ Element Line
3572 ~  ~ Element Line
3573 ~  ~ Element Profile  file Editor
3574 ~  ~ Element Profiles
3575 ~  ~ Elements.spc
3576 ~  ~ Find Part
3577 ~  ~ Find Symbol
3578 ~  ~ Group Symbols in Part:
3579 ~  ~ IFS
3580 ~  ~ in ELEMENTS.SPC file?
3581 ~  ~ in MODELS.SPC file?
3582 ~  ~ Include Symbols Set as Subcircuits
3583 ~  ~ Instace       Params
3584 ~  ~ Instance     Params
3585 ~  ~ Instance Parameter Listing
3586 ~  ~ Instance Parameters
3587 ~  ~ InterFace Specification file Name:
3588 ~  ~ InterFace Specification files (*.IFS)|*.IFS
3589 ~  ~ Invalid
3590 ~  ~ IVect
3591 ~  ~ Lib.&Path =
3592 ~  ~ Library Model Parameters
3593 ~  ~ Library of Model Parameters [
3594 ~  ~ Library of Subcircuits [
3595 ~  ~ Listing of &Parts set for EDSpice
3596 ~  ~ Listing of &Symbols set for EDSpice
3597 ~  ~ Listing of Symbols set for EDSpice Simulator
3598 ~  ~ Low.Bound
3599 ~  ~ M. Variant
35100 ~  ~ Mismatch between No. of Nodes and Items in Node List. Save failed.
35101 ~  ~ Mismatch between No. of Params and Items in Model Parameter List. Save Failed.
35102 ~  ~ Mismatch between No. of Params and Items in Parameter List. Save failed.
35103 ~  ~ Model  Description
35104 ~  ~ Model Editor
35105 ~  ~ Model Paramerers
35106 ~  ~ Model Parameters
35107 ~  ~ Model Parameters:
35108 ~  ~ Model Profile entry
35109 ~  ~ Model Profile file Editor
35110 ~  ~ Model Profile file Editor
35111 ~  ~ Model Profiles
35112 ~  ~ Model Type
35113 ~  ~ Model Variant
35114 ~  ~ Models.spc
35115 ~  ~ ModelType
35116 ~  ~ No Parts set for this Model Parameters
35117 ~  ~ No Parts specifically set for this Library Subcircuit
35118 ~  ~ No of Nodes
35119 ~  ~ No selection
35120 ~  ~ No symbols set for this element
35121 ~  ~ No symbols set for this subcircuit
35122 ~  ~ No. of Nodes
35123 ~  ~ No. of Parameters
35124 ~  ~ No. of params
35125 ~  ~ Node List
35126 ~  ~ Node Listing
35127 ~  ~ Node name
35128 ~  ~ nodes] (
35129 ~  ~ Nothing to delete
35130 ~  ~ PAINT
35131 ~  ~ Pin Description
35132 ~  ~ Pin No
35133 ~  ~ Read From &IFS file
35134 ~  ~ Save Part
35135 ~  ~ Saved OK
35136 ~  ~ Symbol Libraries
35137 ~  ~ Symbol Libraries:
35138 ~  ~ Select Circuit Element Code(S):
35139 ~  ~ Select element
35140 ~  ~ Select Element..
35141 ~  ~ Select Model
35142 ~  ~ Select the point of insertion
35143 ~  ~ SPICE Name
35144 ~  ~ SPICE name
35145 ~  ~ There is no matching element
35146 ~  ~ This entry already exists. Save failed.
35147 ~  ~ Total number of Instance Parameters
35148 ~  ~ Total number of Nodes
35149 ~  ~ Total number of Parameters
35150 ~  ~ Udn.
35151 ~  ~ Up.Bound
35152 ~  ~ Used if no Part Specific set
35153 ~  ~ User Defined Node
35154 ~  ~ Vector Parameters
35155 ~  ~ will also be deleted.
35156 ~  ~ Model Params ID
35157 ~  ~ Symbol Library Editor (EDSpice)
35158 ~  ~ Loading Library References ..
35159 ~  ~ Recreate Subcircuit Library Index
35160 ~  ~ Recreate Model Parameters Library Index
35161 ~  ~ Update Parts
35162 ~  ~ The following part(s) use the symbol :
35163 ~  ~ Select the parts that you want to update and click update  ...
35164 ~  ~ No parts in your search sequence use the symbol :
35165 ~  ~ Click cancel to return to the editor

#FILE = E2KSPCIP.EXE  'EDWin 2000 Spice NetList Import'

361 ~  ~ !ERROR in Circuit file
362 ~  ~ Can't create grid #
363 ~  ~ Can't create grid by X axis. Too huge component size or clearance or value of alignment
364 ~  ~ Can't create grid by Y axis. Too huge component size or clearance or value of alignment
365 ~  ~ Can't create symbol for grid lines
366 ~  ~ Can't save grid prefixes
367 ~  ~ Can't setup default parameters for grid #
368 ~  ~ Continue?
369  ~  ~ Created Project O.K
3610 ~  ~ Creating Components
3611 ~  ~ Spice Netlist Import
3612 ~  ~ Element Code
3613 ~  ~ Error :
3614 ~  ~ Extracting models
3615 ~  ~ Extracting Parameters
3616 ~  ~ LEVEL=
3617 ~  ~ missing.
3618 ~  ~ Model Line for
3619 ~  ~ not defined in sptoed.spc.
3620 ~  ~ Number of nodes less than entries in
3621 ~  ~ OR
3622 ~  ~ Placing Components in...
3623 ~  ~ POLY
3624 ~  ~ Select Circuit File to Load
3625 ~  ~ Select Netlist file.
3626 ~  ~ STATE_FILE
3627 ~  ~ STATE_FILE=
3628 ~  ~ Unpack
3629 ~  ~ Warning ! Subcircuit defintion for
3630 ~  ~ Warning :
3631 ~  ~ Parsing Spice Element Profiles ...
3632 ~  ~ Parsing Spice Model Profiles ... 
3633 ~  ~ F&ile
3634 ~  ~ H&elp
3635 ~  ~ O&pen
3636 ~  ~ Following circuits are created :-
3637 ~  ~ Creating Components and Netlists in
3638 ~  ~ None of the Parts in  Library matches the criteria !
3639 ~  ~ What you want to do? 
3640 ~  ~ Following Parts in  Library matches the criteria !
3641 ~  ~ Select one from the list. 
3642 ~  ~ Assigning Subcircuits....
3643 ~  ~ Setting up Option Parameters....
3644 ~  ~ Setting up NODESET vectors....
3645 ~  ~  imported successfully
3646 ~  ~ Reading Circuit File....
3647 ~  ~ Getting Circuit Datas....
3648 ~  ~ Creating Circuit Hierarchies....
3649 ~  ~ Description of components created :-
3650 ~  ~ Format :
3651 ~  ~  - Append mode
3652 ~  ~  - New Project mode
3653 ~  ~ SUMMARY OF RESULTS
3654 ~  ~ Getting Parts information from  Library... Please wait....
3655 ~  ~ Open Spice Circuit File. 
3656 ~  ~ Circuit Parsed     :
3657 ~  ~ Project Name     :
3658 ~  ~ Part Selection Mode  :
3659 ~  ~ View Circuit File
3660 ~  ~ Circuit Parsed
3661 ~  ~ Mode of Import
3662 ~  ~ Project Name
3663 ~  ~ Incorrect Part Information in Library :  
3664 ~  ~ Correct/Remove the part/library and retry Import!
3665 ~  ~ Create a part to keep the netlist
3666 ~  ~ Ignore
3667 ~  ~ Model Code    :
3668 ~  ~ Spec. Variant  :
3669 ~  ~ Hierarchy            :
3670 ~  ~ Component Line :
3671 ~  ~ Element Code     :
3672 ~  ~ Errors in Circuit File
3673 ~  ~ Errors in component creation
3674 ~  ~ Invalid subcircuit file : 
3675 ~  ~ Select component

#FILE = E2KLOMED.EXE  'EDWin 2000 List of Materials Editor'

371 ~  ~ &Add Field
372 ~  ~ &Append
373 ~  ~ Associate
374 ~  ~ &Data
375 ~  ~ &Del
376 ~  ~ &Export To File
377 ~  ~ &External Info Project
378 ~  ~ &List Of Materials
379 ~  ~ &Max Grid Rows
3710 ~  ~ &More
3711 ~  ~ &Refresh
3712 ~  ~ &Remove All Records
3713 ~  ~ &Remove Field
3714 ~  ~ &Sort
3715 ~  ~ &Specify External Index Code
3716 ~  ~ &Update All
3717 ~  ~ &Utility
3718 ~  ~ (BOF) of
3719 ~  ~ (EOF) of
3720 ~  ~ please wait ...
3721 ~  ~ - Select/Define L.O.M File Name
3722 ~  ~ .EBM
3723 ~  ~  [Not Updatable]
3724 ~  ~ {Down}
3725 ~  ~ {Home}
3726 ~  ~ {Tab}
3727 ~  ~ Add record
3728 ~  ~ Adding  Fields :
3729 ~  ~ Adding Fields
3730 ~  ~ Appending Records from Index ASCII file
3731 ~  ~ Associate part(s) With External  Info Project
3732 ~  ~ Building External Info Project
3733 ~  ~ Can't chage the part:
3734 ~  ~ Can't read the part:
3735 ~  ~ Cannot Accept With Out Selecting Field
3736 ~  ~ Cannot Associate with out selecting a valid External Info Project
3737 ~  ~ Cannot Delete Records From External Info Project
3738 ~  ~ Center Alignment
3739 ~  ~ Click To Deselect All Fields
3740 ~  ~ Click To Deselect The Field
3741 ~  ~ Click To Select All Fields
3742 ~  ~ Click To Select Sorting Field
3743 ~  ~ Click To Select The Selected Field
3744 ~  ~ Closing Dynasets
3745 ~  ~ Component Description
3746 ~  ~ Connect EID
3747 ~  ~ Data&base
3748 ~  ~ DBaseName
3749 ~  ~ Delete All Records from the Project ?
3750 ~  ~ Delete Current Record?
3751 ~  ~ delete from part
3752 ~  ~ Deleting Records From External Info Project
3753 ~  ~ Delimiter
3754 ~  ~ Describe External Info Project Structure
3755 ~  ~ Part Files (*.EBM)|*.EBM|All Files (*.*)|*.*
3756 ~  ~ Part.eid
3757 ~  ~ Parts Info Files
3758 ~  ~ Double Click to accept External Index Code
3759 ~  ~ Double Click To Deselect Field
3760 ~  ~ Double Click To Select Field
3761 ~  ~ Dynaset
3762 ~  ~ Edit EID
3763 ~  ~ EID Editor
3764 ~  ~ Ending Range not specified
3765 ~  ~ Ending Record Range :
3766 ~  ~ Enter Column to align :
3767 ~  ~ Enter Maximum Rows to Show in Grid
3768 ~  ~ Enter New Field Parameters, Press 'Close' when finished
3769 ~  ~ Enter New Value:
3770 ~  ~ Enter Search Parameters
3771 ~  ~ Enter the field name to sort :
3772 ~  ~ Exporting Data to
3773 ~  ~ Ext Info Files (*.*)|*.*
3774 ~  ~ Ext Info Files (*.EID)|*.EID
3775 ~  ~ External ASCII Text File Name:
3776 ~  ~ External Project :
3777 ~  ~ External Index Field :
3778 ~  ~ External Info Project  Editor
3779 ~  ~ External Info Project Created. To Add data manually use Edit or Append from a Index ASCII file
3780 ~  ~ External Info Project Editor
3781 ~  ~ External Info Project File
3782 ~  ~ External Info Project File Cannot be Opened
3783 ~  ~ External Info Project Files
3784 ~  ~ External Info Project is empty
3785 ~  ~ External Info Project Viewer
3786 ~  ~ ExtIndexCode
3787 ~  ~ F&ind
3788 ~  ~ Field Length Exceeded!
3789 ~  ~ Field Name must be unique
3790 ~  ~ Field Name:
3791 ~  ~ Field not selected
3792 ~  ~ Field selected as External Index Code:
3793 ~  ~ Field separator:
3794 ~  ~ Field Sequence :
3795 ~  ~ field?
3796 ~  ~ Fields to select:
3797 ~  ~ Fields:
3798 ~  ~ FieldSep
3799 ~  ~ FieldSeq
37100 ~  ~ FieldSort
37101 ~  ~ Fil&ter
37102 ~  ~ File Name :
37103 ~  ~ File Name or Seperator not correct
37104 ~  ~ Filter / Find Record
37105 ~  ~ Getting more part details
37106 ~  ~ Going to first part
37107 ~  ~ Grid Column Alignment :
37108 ~  ~ Index ASCII File Name
37109 ~  ~ Index Files (*.TXT)|*.TXT
37110 ~  ~ LOM file Created
37111 ~  ~ Left Alignment
37112 ~  ~ Like
37113 ~  ~ List of Parts in currently loaded  Project:
37114 ~  ~ List Of Materials
37115 ~  ~ List of Materials - Preview
37116 ~  ~ Loading EID for viewing
37117 ~  ~ Max Grid View Rows
37118 ~  ~ Maximum Rows is
37119 ~  ~ Minimum Rows is 1.
37120 ~  ~ Moving to the first record
37121 ~  ~ MS Access
37122 ~  ~ No Part Used
37123 ~  ~ No fields defined!
37124 ~  ~ No Matching Records
37125 ~  ~ No Record in External Database, File not created
37126 ~  ~ No Records found!
37127 ~  ~ of
37128 ~  ~ Opening Design Form
37129 ~  ~ Opening EID for editing
37130 ~  ~ Opening EID for viewing
37131 ~  ~ Opening External Info Project File..
37132 ~  ~ Operators:
37133 ~  ~ Output File Name :
37134 ~  ~ Outputing L.O.M
37135 ~  ~ Primary
37136 ~  ~ Reading text file and updating part Project
37137 ~  ~ Ready
37138 ~  ~ Record
37139 ~  ~ Record not found!
37140 ~  ~ Refreshing Grid
37141 ~  ~ Remove
37142 ~  ~ Right Alignment
37143 ~  ~ Searching for New Record
37144 ~  ~ Searching for Record
37145 ~  ~ Select a field as External Index Code
37146 ~  ~ Select Associate Mode :
37147 ~  ~ Select External Project Field :
37148 ~  ~ Select External Index Code :
37149 ~  ~ Select External Info Project
37150 ~  ~ Select field to serve as External Index Code
37151 ~  ~ Select Separator
37152 ~  ~ Select Sequence And Separator :
37153 ~  ~ Select Sort Field :
37154 ~  ~ Select the delimter to seperate the fields (eg)   ';'      ':'   ','   'TAB'     'SPACE'     '|'   etc
37155 ~  ~ Selected fields 
37156 ~  ~ Selected Range of records from Index ASCII file
37157 ~  ~ Seperator used in the file :
37158 ~  ~ Setting New Filter
37159 ~  ~ Setting New Sort Order
37160 ~  ~ Simulation Reference
37161 ~  ~ Size
37162 ~  ~ Sort By Field :
37163 ~  ~ Sort Field not selected
37164 ~  ~ Sorting by:
37165 ~  ~ Starting Range not specified
37166 ~  ~ Starting Record Range :
37167 ~  ~ String
37168 ~  ~ Symbol Name
37169 ~  ~ System Error:
37170 ~  ~ This operation may take time
37171 ~  ~ Type:
37172 ~  ~ Unique
37173 ~  ~ Value or Expression:
37174 ~  ~ Type
37175 ~  ~ List of Materials
37176 ~  ~ Delete selected data from EID file.
37177 ~  ~ Export to file: 
37178 ~  ~ Import from file: 
37179 ~  ~ Give value
37180 ~  ~ Field Name
37181 ~  ~ Size
37182 ~  ~ Remove selected records from External Info Database
37183 ~  ~ Export to text file:
37184 ~  ~ Import from text file: 
37185 ~  ~ External Index code:
37186 ~  ~ &Update current record
37187 ~  ~ Part
37188 ~  ~ Part Description
37189 ~  ~ External Index Code
37190 ~  ~ Package
37191 ~  ~ Enter value
37192 ~  ~ Enter the Value for field : [
37193 ~  ~ Editing EID
37194 ~  ~ Current Record:
37195 ~  ~ &Advanced Options
37196 ~  ~ Creation of &LOM

37197 ~  ~ Parts in Project
37198 ~  ~ Included in LOM
37199 ~  ~ Excluded from LOM
37200 ~  ~ Components in Project
37201 ~  ~ Operator
37202 ~  ~ Sort by field


#FILE = E2KTHERM.EXE  'EDWin 2000 Thermal Analyzer'

391 ~  ~ #0.0 °C
392 ~  ~ #0.0 °F
393 ~  ~ &Board Parameters
394 ~  ~ &Centigrade
395 ~  ~ &Environmental Parameters
396 ~  ~ &Fahrenheit
397 ~  ~ &Isotherm Density
398 ~  ~ °C/W
399 ~  ~ °F/W
3910 ~  ~ 2PIN
3911 ~  ~ Air velocity
3912 ~  ~ Ambient temperature
3913 ~  ~ Analysis in progress ...
3914 ~  ~ Analysis in progress...
3915 ~  ~ As Designed
3916 ~  ~ Automatic Thermo Analyzer
3917 ~  ~ Board emissivity coefficient
3918 ~  ~ Board is not loaded
3919 ~  ~ Board orientation
3920 ~  ~ Board parameters
3921 ~  ~ Board thickness
3922 ~  ~ Board:
3923 ~  ~ C&ooling Parameters
3924 ~  ~ Can't buildt thermo Project
3925 ~  ~ Can't save parameters
3926 ~  ~ Cannot find kernel
3927 ~  ~ Case-Air thermal resistance
3928 ~  ~ Color &Palette
3929 ~  ~ Color#
3930 ~  ~ Colored Board
3931 ~  ~ Colored Board + Components
3932 ~  ~ Colored Components
3933 ~  ~ Comp.
3934 ~  ~ Compile
3935 ~  ~ Compiling ...
3936 ~  ~ Component parameters
3937 ~  ~ Components thermal parameters
3938 ~  ~ Cooling direction
3939 ~  ~ Cooling parameters
3940 ~  ~ 
3941 ~  ~ Data files:
3942 ~  ~ Delete temp label text?
3943 ~  ~ Density
3944 ~  ~ Thermal Analyzer
3945 ~  ~ Fnd.
3946 ~  ~ For component
3947 ~  ~ 
3948 ~  ~ In library:
3949 ~  ~ Insufficient memory (GlobalAlloc)
3950 ~  ~ Insufficient memory (GlobalLock)
3951 ~  ~ Insufficient memory (GlobalReAlloc - Windows function)
3952 ~  ~ Insulator thermal conductivity
3953 ~  ~ Isotherms
3954 ~  ~ Isotherms' Density
3955 ~  ~ Junction-Case thermal resistance
3956 ~  ~ Junction:
3957 ~  ~ 
3958 ~  ~ 
3959 ~  ~ Left
3960 ~  ~ Libraries
3961 ~  ~ Library
3962 ~  ~ Library already selected
3963 ~  ~ Library compiler
3964 ~  ~ Library file
3965 ~  ~ Library Selector
3966 ~  ~ Loaded = %d
3967 ~  ~ Lower limit
3968 ~  ~ m/s
3969 ~  ~ Maximal power dissipation
3970 ~  ~ Maximal temperature
3971 ~  ~ Minimal power dissipation
3972 ~  ~ Minimal temperature
3973 ~  ~ Msg.
3974 ~  ~ Number
3975 ~  ~ OTHER
3976 ~  ~ Package type
3977 ~  ~ PGA
3978 ~  ~ Please, wait for loading ...
3979 ~  ~ Power duty cycle
3980 ~  ~ PowerDuty
3981 ~  ~ PowerMax
3982 ~  ~ PowerMin
3983 ~  ~ Print &Setup
3984 ~  ~ Private
3985 ~  ~ Raster
3986 ~  ~ Right
3987 ~  ~ Runtime error #
3988 ~  ~ Scaling mode
3989 ~  ~ Set by user
3990 ~  ~ Set from lib.
3991 ~  ~ Setting Board shape  ...
3992 ~  ~ Setting Board shape ...
3993 ~  ~ SIL
3994 ~  ~ Surface fraction of Copper
3995 ~  ~ Temp:
3996 ~  ~ Environmental parameters
3997 ~  ~ Temperature window
3998 ~  ~ Thermal Analyzer
3999 ~  ~ Thermal parameters:
39100 ~  ~ Thermal Printout ... (<F10> to Cancel)
39101 ~  ~ ThermalAnalyzer's Library by INTERSOFT USA
39102 ~  ~ Run Thermal Analysis
39103 ~  ~ Too big board
39104 ~  ~ Too big index of component
39105 ~  ~ Too big index of symbol
39106 ~  ~ Too big string in symbol's primitive
39107 ~  ~ Too big string of part name
39108 ~  ~ Too complex board shape (More than 100 bending points)
39109 ~  ~ Too many components
39110 ~  ~ Too many part name strings
39111 ~  ~ Too many symbol's primitives
39112 ~  ~ Too many symbols
39113 ~  ~ Too many text strings in symbol's primitives
39114 ~  ~ Total Copper thickness
39115 ~  ~ UNDEF
39116 ~  ~ Unknown Error:
39117 ~  ~ Upper limit
39118 ~  ~ Cooling Parameters for component:
39119 ~  ~ Thermal Resistance of Heat Sink:
39120 ~  ~ Fan Speed (Linear Airflow) :
39121 ~  ~ Thermal Resistance of Interface material :
39122 ~  ~ Distance of Fan from Board edge
39123 ~  ~ Fan speed should be a non-zero value
39124 ~  ~ Thermal resistance of Heatsink should be a non-zero value
39125 ~  ~ Thermal resistance of Interface material should be a non-zero value
39126 ~  ~ Inches
39127 ~  ~ Millimetres
39128 ~  ~ Select a file for compiling 
39129 ~  ~ Compiling file:  
39130 ~  ~ Compiled file
39131 ~  ~ Source file:
39132 ~  ~ Thermal Libraries
39133 ~  ~ Minimal:
39134 ~  ~ Maximal:
39135 ~  ~ Up
39136 ~  ~ Unit for Temperature :
39137 ~  ~ Temparature color for
39138 ~  ~ Select/Displays current value for precision
39139 ~  ~ Select/Displays current value for grid
39140 ~  ~ Select/Displays current value for snap
39141 ~  ~ Redraw to fit and show entire board
39142 ~  ~ Set/View currently active layers
39143 ~  ~ View layout in true size
39144 ~  ~ View layout components with pad frames
39145 ~  ~ View Copper
39146 ~  ~ View layout in mirror(Horizontal flipping) mode
39147 ~  ~ View Notes
39148 ~  ~ View Dimensions
39149 ~  ~ Designed
39150 ~  ~ View As Designed
39151 ~  ~ View As Colored Board
39152 ~  ~ View As Colored Components
39153 ~  ~ Colored Board and Components
39154 ~  ~ View As Colored Board and Components
39155 ~  ~ View Isotherms
39156 ~  ~ Display Options
39157 ~  ~ % of Max. Temp.
39158 ~  ~ Component mounted Cooling Fan
39159 ~  ~ Component mounted Heat Sink
39160 ~  ~ Thermal Resistance of Heatsink
39161 ~  ~ Thermal Interfacing material
39162 ~  ~ Thermal Resistance of Interface material
39163 ~  ~ Set to Default
39164 ~  ~ Thermal
39165 ~  ~ Raster Size used for Display :
39166 ~  ~ Temperature Scaling
39167 ~  ~ Minimum temperature to be displayed :
39168 ~  ~ Maximum temperature to be displayed :
39169 ~  ~ Temperature Window status :
39170 ~  ~ Color P&alette Legend
39171 ~  ~ &Yes
39172 ~  ~ &No
39173 ~  ~ Yes &To All

#FILE = E2KSETUP.EXE  'EDWin 2000 Setup Installation'

401 ~  ~ %{ }{Enter}
402 ~  ~ &Continue
403 ~  ~ &Continue Upgrade
404 ~  ~ &Exit Setup
405 ~  ~ .  For example,
406 ~  ~ .  Must be one drive letter and
407 ~  ~ :   An estimated
408 ~  ~ :  An estimated
409 ~  ~ [AddItem(
4010 ~  ~ [CreateGroup(
4011 ~  ~ [ReplaceItem(
4012 ~  ~ [ShowGroup(groupname, 1)]
4013 ~  ~ \CompanyName
4014 ~  ~ \FILEVERSION
4015 ~  ~ \StringFileInfo\
4016 ~  ~ additional bytes are needed.
4017 ~  ~ Bad default drive parameter specified.  You passed,
4018 ~  ~ Can't find source:
4019 ~  ~ Can't find target
4020 ~  ~ Can't open target:
4021 ~  ~ components ...
4022 ~  ~ Continue &Setup
4023 ~  ~ Correct this problem and Restart installation
4024 ~  ~ could not be installed.
4025 ~  ~ Creating Program Manager Icon...
4026 ~  ~ Currently selected:
4027 ~  ~ Destination file:
4028 ~  ~ Disk
4029 ~  ~ Disk not ready in the specified path
4030 ~  ~ Disk not ready in the specified path:
4031 ~  ~ Disk Write Protected please correct this and Restart installation
4032 ~  ~ Disk/Path:
4033 ~  ~ Do you really want to exit Setup
4034 ~  ~ Enter the installation program
4035 ~  ~ Error occurred while attempting to copy file.  Could not locate file:
4036 ~  ~ Error While Attempting to Create Directories on Destination Drive.
4037 ~  ~ has already been installed in the system. Do you want to Install it Again
4038 ~  ~ If you want to install
4039 ~  ~ in a different directory and/or drive, type the name of the directory.
4040 ~  ~ inDrive
4041 ~  ~ Insert Disk
4042 ~  ~ Install To:
4043 ~  ~ is in use. Please close all applications and re-attempt Setup.
4044 ~  ~ is installed.
4045 ~  ~ is not found
4046 ~  ~ is not found.
4047 ~  ~ is not properly installed.  Please re-run setup at a later time to install the application properly.
4048 ~  ~ is not ready in the specified path.
4049 ~  ~ is Write Protected.
4050 ~  ~ kb)
4051 ~  ~ Missing components in
4052 ~  ~ missing or invalid:
4053 ~  ~ More then one copy of this file has been found.
4054 ~  ~ No, I do not accept these conditions
4055 ~  ~ Not a valid path.
4056 ~  ~ Not Ready
4057 ~  ~ outButton
4058 ~  ~ outPath
4059 ~  ~ Output file
4060 ~  ~ parts to Setup:
4061 ~  ~ parts to Upgrade:
4062 ~  ~ Please confirm the drive or path containing the
4063 ~  ~ Please correct this and Restart installation
4064 ~  ~ Please enter the path where
4065 ~  ~ Please mount:
4066 ~  ~ ProgMan|Progman
4067 ~  ~ Program Manager
4068 ~  ~ Read:
4069 ~  ~ Required disk space:
4070 ~  ~ Searching for
4071 ~  ~ SelDrive
4072 ~  ~ Select copy of
4073 ~  ~ Select subdirectory of the installation you wish to upgrade.
4074 ~  ~ Select the drive/path containing the installation disk:
4075 ~  ~ Setup
4076 ~  ~ Setup Completed
4077 ~  ~ Setup Error
4078 ~  ~ Setup found more then one installations of:
4079 ~  ~ Setup is about to update
4080 ~  ~ Source file:
4081 ~  ~ source files.
4082 ~  ~ Test App Setup
4083 ~  ~ The given path
4084 ~  ~ The given path is not found
4085 ~  ~ The given path:
4086 ~  ~ The Setup has detected that
4087 ~  ~ There is not enough disk space on drive
4088 ~  ~ This application requires Windows 3.1 or later
4089 ~  ~ This label used for DDE connection to the Program Manager
4090 ~  ~ This Licence requires certain components stored on already supplied  CD-ROM.                             Select the Drive containing the original installation disk(s).
4091 ~  ~ To customize this setup program, modify the FORM_LOAD event procedure in this form.
4092 ~  ~ to get update
4093 ~  ~ to update
4094 ~  ~ Update:
4095 ~  ~ Updating
4096 ~  ~ Upgrade
4097 ~  ~ Upgrade Completed
4098 ~  ~ Upgrade impossible, switching to standard Setup
4099 ~  ~ Upgrade in subdirectory:
40100 ~  ~ Upgrade of all selected components is completed
40101 ~  ~ Visionics Product
40102 ~  ~ Write:
40103 ~  ~ Wrong Setup Disk
40104 ~  ~ Yes, I do accept these conditions
40105 ~  ~ You cannot install  from a Wrong Setup Disk
40106 ~  ~ you currently use.
40107 ~  ~ This application requires
40108 ~  ~ to be running
40109 ~  ~ Make sure
40110 ~  ~ and its subdirectories are not renamed
40111 ~  ~ is running
40112 ~  ~ Network
40113 ~  ~ Activate online
40114 ~  ~ E-mail Product ID
40115 ~  ~ Enterprise Edition
40116 ~  ~ Enter the Name of the System where
40117 ~  ~ Enterprise Edition License Manger is installed

#FILE = E2KREGFM.EXE  'EDWin 2000 Registration Form'

411 ~  ~ Additional remarks:
412 ~  ~ Address:
413 ~  ~ Contact Name:
414 ~  ~ Contact Name:
415 ~  ~ Country:
416 ~  ~ Date (YYMMDD):
417 ~  ~ Date [YYMMDD]:
418 ~  ~ Demo version need not to be registered.
419 ~  ~ Distributed by:
4110 ~  ~ Registration
4111 ~  ~ Registration Form
4112 ~  ~ System Code:
4113 ~  ~ Version:
4114 ~  ~ Fax:
4115 ~  ~ Fill in this form and return it to Norlinvest Ltd for your registration.
4116 ~  ~ Maintenace
4117 ~  ~ Maintenance Y/N:
4118 ~  ~ P.O. Box 4035, S-182 04 ENEBYBERG, Sweden.   Fax +46-8-731 78 03
4119 ~  ~ Phone(s):
4120 ~  ~ Please use the rest of this page if you want to report a problem:
4121 ~  ~ Registration Form for E-Mail saved in file:
4122 ~  ~ Save Registration Form for E-Mail to visionics@bahnhof.se
4123 ~  ~ Send this Registration Form by E-Mail to: visionics@bahnhof.se
4124 ~  ~ Serial Number:
4125 ~  ~ State/County:
4126 ~  ~ State/County:
4127 ~  ~ System Code:
4128 ~  ~ UserName:
4129 ~  ~ Wait until your Licence is installed.
4130 ~  ~ Zip/Postal Code:
4131 ~  ~ Connecting to Server...
4132 ~  ~ Telephone No.
4133 ~  ~ Email ID
4134 ~  ~ Send
4135 ~  ~ Complete this form for Online Registration

#FILE = SERNUM.EXE 'EDWIN 2000 Serial Number'

421 ~  ~ Add Plug-In
422 ~  ~ Delete Plug-In
423 ~  ~ Demo version
424 ~  ~ Dongle
425 ~  ~ Master Priming Routine
426 ~  ~ Lite
427 ~  ~ not found or invalid
428 ~  ~ not found or priming failed
429 ~  ~ Program
4210 ~  ~ Range code:
4211 ~  ~ Read
4212 ~  ~ Set Variant
4213 ~  ~ Version:

#FILE = E2KEMA.EXE  'EDWin 2000 ElectroMagnetic Analyser'

431 ~  ~ Trace parameters
432 ~  ~ Copy to ClipBoard
433 ~  ~ Tab as delimeter?
434 ~  ~ Segment starts:
435 ~  ~ Segment ends:
436 ~  ~ Length
437 ~  ~ Width
438 ~  ~ Resistance
439 ~  ~ Capacitance
4310 ~  ~ Inductance
4311 ~  ~ Impedance
4312 ~  ~ Chr. Imp.
4313 ~  ~ Delay
4314 ~  ~ VIA:
4315 ~  ~ Ohm
4316 ~  ~ Trace Length:
4317 ~  ~ Total Length:
4318 ~  ~ Net Parameters
4319 ~  ~ Frequency (Hz)
4320 ~  ~ Voltage (V)
4321 ~  ~ Set Net:
4322 ~  ~ electrical parameters
4323 ~  ~ Electromagnetic Analyzer
4324 ~  ~ Field:
4325 ~  ~ Load Net Parameters...
4326 ~  ~ Append Net Parameters...
4327 ~  ~ Save Net Parameters...
4328 ~  ~ Toolbar
4329 ~  ~ &Board parameters
4330 ~  ~ &Field Calculation Parameters
4331 ~  ~ &Isoline Density
4332 ~  ~ Electromagnetic Analysis
4333 ~  ~ Ne&ts
4334 ~  ~ Isolines
4335 ~  ~ Lay:
4336 ~  ~ from
4337 ~  ~ Electromagnetic Analyzer
4338 ~  ~ Electromagnetic Analyzer Printout ... (<F10> to Cancel)
4339 ~  ~ Net Parameters file
4340 ~  ~ Select Net Electrical Parameters file
4341 ~  ~ Delete Field Intensity label text?
4342 ~  ~ Field Intensity:
4343 ~  ~ Net Electrical parameters
4344 ~  ~ Set Parameters:
4345 ~  ~ ViewTraces
4346 ~  ~ Select Net to Add:
4347 ~  ~ Currently Set Net Parameters:
4348 ~  ~ and other selected
4349 ~  ~ and some other selected
4350 ~  ~ Field Calculation Parameters
4351 ~  ~ Minimal Field [V/m]
4352 ~  ~ Maximal Field [V/m]
4353 ~  ~ Isolines' Density
4354 ~  ~ Min
4355 ~  ~ Total Cu thickness [m]:
4356 ~  ~ Permittivity of the board:
4357 ~  ~ Board thickness [m]:
4358 ~  ~ already set
4359 ~  ~ Frequency (Hz):
4360 ~  ~ Voltage (V):
4361 ~  ~ Net Name:
4362 ~  ~ Connectivity
4363 ~  ~ Propagating node:
4364 ~  ~ Splited Net!
4365 ~  ~ Connection branch ends
4366 ~  ~ Totals from
4367 ~  ~ Select Propagating Node:
4368 ~  ~ Accumulated values
4369 ~  ~ Simulate
4370 ~  ~ Add All
4371 ~  ~ Calculate
4372 ~  ~ Select Driver Nodes 
4373 ~  ~ Select Receiver Nodes  
4374 ~  ~ Simulation: 
4375 ~  ~ Other Nets: 
4376 ~  ~ Max.Prec 
4377 ~  ~ Technology 
4378 ~  ~ Function: 
4379 ~  ~ Time Step
4380 ~  ~ Start Time
4381 ~  ~ Time Limit
4382 ~  ~ Sgmt.Test Point
4383 ~  ~ Driver Node:
4384 ~  ~ Function
4385 ~  ~ Resistance (R out)
4386 ~  ~ Inductance (L out)
4387 ~  ~ Capacitance (C out)
4388 ~  ~ Voltage min
4389 ~  ~ Voltage max
4390 ~  ~ Freq.
4391 ~  ~ T phase
4392 ~  ~ T L->H
4393 ~  ~ T High
4394 ~  ~ T H->L
4395 ~  ~ T Low
4396 ~  ~ Steps
4397 ~  ~ Receiver Node:
4398 ~  ~ Resistance (R in)
4399 ~  ~ Inductance (L in)
43100 ~  ~ Capacitance (C in)
43101 ~  ~ Test Point
43102 ~  ~ Square Pulse
43103 ~  ~ Sine Pulse
43104 ~  ~ Constant
43105 ~  ~ PWL Source
43106 ~  ~ Signal Integrity Simulation 
43107 ~  ~ Simulation  
43108 ~  ~ Waveform Display: 
43109 ~  ~ Step: 
43110 ~  ~ PWL Values files
43111 ~  ~ Select PWL Function Values file
43112 ~  ~ Too many Test Points (max 32 allowed
43113 ~  ~ Can't create Super Node
43114 ~  ~ Can't build equivalent circuit
43115 ~  ~ Can't set simulation time step
43116 ~  ~ Can't initialize simulation
43117 ~  ~ Can't continue simulation
43118 ~  ~ Time Step too large
43119 ~  ~ Time Step too small
43120 ~  ~ Start Time too large
43121 ~  ~ Incorrect Time value - Step:
43122 ~  ~ Load from file
43123 ~  ~ Steps:
43124 ~  ~ Waveform Display Start Time:
43125 ~  ~ Simulation End Time:
43126 ~  ~ PWL Source Setup
43127 ~  ~ Nets selected for simulation: 
43128 ~  ~ Trace Segements 
43129 ~  ~ GND 
43130 ~  ~ Drives/Receivers not set - Net: 
43131 ~  ~ Trace Layers Sandwich (Top --> Bottom):
43132 ~  ~ Make Sandwich
43133 ~  ~ All used Trace Layers
43134 ~  ~ Select Layers: 
43135 ~  ~ Layer 
43136 ~  ~ Thickness[m] 
43137 ~  ~ GND? 
43138 ~  ~ Dielectric 
43139 ~  ~ Connection(s) missing . Can't simulate Net:
43140 ~  ~ Density:
43141 ~  ~ Raster:
43142 ~  ~ Simulate all nets in the list
43143 ~  ~ Simbord32  
43144 ~  ~ Autoscale maximal
43145 ~  ~ Graph extent  [m]: 
43146 ~  ~ Step Simulation
43147 ~  ~ Graph: 
43148 ~  ~ Select Field:
43149 ~  ~ Scalar potential
43150 ~  ~ Magnetic field
43151 ~  ~ Electric field
43152 ~  ~ Vector potential
43153 ~  ~ Run Simulation
43154 ~  ~ Autoscale charted values
43155 ~  ~ Show spectral chart
43156 ~  ~ Number of steps:
43157 ~  ~ E max [V/m]
43158 ~  ~ precision raster:
43159 ~  ~ Color graph display grid:
43160 ~  ~ Graph center
43161 ~  ~ Y[m]:
43162 ~  ~ Field Analyzer
43163 ~  ~ E probe [V/m]:
43164 ~  ~ Display fields 
43165 ~  ~ Generate Waveform
43166 ~  ~ Color graph
43167 ~  ~ Isoline graph
43168 ~  ~ Field direction graph
43169 ~  ~ Polar coordinates graph 
43170 ~  ~ 3D graph
43171 ~  ~ Next step
43172 ~  ~ Continue run
43173 ~  ~ Time Step:
43174 ~  ~ Hz probe [A/m]
43175 ~  ~ Hz max [A/m]
43176 ~  ~ Em probe [V/m]
43177 ~  ~ Em max [V/m]
43178 ~  ~ Am probe [A]
43179 ~  ~ Am max [A]
43180 ~  ~ Fi probe [V] 
43181 ~  ~ Fi max [V] 
43182 ~  ~ Pause
43183 ~  ~ Scale chart to:
43184 ~  ~ Scale field values to:
43185 ~  ~ Field Units
43186 ~  ~ Set current Field units
43187 ~  ~ View Isolines
43188 ~  ~ Unit for Field Strength
43189 ~  ~ Emission color for
43190 ~  ~ Thickness [m]
43191 ~  ~ Maximum Field Strength
43192 ~  ~ Minimum Field Strength
43193 ~  ~ % of Max. Field Strength.
43194 ~  ~ View Traces
43195 ~  ~ Board Constants
43196 ~  ~ Set to Trace Layers used
43197 ~  ~ Field Scaling
43198 ~  ~ Isoline Density
43199 ~  ~ &Toolbar
43200 ~  ~ Layout View
43201 ~  ~ Ema
43202 ~  ~ &EMA Display
43203 ~  ~ Tooltip Te&xt
43204 ~  ~ Time[s]
43205 ~  ~ Voltage[V]
43206 ~  ~ Field Values
43207 ~  ~ Pause Simulation
43208 ~  ~ Close Field Analyser!
43209 ~  ~ Stop Simulation
43210 ~  ~ Tp.
43211 ~  ~ Desc
43212 ~  ~ Click for summarized view
43213 ~  ~ Click for detailed view
43214 ~  ~ &Show Node Params
43215 ~  ~ Click to show node parameters
43216 ~  ~ &Show Trace Segments
43217 ~  ~ Click to show trace segments
43218 ~  ~ Split
43219 ~  ~ Br end
43220 ~  ~ Simple Node :
43221 ~  ~ Node Parameters
43222 ~  ~ &Settings...
43223 ~  ~ &Run Electromagnetic Analysis
43224 ~  ~ Time Step Calculation
43225 ~  ~ No Parameters Available for the Selected Item!
43226 ~  ~ Selected Nets ...
43227 ~  ~ Available Nets ...
43228 ~  ~ &Prop
43229 ~  ~ &Driver Node
43230 ~  ~ &Reciever Node
43231 ~  ~ &Simple Node
43232 ~  ~ R&emove Net
43233 ~  ~ &Set all nodes to receivers
43234 ~  ~ Graph Modes
43235 ~  ~ X[m]:
43236 ~  ~ Graph Params
43237 ~  ~ Controls
43238 ~  ~ Autoscale
43239 ~  ~ Plot Settings
43240 ~  ~ Scale to:
43241 ~  ~ Charted values
43242 ~  ~ Color Palette
43243 ~  ~ Color Palette Legend
43244 ~  ~ View Color Palette Legend
43245 ~  ~ Part Incomplete
43246 ~  ~ Save Net Electrical Parameters file
43247 ~  ~ PWL (Recorded)
43248 ~  ~ PWL (File)

43249 ~  ~ Set current Temparature unit
43250 ~  ~ Display 3D board thermal view
43251 ~  ~ Board Analyzers
43252 ~  ~ Select Net(s) for Simulation:
43253 ~  ~ Temparature Units
43254 ~  ~ Trace Frames
43255 ~  ~ View traces in frame format
43256 ~  ~ Redraw on selected XY-coordinates
43257 ~  ~ XY-Coordinates
43258 ~  ~ Enter absolute XY-coordinates
43259 ~  ~ Enter XY-displacement from board datum
43260 ~  ~ Enter XY-displacement from current reference point
43261 ~  ~ Format: x,y
43262 ~  ~ EMA is disabled. Close Oscillograph to continue
 

#FILE = E2KLIBUG.EXE  'EDWin 2000 Library Upgrade'

441 ~  ~ << Back                                
442 ~  ~ Save Summary                           
443 ~  ~ Finish                         
444 ~  ~ Info                                 
445 ~  ~ Listing of newly available library elements.       
446 ~  ~ To run this program user must have licensed version of 
447 ~  ~ Are you sure you want to update the library files
448 ~  ~ Update
449 ~  ~ Ask for overwriting  existing library components
4410 ~ ~ Overwrite existing Library components
4411 ~ ~ Change destination path:
4412 ~ ~ Destination path for library files:
4413 ~ ~ Processing Library Files
4414 ~ ~ Done
4415 ~ ~ Loading Part into memory
4416 ~ ~ Saving part
4417 ~ ~ Loading Package
4418 ~ ~ Loading symbol
4419 ~ ~ Saving symbol
4420 ~ ~ Select Destination folder to place Libfiles
4421 ~ ~ Execute
4422 ~ ~ Updating Subcircuit index file
4423 ~ ~ Copying File
4424 ~ ~ OK
4425 ~ ~ Lib Elements
4426 ~ ~ Target SubDir
4427 ~ ~ Target Library
4428 ~ ~ Need To Copy
4429 ~ ~ Library ElementS
4430 ~ ~ Library
4431 ~ ~ Target Dir
4432 ~ ~ Status
4433 ~ ~ Not copied
4434 ~ ~ Copied
4435 ~ ~ Cannot copy file
4436 ~ ~ Cannot copy part
4437 ~ ~ Cannot open destination library
4438 ~ ~ Cannot load part
4439 ~ ~ Cannot open library
4440 ~ ~ Cannot save symbol
4441 ~ ~ Cannot load symbol
4442 ~ ~ Make sure that Upgrade files are in the specified path :
4443 ~ ~ 
4444 ~ ~ Unknown Error
4445 ~ ~ Updating Model parameter index file
4446 ~ ~ Library  Update Summary
4447 ~ ~ Make sure the system and its subdirectories are not renamed
4448 ~ ~ Copying Status
4449 ~ ~ Terminate
4450 ~ ~ Build
4451 ~ ~ Create Upgrade.lst file only
4452 ~ ~ Create Upgrade.lst files and lib files
4453 ~ ~ Filetype
4454 ~ ~ Thermal data file
4455 ~ ~ Thermal analyzer file
4456 ~ ~ Spice profile file
4457 ~ ~ Spice Model Lib File
4458 ~ ~ System file
4459 ~ ~ Misc Lib file
4460 ~ ~ Select the path where Upgrade files are located on your machine.
4461 ~ ~ Make sure that Upgrade files are in a single folder.            
4462 ~ ~ User is not supposed to place Upgrade files in different folders.
4463 ~ ~ This application requires Windows 3.1 or later                   
4464 ~ ~ Library Upgrade Utility                                    
4465 ~ ~ Make sure EDWin is running                                       
4466 ~ ~ Part file                                                      
4467 ~ ~ Symbol                                                 
4468 ~ ~ Package
4469 ~ ~ Mixed Mode Parameter Lib File                                   
4470 ~ ~ Mixed mode parameter (model) with same name
4471 ~ ~ is already stored in lib:
4472 ~ ~ Overwrite anyway ?
4473 ~ ~ Loading mixed mode parameter (model)
4474 ~ ~ Saving mixed mode parameter (model)
4475 ~ ~ to Library:-
4476 ~ ~ SML parameter(model) with same name 
4477 ~ ~ Loading SML (model) 
4478 ~ ~ Saving SML parameter(model)  
4479 ~ ~ Updating  modal parameter index file
4480 ~ ~ Cannot update Model Parameter index file
4481 ~ ~ Cannot update Subcircuit index file
4482 ~ ~ Cannot perform library upgradation without clearing Project
4483 ~ ~ Spice subcicuit file
4484 ~ ~ Spice subcircuit file
4485 ~ ~ File not found:

#FILE = E2KCONVT.EXE  'EDWin 2000 CONVERSION MANAGER'

451   ~ ~ Conversion Manager
452   ~ ~ Library Type:
453   ~ ~ Parts
454   ~ ~ Symbols
455   ~ ~ Packages
456   ~ ~ Input File :- *.TDV ; *.TSS ; *.TSL
457   ~ ~ Convert
458   ~ ~ EEDIII Import/Export ASCII Project
459   ~ ~ Import
4510  ~ ~ Export
4511  ~ ~ Output Library:
4512  ~ ~ Exit
4513  ~ ~ Help
4514  ~ ~ Select EDWin16 database files (* . EDB )
4515  ~ ~ Layout
4516  ~ ~ Schematic
4517  ~ ~ Start Conversion
4518  ~ ~ Save Project
4519  ~ ~ Redraw
4520  ~ ~ Set  Library Path
4521  ~ ~ Converted  Libraries
4522  ~ ~ Done
4523  ~ ~ Reading/Converting Parts
4524  ~ ~ Reading/Converting Symbols
4525  ~ ~ Reading/Converting Via Padstacks
4526  ~ ~ Reading/Converting Hierarchies
4527  ~ ~ Reading/Converting Filemaps
4528  ~ ~ Reading/Converting Tables
4529  ~ ~ Reading/Converting ProjectInfo
4530  ~ ~ Reading/Converting Bitmaps
4531  ~ ~ Searching/Reading/Converting SpiceAC parameters
4532  ~ ~ Searching/Reading/Converting SpiceDC parameters
4533  ~ ~ Searching/Reading/Converting Spice markers
4534  ~ ~ Searching/Reading/Converting Spice Bridges
4535  ~ ~ Searching/Reading/Converting Spice References
4536  ~ ~ Searching/Reading/Converting Spice DC parameters
4537  ~ ~ Searching/Reading/Converting Spice Subckt Descriptions
4538  ~ ~ Searching/Reading/Converting Print References
4539  ~ ~ Searching/Reading/Converting Spice Plot References
4540  ~ ~ Searching/Reading/Converting Spice Temporary Strings
4541  ~ ~ Searching/Reading/Converting Spice Poly nodes
4542  ~ ~ Searching/Reading/Converting Spice Files
4543  ~ ~ Searching/Reading/Converting Spice Expressions
4544  ~ ~ Searching/Reading/Converting Spice Sim Options
4545  ~ ~ Searching/Reading/Converting Spice Initial Conditions
4546  ~ ~ Searching/Reading/Converting Spice Node References
4547  ~ ~ Searching/Reading/Converting Spice Sub Nodes
4548  ~ ~ Searching/Reading/Converting Spice Marker strings
4549  ~ ~ Searching/Reading/Converting Spice Function file headers
4550  ~ ~ Searching/Reading/Converting Spice Parameters
4551  ~ ~ Searching/Reading/Converting EMA Board Preferences
4552  ~ ~ Searching/Reading/Converting EMA Net Parameters
4553  ~ ~ Searching/Reading/Converting Router Strategies
4554  ~ ~ Searching/Reading/Converting EMA Node Parameters
4555  ~ ~ Reading/Converting Nets
4556  ~ ~ Reading/Converting Buses
4557  ~ ~ Reading/Converting Vias
4558  ~ ~ Reading/Converting Bending Points
4559  ~ ~ Reading/Converting Layout Components
4560  ~ ~ Reading/Converting Traces
4561  ~ ~ Reading/Converting Layout Texts
4562  ~ ~ Reading/Converting Schematic Pages
4563  ~ ~ Reading/Converting Junctions
4564  ~ ~ Reading/Converting Schematic Components
4565  ~ ~ Reading/Converting Branches
4566  ~ ~ Loading Schematic symbol
4567  ~ ~ of
4568  ~ ~ Converting Schematic symbols
4569  ~ ~ Saving Schematic symbol
4570  ~ ~ to Library
4571  ~ ~ Done
4572  ~ ~ Loading part
4573  ~ ~ Saving Part
4574  ~ ~ Loading Layout symbol
4575  ~ ~ Converting Layout symbols
4576  ~ ~ Saving Layout Symbol
4577  ~ ~ Loading Mixed Mode Parameter(s)
4578  ~ ~ Converting Mixed Mode Parameter(s)
4579  ~ ~ Saving Mixed Mode Parameter(s)
4580  ~ ~ Loading Padstack
4581  ~ ~ Saving Padstack
4582  ~ ~ Loading SML file
4583  ~ ~ Converting SML file items
4584  ~ ~ Saving SML file
4585  ~ ~ Item(s)
4586  ~ ~ Symbol :
4587  ~ ~ Converted
4588  ~ ~ symbol(s)
4589  ~ ~ Part:
4590  ~ ~ part(s)
4591  ~ ~ Library Conversion Manager
4592  ~ ~ Library Conversion
4593  ~ ~ Schematic Symbol with same name
4594  ~ ~ exists Overwrite anyway ?
4595  ~ ~ Part with same name
4596  ~ ~ Layout Symbol with same name
4597  ~ ~ Mixed Mode Parameter with same name
4598  ~ ~ SML file item with same name
4599  ~ ~ Project Conversion
45100 ~ ~ Part Conversion Failed
45101 ~ ~ Symbol Conversion Failed
45102 ~ ~ ViaPadstack  Conversion Failed
45103 ~ ~ Hierarchy Conversion Failed
45104 ~ ~ FileMap Conversion Failed
45105 ~ ~ Cannot convert Hierarchy
45106 ~ ~ Cannot Set Hierarchy
45107 ~ ~ Conversion of Nets failed
45108 ~ ~ Conversion of Buses failed
45109 ~ ~ Conversion of Vias failed
45110 ~ ~ Conversion of Bending Points failed
45111 ~ ~ Conversion of Layout Components failed
45112 ~ ~ Conversion of Traces failed
45113 ~ ~ Conversion of Layout Texts failed
45114 ~ ~ Conversion of Schematic Pages failed
45115 ~ ~ Cannot set schematic page
45116 ~ ~ Conversion of Junctions failed
45117 ~ ~ Conversion of Schematic Components failed
45118 ~ ~ Conversion of Branches failed
45119 ~ ~ Project not saved
45120 ~ ~ Can't read Router Strategy
45121 ~ ~ Unknown version of Router Strategy file
45122 ~ ~ Invalid format of Router Strategy file
45123 ~ ~ Can't create P/S pin in Part:
45124 ~ ~ Can't create Part:
45125 ~ ~ Can't save Part:
45126 ~ ~ Can't create signal pin in Part:
45127 ~ ~ Can't create group in Part:
45128 ~ ~ Can't create Symbol:
45129 ~ ~ Can't create item in symbol:
45130 ~ ~ Can't save Symbol:
45131 ~ ~ Can't create Padstack:
45132 ~ ~ Can't load Project vector font, default assumed.
45133 ~ ~ Project Creation failed.
45134 ~ ~ Can't load the library :
45135 ~ ~ Can't create Project :
45136 ~ ~ Can't access the Project
45137 ~ ~ Could not create ArcTrace
45138 ~ ~ Could not create Trace
45139 ~ ~ Cannot create Symbol :
45140 ~ ~ Loading of library item failed
45141 ~ ~ Loading of Mixed Mode Parameters failed
45142 ~ ~ Select library item for conversion
45143 ~ ~ Save converted Project
45144 ~ ~ Unable to Access Drive
45145 ~ ~ Cannot create Branch
45146 ~ ~ Finish current operation for:
45147 ~ ~ Path:
45148 ~ ~ not available
45149 ~ ~ Can't start:
45150 ~ ~ EEDIII Conversion
45151 ~ ~ Part Libraries
45152 ~ ~ Schematic Libraries
45153 ~ ~ Layout Libraries
45154 ~ ~ Padstack Libraries
45155 ~ ~ Spice Model Libraries
45156 ~ ~ Mixed Mode Parameter Libraries
45157 ~ ~ Library Elements
45158 ~ ~ Can't read file :
45159 ~ ~ Save Part Library As
45160 ~ ~ Save Symbol Library As
45161 ~ ~ Save Package Library As
45162 ~ ~ Save Padstack Library As
45163 ~ ~ Save SML Library As
45164 ~ ~ Save MPL Library As
45165 ~ ~ Unexpected Error
45166 ~ ~ Unable to establish DDE link .
45167 ~ ~ MM Sim value removed for the symbol
45168 ~ ~ Error in file E2kSIMUG.INI, MM Sim values will not be updated
45169 ~ ~ Save 32 bit Project File as

#FILE = E2KFNTED.EXE   'EDWin 2000 Font Editor'

461 ~  ~ Vector Font Editor
462 ~  ~ Copy' Character (ASCII):
463 ~  ~ Character (ASCII):
464 ~  ~ Mode:
465 ~  ~ View
466 ~  ~ &Get Current Vector Font
467 ~  ~ &Load Vector Font from Disk
468 ~  ~ &Put Vector Font as Current
469 ~  ~ &Save Vector Font to Disk
4610 ~  ~ Character Changed. Store?
4611 ~  ~ Exit Vector Font Editor?
4612 ~  ~ Select Character
4613 ~  ~ Vector Font Editor (Current)
4614 ~  ~ Get Current Vector Font?
4615 ~  ~ Restore Character ?
4616 ~  ~ Store Character ?
4617 ~  ~ Copy 'From' Character ?
4618 ~  ~ Copy 'To' Character ?

#FILE = E2KSBMPE.EXE   'EDWin 2000 Subcircuit Adaptor'

471 ~  ~ Details
472 ~  ~ Node Type
473 ~  ~ Digital Input
474 ~  ~ Digital Output
475 ~  ~ Select Files For Conversion
476 ~  ~ Opening File
477 ~  ~ Opened File:
478 ~  ~ Subcircuit Description Complete
479 ~  ~ Incomplete Subcircuit Description, Fill all Fields
4710 ~  ~ Incomplete Subcircuit Description
4711 ~  ~ Invalid Characters in Description
4712 ~  ~ Choose Directory
4713 ~  ~ Selected Directory:
4714 ~  ~ Current Save In Directory:
4715 ~  ~ This File Already Exists, Overwrite?
4716 ~  ~ Saved Subcircuit
4717 ~  ~ Sub Circuit String
4718 ~  ~ Save Aborted
4719 ~  ~ Creating Subcircuit Index
4720 ~  ~ Created Subcircuit Index
4721 ~  ~ No Subcircuits Found
4722 ~  ~ Original File
4723 ~  ~ Create Index
4724 ~  ~ Previous File
4725 ~  ~ Next File
4726 ~  ~ Save In
4727 ~  ~ Save SubCkt
4728 ~  ~ Subcircuit Adaptor
4729 ~  ~ Drive not Ready or Invalid
4730 ~  ~ Subcircuits

#FILE = E2KOPTIONS.EXE'EDWin 2000 Option SetUp'

481   ~  ~ Trace segments
482   ~  ~ Round Pads
483   ~  ~ Square Pads
484   ~  ~ inch
485   ~  ~ mm
486   ~  ~ Application
487   ~  ~ Display Mode
488   ~  ~ Active
489   ~  ~ Schematic Editor
4810  ~  ~ Layout Editor
4811  ~  ~ Library Browser
4812  ~  ~ Normal
4813  ~  ~ Minimized
4814  ~  ~ Maximized
4815  ~  ~ Lines
4816  ~  ~ Round
4817  ~  ~ Square
4818  ~  ~ Name
4819  ~  ~ X-Size
4820  ~  ~ Y-Size
4821  ~  ~ Default
4822  ~  ~ Degrees
4823  ~  ~ Pixel
4824  ~  ~ Bus line width
4825  ~  ~ Wire line width
4826  ~  ~ &Layout Categories
4827  ~  ~ Color
4828  ~  ~ Preview
4829  ~  ~ Layout Categories
4830  ~  ~ La&yers
4831  ~  ~ Selected path [Folder name]
4832  ~  ~ Library Files
4833  ~  ~ Job Files
4834  ~  ~ System Files
4835  ~  ~ EED3 Files
4836  ~  ~ Schematic
4837  ~  ~ Layout
4838  ~  ~ General
4839  ~  ~  item(s)
4840  ~  ~ Current Aperture Table has been changed
4841  ~  ~ Do You wish to save changes ?
4842  ~  ~ Files
4843  ~  ~ Colors
4844  ~  ~ Layer Names
4845  ~  ~ Formats
4846  ~  ~ Sizes
4847  ~  ~ Packaging Preferences
4848  ~  ~ Help
4849  ~  ~ Extracting StartUp Application Info...
4850  ~  ~ Extracting Text Sizes Info...
4851  ~  ~ Extracting Packaging Info...
4852  ~  ~ Extracting Aperture Info...
4853  ~  ~ Extracting Schematic Text Info...
4854  ~  ~ Extracting Layout Text Info...
4855  ~  ~ Extracting Schematic Bus/Wire Info...
4856  ~  ~ Extracting Schematic Color Info...
4857  ~  ~ Extracting Layout/Layer Color Info...
4858  ~  ~ Extracting Trace segment/Square pad,Round pad Info...
4859  ~  ~ Extracting Grid/Snap Info...
4860  ~  ~ Extracting Schematic Page Info...
4861  ~  ~ Extracting Board Info...
4862  ~  ~ Extracting Padstack Info...
4863  ~  ~ &Directories
4864  ~  ~ &Padstacks
4865  ~  ~ &Apertures
4866  ~  ~ &Schematic Categories
4867  ~  ~ Layers
4868  ~  ~ &Component Name
4869  ~  ~ &Pinout
4870  ~  ~ &Description
4871  ~  ~ &Sch Texts
4872  ~  ~ &Lay Texts
4873  ~  ~ Sc&h Conductors
4874  ~  ~ La&y Conductors
4875  ~  ~ &Grids and Snaps
4876  ~  ~ Schematic &Page Size
4877  ~  ~ Layout &Board Size
4878  ~  ~ &Layer Names
4879  ~  ~ Enabled
4880  ~  ~ Select Library Files path :
4881  ~  ~ Select Job Files path :
4882  ~  ~ Select System Files path :
4883  ~  ~ Select EED3 Files path :
4884  ~  ~ Size to insert
4885  ~  ~ Aperture Table
4886  ~  ~ Currently Set Path :
4887  ~  ~ Select Library:
4888  ~  ~ Padstacks:
4889  ~  ~ Current Aperture Table:
4890  ~  ~ List of Aperture Tables:
4891  ~  ~ Save Aperture Table
4892  ~  ~  Named As :
4893  ~  ~ Insert Size
4894  ~  ~ Delete Size
4895  ~  ~ Sizes:
4896  ~  ~ D-Codes:
4897  ~  ~ Component Name:
4898  ~  ~ Generate Component Name
4899  ~  ~ Generation Preferences
48100 ~  ~ Texts:
48101 ~  ~ Predefined by  COMPNAME text size in the symbol
48102 ~  ~ Set Text format:
48103 ~  ~ Text Location with Repack Function:
48104 ~  ~ Previous Component Name text locations
48105 ~  ~ Predefined by  COMPNAME text location in the symbol
48106 ~  ~ Pinout Text:
48107 ~  ~ Generate as predefined in the symbol
48108 ~  ~ Preferences override setting predefined in the symbol
48109 ~  ~ Generate Pinout Text
48110 ~  ~ Default
48111 ~  ~ Set Text Size:
48112 ~  ~ Text Location with Repack Function:
48113 ~  ~ Previous Pinout Text locations
48114 ~  ~ Predefined by  PA text locations in the symbol
48115 ~  ~ Contents:
48116 ~  ~ Pin Number
48117 ~  ~ Sch. Entry Name
48118 ~  ~ Both combined
48119 ~  ~ Component Description:
48120 ~  ~ Generate Part Description
48121 ~  ~ Predefined by  COMPDESC text size in the symbol
48122 ~  ~ Previous Description Text locations
48123 ~  ~ Predefined by  COMDESC text locations in the symbol
48124 ~  ~ Part Name
48125 ~  ~ Part Full Name
48126 ~  ~ Group Name
48127 ~  ~ External Index Code
48128 ~  ~ EDSpice Reference
48129 ~  ~ Group Name as Comp. Value
48130 ~  ~ American Formats [ inches ] :
48131 ~  ~ European Formats [ mm ] :
48132 ~  ~ Active  Applications for StartUp :
48133 ~  ~ Image Size Option : ( Custom Size Range: 16 - 99 Pels )
48134 ~  ~ Project Window :
48135 ~  ~ Tasks Window :
48136 ~  ~ Custom
48137 ~  ~ Save Settings on Exit
48138 ~  ~ Set Options  for Current Project
48139 ~  ~ AutoHelp On/Off
48140 ~  ~ Default -> Current
48141 ~  ~ Enabled
48142 ~  ~ Schematic :
48143 ~  ~ Height:
48144 ~  ~ Line width:
48145 ~  ~ Layout :
48146 ~  ~ Edit symbol line widths :
48147 ~  ~ Trace Segment / Package Line widths :
48148 ~  ~ Airgap Sizes :
48149 ~  ~ Square Pad sizes :
48150 ~  ~ Round Pad diameters:
48151 ~  ~ Angle Snap :
48152 ~  ~ Pick Area :
48153 ~  ~ Grid
48154 ~  ~ Snap
48155 ~  ~ Precision
48156 ~  ~ Can't read file:
48157 ~  ~ Can't create/write to file:
48158 ~  ~ Path:
48159 ~  ~ not available
48160 ~  ~ Auto BackUp ( Interval : minutes ):
48161 ~  ~ &Highlight
48162 ~  ~ Preview Enabled
48163 ~  ~ Fit to page
48164 ~  ~ Fit to board
48165 ~  ~ True Size
48166 ~  ~ Grid Dot
48167 ~  ~ Grid Line
48168 ~  ~ Grid Cross
48169 ~  ~ Bold
48170 ~  ~ Italics
48171 ~  ~ Underline
48172 ~  ~ Strike through
48173 ~  ~ Schematic Components Labeling Scheme
48174 ~  ~ Create component label
48175 ~  ~ Label Contents
48176 ~  ~ Add component name
48177 ~  ~ Add pin description
48178 ~  ~ Entry name
48179 ~  ~ Entry simulation name
48180 ~  ~ Add part name
48181 ~  ~ Use fonts from list
48182 ~  ~ Restore Default
48183 ~  ~ Path not found. Verify ( Files->Directories )in options menu.
48184 ~  ~ Do you want permanantly apply these settings ?
48185 ~  ~ &OK
48186 ~  ~ Create board with selected default board size
48187 ~  ~ Create page with selected default page size
48188 ~  ~ Languages
48189 ~  ~ Set Library files path invalid, changed to default path
48190 ~  ~ Set Job files path invalid, changed to default path
48191 ~  ~ Set System files path invalid, changed to default path
48192 ~  ~ Set EED files path invalid, changed to default path
48193 ~  ~ Options Setup
48194 ~  ~ Directories
48195 ~  ~ Undo Level ( Range : 1 to 10 )
48196 ~  ~ Active Apps
48197 ~  ~ Icon Sizes
48198 ~  ~ Recovery & Units
48199 ~  ~ Folders
48200 ~  ~ Color & Layers
48201 ~  ~ Schematic Page
48202 ~  ~ Layout Board
48203 ~  ~ Bus/Wire
48204 ~  ~ Square Pad
48205 ~  ~ Round Pad
48206 ~  ~ Packaging Prefs.
48207 ~  ~ Comp. Label Scheme
48208 ~  ~ Options
48209 ~  ~ Project options setup
48210 ~  ~ Predefined by COMPNAME
48211 ~  ~ Set Format
48212 ~  ~ Previous Text Location
48213 ~  ~ Setting
48214 ~  ~ Generate Comp. Name
48215 ~  ~ - Generation Format
48216 ~  ~    + Set Font
48217 ~  ~      * Name
48218 ~  ~      * Size
48219 ~  ~      * Bold
48220 ~  ~      * Italic
48221 ~  ~      * Underline
48222 ~  ~      * Strike Through
48223 ~  ~  - Set Repack Location
48224 ~  ~ Predefined by COMPDESC
48225 ~  ~ No Group Name
48226 ~  ~ - Set Contents
48227 ~  ~    + Part Name
48228 ~  ~    + Part Full Name
48229 ~  ~    + External Index Code
48230 ~  ~    + EDSpice Reference
48231 ~  ~    + Group Name
48232 ~  ~  File Types
48233 ~  ~ Folder Name
48234 ~  ~ Angle
48235 ~  ~ Board Name
48236 ~  ~ Trace/Package Line Width
48237 ~  ~ Air Gap Item
48238 ~  ~  - Use font from List
48239 ~  ~ Pixels
48240 ~  ~ Predefined by Symbol
48241 ~  ~ Symbol Line Width
48242 ~  ~ Create Comp. Label
48243 ~  ~  - Add Comp. Name
48244 ~  ~ - Add Pin Description
48245 ~  ~   + Entry
48246 ~  ~ - Add Part Name
48247 ~  ~ Format Name
48248 ~  ~ Height
48249 ~  ~ L Width
48250 ~  ~ Image Type
48251 ~  ~ Size {8 - 99}
48252 ~  ~ Project Window
48253 ~  ~ Tasks Window
48254 ~  ~ Language
48255 ~  ~ Operation
48256 ~  ~ Undo Redo Level
48257 ~  ~    - All Editors {1 - 10}
48258 ~  ~    - Library Editor {1 - 30}
48259 ~  ~ Auto Back Up
48260 ~  ~    - Interval {1 - 59} min
48261 ~  ~ Save changes to INI file
48262 ~  ~ No default Page.
48263 ~  ~ No default Board.
48264 ~  ~ Select a sub category to set the Options ...
48265 ~  ~ &Grid Line
48266 ~  ~ &Grid Cross
48267 ~  ~ &Grid Dot
48268 ~  ~ This option allows to set the required applications active, change working language dynamically,set the icon size of the project & task window, facilitates autobackup and sets the level of UNDO/ REDO functions.
48269 ~  ~ This option allows to set the working directory for SYSTEM files, LIBRARY files, PROJECT files and EED3 files.
48270 ~  ~ This option allows to set the color for Schematic and Layout categories. The layer names may also be changed here.
48271 ~  ~ This option allows to set the default page/ board size. Available American and European standard formats are displayed.
48272 ~  ~ Compacting Project Library will remove unused Parts, Symbols and Packages. Continue?
48273 ~  ~ Override Editors with System Units
48274 ~  ~    - System Unit
48275 ~  ~ The various default sizes for Schematic and Layout objects may be set. Angle snap and Pick area may be set generally for all modules/ editors
48276 ~  ~ The necessary packaging information that require to appear while packaging may be set. Component name, Pinout and Component description are the information that may be set here
48277 ~  ~ The necessary schematic/ layout labeling information that require to appear while components are placed may be set.
48278 ~  ~ Save && E&xit

#FILE = E2KVIEWER.EXE 'EDWin 2000 Viewer'

491  ~  ~ &File
492  ~  ~ CIRCUIT: [
493  ~  ~ ] PAGE: [
494  ~  ~ E&xit
495  ~  ~ Object Viewer
496  ~  ~ Packages [Project Library]
497  ~  ~ Board datum
498  ~  ~ Format datum
499  ~  ~ &Bitmaps
4910 ~  ~ Set current coordinates (XY/Distance)
4911 ~  ~ Page &Outline
4912 ~  ~ &Scroll Bars
4913 ~  ~ &Task Toolbar
4914 ~  ~ Coordinates
4915 ~  ~ Set current working unit
4916 ~  ~ All used layers
4917 ~  ~ Hrf Items
4918 ~  ~ Package Details
4919 ~  ~ Fit to board
4920 ~  ~ Zoom Precision
4921 ~  ~ Fit to page
4922 ~  ~ Grids
4923 ~  ~ Grid Values
4924 ~  ~ Interact with main editors
4925 ~  ~ Close 
4926 ~  ~ &Preferences
4927 ~  ~ Current Layer Info
4928 ~  ~ Padstack info
4929 ~  ~ Padstack Details
4930 ~  ~ &Air gap
4931 ~  ~ Symbol &List
4932 ~  ~ Symbols [Project Library]
4933 ~  ~  Package Viewer
4934 ~  ~ PCB Layout Preferences
4935 ~  ~  Padstack Viewer
4936 ~  ~  Schematic Viewer
4937 ~  ~  Symbol Viewer
4938 ~  ~  Layout Viewer
4939 ~  ~ Refresh Symbol List
4940 ~  ~ Refresh Package List
4941 ~  ~ Symbol List
4942 ~  ~ Add &Top level
4943 ~  ~ Find &next
4944 ~  ~ Enter Node Search Criteria (Use '*','?' for wildcard matching):
4945 ~  ~ No more matches found!
4946 ~  ~ JEDEC Name
4947 ~  ~ Popup
4948 ~  ~ IPC Name
4949 ~  ~ Alternative Name
4950 ~  ~ Triangle
4951 ~  ~ Rectangle
4952 ~  ~ Arc
4953 ~  ~ No aperture defined for selected item
4954 ~  ~ Original coordinates
4955 ~  ~ Import with true line sizes
4956 ~  ~ Artwork Inner Layer (K)
4957 ~  ~ Artwork Inner Layer (L)
4958 ~  ~ Artwork Inner Layer (M)
4959 ~  ~ Artwork Inner Layer (N)
4960 ~  ~ Artwork Inner Layer (O)
4961 ~  ~ Artwork Inner Layer (P)
4962 ~  ~ Artwork Inner Layer (Q)
4963 ~  ~ Artwork Inner Layer (R)
4964 ~  ~ Artwork Inner Layer (S)
4965 ~  ~ Artwork Inner Layer (T)
4966 ~  ~ Artwork Inner Layer (U)
4967 ~  ~ Artwork Inner Layer (V)
4968 ~  ~ Artwork Inner Layer (W)
4969 ~  ~ Insufficient memory, close other Editors and try

#FILE = E2KBRWSR.EXE  'EDWin 2000 Library Browser'

501 ~  ~ &Find Alias
502 ~  ~ Send To
503 ~  ~ Delete From &List
504 ~  ~ Save List
505 ~  ~ Select &All
506 ~  ~ P&roperties
507 ~  ~ View Padstack
508 ~  ~ Permanently Delete Selected Part(s)?
509 ~  ~ Permanently Delete Selected Symbol(s)?
5010 ~  ~ Permanently Delete Selected Package(s)?
5011 ~  ~ Manufacturer
5012 ~  ~ Externel Index Code
5013 ~  ~ Simulation Function
5014 ~  ~ EDSpice Simulation Ref
5015 ~  ~ EDSpice ElementCode
5016 ~  ~ EDSpice Model Code / SubCircuit
5017 ~  ~ EDSpice Variant
5018 ~  ~ Padstack(s) found
5019 ~  ~ Save Part Search List
5020 ~  ~ Save Symbol Search List
5021 ~  ~ Save Package Search List
5022 ~  ~ Save Padstack Search List
5023 ~  ~ Select Package Type
5024 ~  ~ Package(s) Selected
5025 ~  ~ Select Padstack Type
5026 ~  ~ Select Padstack Shape
5027 ~  ~ Padstack(s) Selected
5028 ~  ~ Select Manufacturer Type
5029 ~  ~ Select Technology Type
5030 ~  ~ Select Part Type
5031 ~  ~ Select Simulation function
5032 ~  ~ Select EDSpice Element code
5033 ~  ~ Select EDSpice SubCircuit
5034 ~  ~ Select EDSpice Variant
5035 ~  ~ Part(s) Selected
5036 ~  ~ Select Symbol Type
5037 ~  ~ Select Location of Library files
5038 ~  ~ Enter Search Options
5039 ~  ~ Library Browser Options...
5040 ~  ~ Package Registered Types
5041 ~  ~ Padstack Registered Types
5042 ~  ~ Part Registered Types
5043 ~  ~ Library Search Sequence
5044 ~  ~ Symbol Registered Types
5045 ~  ~ EDSpice Element Code
5046 ~  ~ EDSpice Subcircuit
5047 ~  ~ &UnSelect All
5048 ~  ~ Select Display Settings
5049 ~  ~ Permanently Delete Selected Padstack(s)?
5050 ~  ~ Symbol(s) Selected
5051 ~  ~ Name Field Empty
5052 ~  ~ Selected Part Used in Project
5053 ~  ~ Deleting this Part will cause NetList corruption
5054 ~  ~ Selected Symbol Used in Project
5055 ~  ~ Deleting this Symbol will cause NetList corruption
5056 ~  ~ Selected Package Used in Project
5057 ~  ~ Deleting this Package will cause NetList corruption
5058 ~  ~ Can't Read Browser Profile
5059 ~  ~ Can't rename Symbol/Package:
5060 ~  ~ Library Browser Options Error
5061 ~  ~ F&ind Now
5062 ~  ~ All Conditions
5063 ~  ~ Ne&w Search
5064 ~  ~ Find in Lis&t
5065 ~  ~ &Edit New
5066 ~  ~ &Explorer
5067 ~  ~ &Change Lib Path
5068 ~  ~ Register
5069 ~  ~ Part Types
5070 ~  ~ Symbol Types
5071 ~  ~ Package Types
5072 ~  ~ Padstack Types
5073 ~  ~ &Search Sequence
5074 ~  ~ Always On &Top
5075 ~  ~  - Library Browser
5076 ~  ~ Library Explorer
5077 ~  ~ Are you sure you want to remove the library file
5078 ~  ~ and all it's contents
5079 ~  ~ Confirm Libary Delete
5080 ~  ~ Library Explorer Options...
5081 ~  ~ Objects(s) Selected
5082 ~  ~  - Library Explorer
5083 ~  ~ Numeric search
5084 ~  ~ Source library not found:
5085 ~  ~  Part Alias(s) found
5086 ~  ~ Symbol/Package Preview
5087 ~  ~ &Edit Symbol
5088 ~  ~ &Edit Package
5089 ~  ~ &Edit Padstack
5090 ~  ~ Library Browser :
5091 ~  ~ [ALL LIBRARIES]
5092 ~  ~ Library Explorer :
5093 ~  ~ All Pages...
5094 ~  ~ Can't find Symbol in the search sequence:
5095 ~  ~ Can't find Package in the search sequence: 
5096 ~  ~ Can't find Padstack in the search sequence:
5097 ~  ~ Keep Preview on top
5098 ~  ~ Disk Library
5099 ~  ~ Part Libraries found

50100 ~ ~ Symbol Libraries found 
50101 ~ ~ Package Libraries found 
50102 ~ ~ Padstack Libraries found

#FILE = E2KSBMPE.EXE  'EDWin 2000 Model parameter library Editor'

511 ~  ~ Model Templates
512 ~  ~ Character
513 ~  ~ Model Name
514 ~  ~ FALSE
515 ~  ~ ON
516 ~  ~ OFF
517 ~  ~ Parameter
518 ~  ~ Lib Id.
519 ~  ~ .MODEL line
5110 ~  ~ Save Library
5111 ~  ~ Model Exists
5112 ~  ~ in lib:
5113 ~  ~ Saving Model
5114 ~  ~ Open Netlist File
5115 ~  ~ Open Library
5116 ~  ~ Opening Library
5117 ~  ~ Deleting Model
5118 ~  ~ Delete Warning
5119 ~  ~ Searching Model
5120 ~  ~ Recreating Model Library Index
5121 ~  ~ Choose &Folder
5122 ~  ~ Open Model Parameters Library
5123 ~  ~ Load Model Templates
5124 ~  ~ Extract From Netlist
5125 ~  ~ Save Model
5126 ~  ~ &Find
5127 ~  ~ Recreate Model Parameters Library Index
5128 ~  ~ Create Subcircuit Index
5129 ~  ~ Model Parameter Library Editor
5130 ~  ~ File
5131 ~  ~ Invalide File!
5132 ~  ~ Delete Model

#FILE = E2KPRNMG.EXE  'EDWin 2000 Print Manager'

521 ~  ~ Print queue
522 ~  ~ Print page
523 ~  ~ Remove page from queue
524 ~  ~ Print layer
525 ~  ~ Print queue
526 ~  ~ Remove layer from queue
527 ~  ~ Print artwork layer
528 ~  ~ Remove artwork layer from queue
529 ~  ~ Add page to queue
5210 ~  ~ Add layer to queue
5211 ~  ~ Add artwork layer to queue
5212 ~  ~ Print PCB [ Selected layout and artworks ]
5213 ~  ~ Add all pages to queue
5214 ~  ~ Print selected pages from circuit
5215 ~  ~ Print selected layers from circuit
5216 ~  ~ Print selected artwork layers from circuit
5217 ~  ~ Print Circuit
5218 ~  ~ Print projects [ All circuits ]
5219 ~  ~ Project
5220 ~  ~ Layout/Notes/Dimensions
5221 ~  ~ Templates
5222 ~  ~ CircuitName
5223 ~  ~ Landscape
5224 ~  ~ Portrait
5225 ~  ~ Pnotes
5226 ~  ~ Dnotes
5227 ~  ~ Monocolor
5228 ~  ~ Copper plane
5229 ~  ~ Ref. nets
5230 ~  ~ Hole sizes
5231 ~  ~ Printing Layout
5232 ~  ~ Print Manager
5233 ~  ~ Printing Artworks
5234 ~  ~ Printing Gerber View
5235 ~  ~ Printing Schematic page
5236 ~  ~ Gerber Details
5237 ~  ~ Print Gerberview
5238 ~  ~ Select artwork file [ *.art ] :-
5239 ~  ~ Print layers overlapped
5240 ~  ~ Gerber View: 
5241 ~  ~  - File name: 
5242 ~  ~ ( Template )
5243 ~  ~ Preview (
5244 ~  ~ Artwork file created by preprocessing .GBR file
5245~  ~ Would you like to print the added layers overlapped
5246 ~  ~ Merge Layers
5247 ~  ~ Views
5248 ~  ~ &Printer
5249 ~  ~ &Document
5250 ~  ~ Print &All
5251 ~  ~ Print&er Setup
5252 ~  ~Pa&ge Setup
5253 ~  ~ &Print now ...
5254 ~  ~ Show Document Pre&view
5255 ~  ~ A&dd to Queue
5256 ~  ~ Printing in progress ...
5257 ~  ~ Time elapsed :
5258 ~  ~ Now printing:
5259 ~  ~ Please wait while the print job(s) executes ...
5260 ~  ~ Print Manager Options
5261 ~  ~ Printer not installed
5262 ~  ~ &Remove from Queue
5263 ~  ~ &Remove from Q after printing
5264 ~  ~ &Invert Selection
5265 ~  ~ Tool&bar
5266 ~  ~ &Status Bar
5267 ~  ~ &Filter Print Queue
5268 ~  ~ Lar&ge Icons
5269 ~  ~ selected document(s)
5270 ~  ~ Printer Settings:
5271 ~  ~ Browse printer...
5272 ~  ~ * Orientation
5273 ~  ~  * paper size
5274 ~  ~ * Margins
5275 ~  ~      - Left
5276 ~  ~      - Top
5277 ~  ~      - Right
5278 ~  ~      - Bottom
5279 ~  ~ Air Gap         
5280 ~  ~ print jobs(s) selected
5281 ~  ~ print jobs(s)
5282 ~  ~ Add file(s) from other directory ...
5283 ~  ~ Print all the documents added in the queue
5284 ~  ~ View the various display options
5285 ~  ~ Prints the selected documents in the queue
5286 ~  ~ Sets the page size and margins
5287 ~  ~ View the document Preview in a window
5288 ~  ~ Adds the selected documents to the queue
5289 ~  ~ Removes the selected documents from the queue
5290 ~  ~ Displays the property of the selected document
5291 ~  ~ Selects all documents from the list
5292 ~  ~ Layer(s)
5293 ~  ~ Gerber(s)
5294 ~  ~ Select Gerber View Files.
5295 ~  ~ Print all Pages from 1 to 
5296 ~  ~ Print Scale
5297 ~  ~ Print page : 1 using (default printer)
5298 ~  ~ Print page : 
5299 ~  ~ Print (w) Printer ....
52100 ~  ~ Printer Setup
52101 ~  ~ Page Setup
52102 ~  ~ Show single Page
52103 ~  ~ Show Multiple pages
52104 ~  ~ Fit graphic to one page with margins
52105 ~  ~ Print &All Pages
52106 ~  ~ Print all Pages from 1 to 10 using (default printer)
52107 ~  ~ Best Fit
52108 ~  ~ Show Correct Page Fit
52109 ~  ~ Fit to page w/o margins
52110 ~  ~ Centre image in 1x1 Pages
52111 ~  ~ &Update & Close
52112 ~  ~ F&irst Page
52113 ~  ~ P&revious Page
52114 ~  ~ N&ext Page
52115 ~  ~ L&ast Page
52116 ~  ~ M&ove to Page ...
52117 ~  ~ Show Background
52118 ~  ~ Show Multiple pages (
52119 ~  ~ Center line in
52120 ~  ~ Redrawing...
52121 ~  ~  Page : 
52122 ~  ~  Pages from  
52123 ~  ~   to 
52124 ~  ~ using (
52125 ~  ~ 
52126 ~  ~ Enter page to select (1 to 
52127 ~  ~      Page No             : 
52128 ~  ~  of 
52129 ~  ~ Project [ 
52130 ~  ~ Circuits[ 
52131 ~  ~ no(s) ]
52132 ~  ~ Circuit[ 
52133 ~  ~ PCB Layout
52134 ~  ~ Gerber view files [
52135 ~  ~ Keep Visible
52136 ~  ~     Job Name           : 
52137 ~  ~     Document Type  : 
52138 ~  ~     Parent                 : 
52139 ~  ~ Printing on (
52140 ~  ~ Printer
52141 ~  ~ (NONE)
52142 ~  ~ Used
52143 ~  ~ Layer Order
52144 ~  ~ Artwork Layer Name
52145 ~  ~ MMSimCode
52146 ~  ~ Eds ElementCode
52147 ~  ~ Print All
52148 ~  ~ Print selected document
52149 ~  ~ Job Name
52150 ~  ~ Parent
52151 ~  ~ Paper size
52152 ~  ~ Queued
52153 ~  ~ {Fit}
52154 ~  ~ to 
52155 ~  ~ Start Printing Page Failed
52156 ~  ~ Start Spooling Document Failed
52157 ~  ~ Item Frames
52158 ~  ~ Trace Frames
52159 ~  ~ Trace XOR Display

#FILE = E2KDBCHK.EXE  'EDWin 2000 Project Integrity check tool'

531 ~  ~ Can't read referenced Package [
532 ~  ~ Cant't read referenced Part [
533 ~  ~ Bit Values
534 ~  ~ Status Set to
535 ~  ~ Bend Point ID[
536 ~  ~ Can't read Bendpoint
537 ~  ~ Bendpoint used in more than one Net [
538 ~  ~ Reference count in Bendpoint/actual usage differs [
539 ~  ~ Unused Bend Point ID[
5310 ~  ~ Net Wire
5311 ~  ~ Wire net not found
5312 ~  ~ Bus Wire
5313 ~  ~ Wire Bus not found
5314 ~  ~ reference to not existing node
5315 ~  ~ reference to unreadable node
5316 ~  ~ reference to not existing component
5317 ~  ~ reference to not existing entry
5318 ~  ~ reference to not existing junction point
5319 ~  ~ Branch net/Junction net differs
5320 ~  ~ No backreference to net in Junction record ID[
5321 ~  ~ Can't read Branch. ID[
5322 ~  ~ Bus member Net. ID[
5323 ~  ~ Repeating Bus members
5324 ~  ~ Can't read Bus Member Net. ID[
5325 ~  ~ Can't read Bus. ID[
5326 ~  ~ Can't Read Junction
5327 ~  ~ Junction ID[
5328 ~  ~ Junction used in more then one Net [
5329 ~  ~ Reference count in Junction/actual usage differs [
5330 ~  ~ Unused Junction ID[
5331 ~  ~ Can't read Layout Component ID[
5332 ~  ~ Package Names Part/Lib don't match:
5333 ~  ~ Too many groups [
5334 ~  ~ Comp. Part ID [
5335 ~  ~ Sch.Comp
5336 ~  ~ back references Lay. Comp [
5337 ~  ~ Cant't read referenced Sch. Comp [
5338 ~  ~ Set as busmemeber - can't find Bus
5339 ~  ~ Can't read Net. ID[
5340 ~  ~ Can't read entry
5341 ~  ~ Duplicated Sch. Node
5342 ~  ~ Can't find Schematic Component
5343 ~  ~ Duplicated Lay.Node
5344 ~  ~ Can't find Layout Component
5345 ~  ~ Can't read node
5346 ~  ~ Empty Node
5347 ~  ~ Can't Read Part: ID[
5348 ~  ~ Package name prefix undefined
5349 ~  ~ Can't read Package
5350 ~  ~ cannot read supply pin ID [
5351 ~  ~ supply pin number > number of pins in package [
5352 ~  ~ Can't read Symbol
5353 ~  ~ entry number in the symbol doesn't match number of pins in group[
5354 ~  ~ Pin Number < 0 in Group
5355 ~  ~ Pin Number > Package entries in group
5356 ~  ~ cannot find pinname [
5357 ~  ~ ] in symbol
5358 ~  ~ Repeating Pin names
5359 ~  ~ Schematic Entries > Layout Pins [
5360 ~  ~ Can't read Schematic Component ID[
5361 ~  ~ Symbols in [Sch. Comp/Sch. Comp. Group] differs [
5362 ~  ~ Can't read Group [
5363 ~  ~ Part ref. in [Sch./Lay.] Components differ [
5364 ~  ~ Sch. Comp. < 1 in Lay. Comp
5365 ~  ~ Sch. Comps. in Lay. Comp.
5366 ~  ~ > Groups in Part [
5367 ~  ~ Net Trace
5368 ~  ~ Trace net not found
5369 ~  ~ Trace Record(
5370 ~  ~ ) reference to not existing node
5371 ~  ~ ) reference to unreadable node
5372 ~  ~ ) reference to not existing component
5373 ~  ~ ) reference to not existing pin
5374 ~  ~ ) reference to not existing via
5375 ~  ~ ) reference to not existing bend point
5376 ~  ~ ) layer change on SMD type node
5377 ~  ~ ) layer change on bend point
5378 ~  ~ Trace net/Via net differs
5379 ~  ~ No backreference to net in Via record ID[
5380 ~  ~ Trace net/Bendpoint net differs
5381 ~  ~ No backreference to net in Bendpoint record ID[
5382 ~  ~ Can't read Via
5383 ~  ~ Can't read Via Padstack ID[
5384 ~  ~ Via Padstack without centre hole
5385 ~  ~ Via used in more than one Net [
5386 ~  ~ Reference count in Junction/actual usage differs [
5387 ~  ~ Unused Via ID[
5388 ~  ~ Simname not found in MM model
5389 ~  ~ Repeating Entry names
5390 ~  ~ Repeating Entry Sim. Name
5391 ~  ~ Can't read Entry ID[
5392 ~  ~ Can't Read Padstack
5393 ~  ~ Can't read Symbol ID[
5394 ~  ~ Can't read Padstack ID[
5395 ~  ~ Padstack ID < 1 [
5396 ~  ~ Can't read Pad
5397 ~  ~ (Sim. Code
5398 ~  ~ Mismatch: [Sch. Entries/Sim. Primitive Pins] [
5399 ~  ~ Can't find Simulation Primitive Code[
53100 ~  ~ Via Padstacks
53101 ~  ~ Branches
53102 ~  ~ Junctions
53103 ~  ~ Bend Points
53104 ~  ~ Checking Project
53105 ~  ~ No Project Loaded
53106 ~  ~ Checking Symbols
53107 ~  ~ Checking Packages
53108 ~  ~ Checking Via Padstacks
53109 ~  ~ Checking Parts
53110 ~  ~ Checking Hierarchies
53111 ~  ~ Checking Files
53112 ~  ~ Done Project
53113 ~  ~ exists more than once
53114 ~  ~ from Group
53115 ~  ~ not found in referenced Part
53116 ~  ~ not found in Layout Component
53117 ~  ~ Project Integrity Checking Tool
53118 ~  ~ C&heck
53119 ~  ~ Project Integrity Check Setup
53120 ~  ~ Show all Errors
53121 ~  ~ Hide Mask Errors
53122 ~  ~ Hide other Errors

#FILE = E2KLOMED.EXE  'EDWin 2000 List of Material Editor'

541 ~  ~ Making LOM file...
542 ~  ~ Click &Next to create the List of Materials
543 ~  ~ from EID file :
544 ~  ~ and Project :
545 ~  ~ To LOM file :
546 ~  ~ Is it okay to use the end of database as end condition?
547 ~  ~ Specified End condition cannot be found in the database!
548 ~  ~ Specified Start condition cannot be found in the database!
549 ~  ~ Set options for delete record operation
5410 ~  ~ Set options for export to file operation
5411 ~  ~ Set options for import from file operation
5412~  ~ Database creation error :
5413 ~  ~ You have selected mass update with Overwrite Identical EICs option
5414 ~  ~ This may result in existing data getting updated with New data
5415 ~  ~ Are you sure to continue?
5416 ~  ~ Invalid Field Size (Range : 1 to 255)!
5417 ~  ~ Duplicate Field Name!
5418 ~  ~ Spaces not allowed in Field Name!
5419 ~  ~ EID Edit View
5420 ~  ~ Associate EID
5421 ~  ~ Database Search Result for EID file :
5422 ~  ~ Would you like to update the changes made to the project library?
5423 ~  ~ External Info Database Editor : EID Edit View
5424 ~  ~ External Info Database Editor : Associate Database
5425 ~  ~ Part-P
5426 ~  ~ Part Full Name-P
5427 ~  ~ External Index Code-P
5428 ~  ~ Simulation Reference-P
5429 ~  ~ Click &Next to :
5430 ~  ~ Delete all the records in the specified range
5431 ~  ~ Export data from
5432 ~  ~ Import data from
5433 ~  ~ Fields missing
5434 ~  ~ String length higher than field Size
5435 ~  ~ Index field not proper
5436 ~  ~ duplicate index found
5437 ~  ~ Deleting ...
5438 ~  ~ Exporting ...
5439 ~  ~ Importing ...
5440 ~  ~ Edit EID file :
5441 ~  ~ Package-P
5442 ~  ~ Component Name-P
5443 ~  ~ Component Description-P
5444 ~  ~ Component Value-P
5445 ~  ~ Creating Temp. Def ...
5446 ~  ~ Preview of List of Materials :
5447 ~  ~ Unable to display Preview
5448 ~  ~ Give the Value for field : [
5449 ~  ~ Specified value :
5450 ~  ~ , exists in database. Enter a unique value to add a new record
5451 ~  ~ Specified EIC not found in the EID file. Continue Updating the Project Library with the Specified EIC :
5452 ~  ~ Are you sure to delete the selected record?
5453 ~  ~ Updating Project Library...
5454 ~  ~ Project View
5455 ~  ~ EID View
5456 ~  ~ Browse
5457 ~  ~ Cannot identify database format!
5458 ~  ~ Edit Records
5459 ~  ~ Current EIC field:
5460 ~  ~ Record Position
5461 ~  ~ EID File
5462 ~  ~ Sort by
5463 ~  ~ Filter EID with
5464 ~  ~ EID database name:
5465 ~  ~ Automatic mode
5466 ~  ~ Manual mode
5467 ~  ~ &Associate
5468 ~  ~ Filter EID file where
5469 ~  ~ Update Proj. Lib
5470 ~  ~ Project library
5471 ~  ~ Filter project library with
5472 ~  ~ &Show Tool Box
5473 ~  ~ Click to Show the Control Tool Box...
5474 ~  ~ List of Materials - Preview (Click column headers to sort with that field...)
5475 ~  ~ &Show
5476 ~  ~ External Info Database (EID) File Wizard
5477 ~  ~ << &Back
5478 ~  ~ &Next >>
5479 ~  ~ Select data from a specified range
5480 ~  ~ Step 2 of 3
5481 ~  ~ Trim data to fit the field size
5482 ~  ~ Save identical EICs to a log file...
5483 ~  ~ Overwrite duplicate EICs with new data
5484 ~  ~ Delimiter used in text file
5485 ~  ~ Set options for delete all record operation
5486 ~  ~ EID Name:
5487 ~  ~ Operation selected:
5488 ~  ~ Import to EID file from text file
5489 ~  ~ Export to text file from EID file
5490 ~  ~ Remove data from EID file
5491 ~  ~ Step 1 of 3
5492 ~  ~ Import from file
5493 ~  ~ Export to file:
5494 ~  ~ EID file Name:
5495 ~  ~ The options below allows to import/ export/ remove data from an EID file. Select the required option and follow the steps
5496 ~  ~ EID file operations"
5497 ~  ~ Edit existing '.EID' file
5498 ~  ~ Create &new '.EID' file
5499 ~  ~ Create/ Edit EID file :
54100 ~  ~ &Open file for editing after creation
54101 ~  ~ Select EIC field:
54102 ~  ~ Select the field to use as EIC for the current EID file
54103 ~  ~ Step 2 of 2
54104 ~  ~ Field size
54105 ~  ~ Provide field names for the '.EID' file
54106 ~  ~ Select field names and sizes:
54107 ~  ~ Step 1 of 2
54108 ~  ~ Step 3 of 3
54109 ~  ~ The wizard now has all the required information
54110 ~  ~ List of Material Wizard
54111 ~  ~ &Show Preview
54112 ~  ~ Use the &Show Preview button to view the List of Materials created
54113 ~  ~ Click &Next to create List of Materials
54114 ~  ~ Current Project:
54115 ~  ~ EID File:
54116 ~  ~ List of Material Editor
54117 ~  ~ Delimiter to Use:
54118 ~  ~ Save LOM As:
54119 ~  ~ Sort with Field:
54120 ~  ~ Select field names and sort field:
54121 ~  ~ Select the required items to be added in List of Materials
54122 ~  ~ Available Fields
54123 ~  ~ Create List of Material
54124 ~  ~ EID File editor and Associate
54125 ~  ~ Create External Info Database file
54126 ~  ~ Click &Show to enter create/ edit EID...
54127 ~  ~ Select the option you would like to operate on:
54128 ~  ~ Sort by:
54129 ~  ~ End Value:
54130 ~  ~ Start Value:
54131 ~  ~ Import from file:
54132 ~  ~ EID file operations
54133 ~  ~ Using EID File Editor, you may create a new '.EID' file or edit an existing '.EID' file. Select the required operation and follow the steps.
54134 ~  ~ Click &Next to finish current operation and start creating the '.EID' file. Leave the below option checked to open the file for editing after creation
54135 ~  ~ Field size:
54136 ~  ~ Click &Next to
54137 ~  ~ Using List of Material wizard, you may create a list by selecting the required fields from the EID file and the Project database. Select an EID file for use with the current project and click &Next to continue.
54138 ~  ~ &With External Info Database

#FILE = E2KFLDED.EXE  'EDWin 2000 Field editor'

551  ~  ~ Seq
552  ~  ~ Files Name
553  ~  ~ Completed Creating Part(s)
554  ~  ~ Not Loaded
555  ~  ~ P&ackages
556  ~  ~ Pa&dstack
557  ~  ~ Symbols Libraries
558  ~  ~ Package Library
559  ~  ~ &Thermal
5510 ~  ~ Padstack Libraries
5511 ~  ~ Thermal Library
5512 ~  ~ Not in Project Library
5513 ~  ~ Full Name
5514 ~  ~ Simref
5515 ~  ~ Package Type
5516 ~  ~ SimCode
5517 ~  ~ Minimal power dissipation in W
5518 ~  ~ Maximal power dissipation in W
5519 ~  ~ Junction-Case thermal resistance in °C/W
5520 ~  ~ Case-Air thermal resistance in °C/W
5521 ~  ~ Error in Format
5522 ~  ~ Components Field Editor
5523 ~  ~ Symbol Library
5524 ~  ~ Set Path
5525 ~  ~ Update Part
5526 ~  ~ Import List
5527 ~  ~ Read System Values
5528 ~  ~ Update Symbol
5529 ~  ~ Create Symbol Part
5530 ~  ~ Update Package
5531 ~  ~ Create Package Part
5532 ~  ~ Update Padstack
5533 ~  ~ Update Thermal Values
5534 ~  ~ All To Project Library
5535 ~  ~ Selected To Project Library
5536 ~  ~ For All
5537 ~  ~ For Selected
5538 ~  ~ Completed Loading ...
5539 ~  ~ Loading Thermal Info...
5540 ~  ~ Loading Padstack...
5541 ~  ~ Loading Packages...
5542 ~  ~ Loading Symbols...
5543 ~  ~ Completed Saving...
5544 ~  ~ Saving
5545 ~  ~ Importing...
5546 ~  ~ Completed Importing
5547 ~  ~ Completed Exporting
5548 ~  ~ Creating
5549 ~  ~ Row
5550 ~  ~ Col
5551 ~  ~ Part is not packed
5552 ~  ~ Can't Update System Library
5553 ~  ~ Not found in
5554 ~  ~ Symbol Not saved
5555 ~  ~ Part Not saved
5556 ~  ~ Not found in specified file
5557 ~  ~ Part List Files
5558 ~  ~ Select Part List File
5559 ~  ~ Symbol List Files
5560 ~  ~ Select Symbol List
5561 ~  ~ Package List Files
5562 ~  ~ Select Package List
5563 ~  ~ Padstack List Files
5564 ~  ~ Select Padstack List
5565 ~  ~ Thermal Data Files
5566 ~  ~ Select Thermal Data File
5567 ~  ~ Part files
5568 ~  ~ Symbol Files
5569 ~  ~ Package Files
5570 ~  ~ Padstack Files
5571 ~  ~ Save Padstack
5572 ~  ~ Save Thermal Values
5573 ~  ~ Save Part List
5574 ~  ~ Save Symbol List
5575 ~  ~ Save Package List
5576 ~  ~ Save Padstack List
5577 ~  ~ Save Thermal Data File
5578 ~  ~ View Package Name Reference
5579 ~  ~ Get EDWin 2000 Convention Package Name
5580 ~  ~ Does not have equivalent Package Name, not Saved
5581 ~  ~ Following are not  Standard Packages
5582 ~  ~ Note
5583 ~  ~ Convention-Package Name
5584 ~  ~ EDWin Old Convention-Name
5585 ~  ~ Convention-Package Name
5586 ~  ~ Get
5587 ~  ~ Library Field Editor
5588 ~  ~ Following are not
5589 ~  ~ Standard Packages
5590 ~  ~ Get New Convention-Package Name

#FILE = E2Kieman.dll  'EDWin 2000 Import Export Manager'

561 ~  ~ Import Export Manager
562 ~  ~ &Hierarchy level
563 ~  ~ &Open file after export
564 ~  ~ Select F&ormat
565 ~  ~ Export Settings
566 ~  ~ Packa&ge dict.
567 ~  ~ &Dictionary File
568 ~  ~ &Export to File
569 ~  ~ &Export
5610 ~  ~ Import Settings
5611 ~  ~ Wirelist &Append Mode
5612 ~  ~ Give dictionary name before importing.
5613 ~  ~ Dictionary not found. Give proper dictionary name before importing.
5614 ~  ~ Dictionary error
5615 ~  ~ Give import filename before continuing.
5616 ~  ~ Give filename.
5617 ~  ~ Project succesfully imported from the schematic wirelist file :
5618 ~  ~ Schematic Wirelist Imported
5619 ~  ~ Import from schematic wirelist file :
5620 ~  ~ Project succesfully imported from the Orcad PCB II file : 
5621 ~  ~ Orcad PCB II Imported
5622 ~  ~ Import from Orcad PCB II file : 
5623 ~  ~ failed.
5624 ~  ~ Project succesfully imported from the EED III file :
5625 ~  ~ EED III Imported
5626 ~  ~ Import from EED III file :
5627 ~  ~ Orcad PCB II Import Failed
5628 ~  ~ EED III Import failed
5629 ~  ~ Give dictionary name before exporting.
5630 ~  ~ Dictionary not found. Give proper dictionary name before exporting.
5631 ~  ~ Give export filename before continuing.
5632 ~  ~ Are you sure to overwrite the exisiting file :
5633 ~  ~ Overwrite file
5634 ~  ~ Project succesfully exported to the Edif file : 
5635 ~  ~ Edif Exported
5636 ~  ~ Edif Export failed
5637 ~  ~ Export to Edif file :
5638 ~  ~ Give filename.
5639 ~  ~ Are you sure to overwrite the exisiting file :
5640 ~  ~ Overwrite file
5641 ~  ~ Project succesfully exported to the Scicard Netlist file :
5642 ~  ~ Scicard Netlist Exported
5643 ~  ~ Export to Scicard Netlist file : 
5644 ~  ~ Scicard Netlist Exported
5645 ~  ~ Scicard Netlist Export failed
5646 ~  ~ Give dictionary name before exporting.
5647 ~  ~ Project succesfully exported to the OrCad Netlist file : 
5648 ~  ~ OrCad Netlist Exported
5649 ~  ~ Export to OrCad Netlist file : 
5650 ~  ~ OrCad Netlist Export failed
5651 ~  ~ Project succesfully exported to the EEDIII Netlist file : 
5652 ~  ~ EEDIII Netlist Exported
5653 ~  ~ Export to EEDIII Netlist file :
5654 ~  ~ EEDIII Netlist Export failed
5655 ~  ~ Project succesfully exported to the schematic wirelist file : 
5656 ~  ~ Schematic Wirelist Exported
5657 ~  ~ Export to schematic wirelist file : 
5658 ~  ~ Schematic Wirelist Export failed
5659 ~  ~  Import Export Manager
5660 ~  ~ Give
5661 ~  ~ filename.
5662 ~  ~ No extra parameters ...
5663 ~  ~ &Net List only
5664 ~  ~ &Whole Schematic with graphics
5665 ~  ~ &Export Project
5666 ~  ~ &Import Project
5667 ~  ~ Netlist/Wirelist Export&Import
5668 ~  ~ VHDL library folder
5669 ~  ~ Edit Include string
5670 ~  ~ Export parameter
5671 ~  ~ Import parameter
5672 ~  ~ Format
5673 ~  ~ Export option
5674 ~  ~ Import option
5675 ~  ~ File name
5676 ~  ~ Use part dictionary
5677 ~  ~ Part dictionary name
5678 ~  ~ Use symbol/package dictionary
5679 ~  ~ Symbol/package dictionary name
5680 ~  ~ Path to library
5681 ~  ~ Include string
5682 ~  ~ View output file
5683 ~  ~ View input file
5684 ~  ~ Give VHDL library path before continuing.
5685 ~  ~ Compiled without errors
5686 ~  ~ Compiled with warnings
5687 ~  ~ VHDL Compiler
5688 ~  ~  PCB Wirelist
5689 ~  ~ Standard view
5690 ~  ~ Document view
5691 ~  ~  Schematic Netlist
5692 ~  ~ EDIF V2.0 Schematics
5693 ~  ~ Schematic Netlist only
5694 ~  ~ Schematic Diagram and Netlist
5695 ~  ~ VHDL (Compile&Import)
5696 ~  ~ Ignore warnings and import
5697 ~  ~ Treat warnings as errors
5698 ~  ~ export to file
5699 ~  ~ import from file
56100 ~  ~ Select part dictionary
56101 ~  ~ Select symbol/package dictionary
56102 ~  ~ Exporting
56103 ~  ~ Importing
56104 ~  ~ New wirelist
56105 ~  ~ Append wirelist
56106 ~  ~ &Converters
56107 ~  ~ Converted with no errors
56108 ~  ~ Converted with warnings
56109 ~  ~ CUPL Netlist
56110 ~  ~ Xilinx Netlist
56111 ~  ~ Converter parameter
56112 ~  ~ Export format
56113 ~  ~ Converter option
56114 ~  ~ Conversion format
56115 ~  ~ Input File name
56116 ~  ~ Output File name
56117 ~  ~ Insert I/O Buffers
56118 ~  ~  Schematic Netlist to CUPL Netlist
56119 ~  ~  Schematic Netlist to Xilinx Netlist
56120 ~  ~ Input file
56121 ~  ~ Converting...
56122 ~  ~ Illegal argument while calling the VhdlCompiler_Compile exportable function
56123 ~  ~ There are errors in the VHDL file
56124 ~  ~ Compiled with no errors
56125 ~  ~ There are warnings in the VHDL file
56126 ~  ~ Temporary Schematic Netlist file:
56127 ~  ~ Illegal argument while calling the XilinxConverter_Convert exportable function
56128 ~  ~ There are errors in the Schematic Netlist file
56129 ~  ~ There are warnings in the Schematic Netlist file
56130 ~  ~ Give input filename before continuing.
56131 ~  ~ Give output filename before continuing.
56132 ~  ~ Give output filename before exporting.
56133 ~  ~ Menu No: exceeds 11
56134 ~  ~ SubMenu No. exceeds 100
56135 ~  ~ Tool No: exceeds 11
56136 ~  ~ SubTool No: exceeds 11
56137 ~  ~ PCB Wirelist Files
56138 ~  ~ Schematic Netlist Files
56139 ~  ~ VHDL files
56140 ~  ~ Give map output filename before continuing
56141 ~  ~ PAL Netlist
56142 ~  ~ Map Output File name
56143 ~  ~ EDIF Schematic Files
56144 ~  ~ OrCad PCB II Files
56145 ~  ~ Scicards Schematic Netlist Files
56146 ~  ~ CUPL Netlist Files
56147 ~  ~ Xilinx Netlist Files
56148 ~  ~ JEDEC Netlist
56149 ~  ~ JEDEC Netlist Files
56150 ~  ~ Map Files
56151 ~  ~ CUPL Netlist to JEDEC Netlist
56152 ~  ~ Main before you run EED3 to
56153 ~  ~ conversion
56154 ~  ~ There are errors in the CUPL Netlist file
56155 ~  ~ The circuit could not be mapped to the target device
56156 ~  ~ Could not build JEDEC file

56157 ~  ~ Give library mapping filename before continuing.
56158 ~  ~ ALTERA EDF
56159 ~  ~ Library Mapping File name
56160 ~  ~ Mapping File name
56161 ~  ~ ALTERA EDF Files
56162 ~  ~ Library Mapping Files
56163 ~  ~ Schematic Netlist to ALTERA EDF
56164 ~  ~ ALTERA EDF to
56165 ~	 ~ Scicards Schematic Netlist
56166 ~  ~ Project succesfully exported to the RINF netlist file:
56167 ~  ~ Export to RINF netlist file:
56168 ~  ~ RINF Netlist
56169 ~  ~ RINF Netlist Files


#FILE = DOCONE.EXE 'DOCONE

571	 ~  ~ 	Confirm CleanUp Of CD Image Documents
572	 ~  ~ 	Generate CD-Rom Image
573	 ~  ~ 	Web
574	 ~  ~ 	Product ID
575	 ~  ~ 	Copy ID
576	 ~  ~ 	Input DocOne Password
577	 ~  ~ 	DocOne Generating CD Image...
578	 ~  ~ 	Add Document
579	 ~  ~ 	View Document
5710	 ~  ~ 	Delete Document
5711	 ~  ~ 	Find in PCB
5712	 ~  ~ 	Find in Schematic
5713	 ~  ~ 	View Component
5714	 ~  ~ 	Add Artwork
5715	 ~  ~ 	View Artwork
5716	 ~  ~ 	Delete Artwork
5717	 ~  ~ 	Document
5718	 ~  ~ 	Artworks
5719	 ~  ~ 	Delete Document :
5720	 ~  ~ 	Document Explorer
5721	 ~  ~ 	Boards
5722	 ~  ~ 	TestPoints
5723	 ~  ~ 	CD-Rom Image Project Files
5724	 ~  ~ 	CD-Rom Image Info Files
5725	 ~  ~ You have -
5726	 ~  ~  -Licenses left
5727	 ~  ~ License updation Completed
5728	 ~  ~ Refill License Updation Completed
5729	 ~  ~ Licenses Not Updated Properly
5730	 ~  ~ Refill License Not Updated Properly
5731	 ~  ~ CD Image Generation Completed
5732	 ~  ~ DocOne Generating CD Image Completed
5733	 ~  ~ Unlimited
5734	 ~  ~ Error while generating CD Image
5735	 ~  ~ CD Image generation terminated by user
5736	 ~  ~ Error updating your License
5737	 ~  ~ Password Not Valid
5738	 ~  ~ Get New Password From Distributor/Web
5739	 ~  ~ Viewer Type
5740	 ~  ~ Delete Selected Files?
5741	 ~  ~ Delete Message Box Cancelled
5742	 ~  ~ Doc-One
5743	 ~  ~  (Field Mode)
5744	 ~  ~  (Edit Mode)
5745	 ~  ~ Device
5746	 ~  ~ Access
5747	 ~  ~ Probe DX
5748	 ~  ~ Probe DY
5749	 ~  ~ No Access
5750	 ~  ~ No Prob
5751	 ~  ~ Prefered
5752	 ~  ~ Mandatory
5753	 ~  ~ Thru Hole
5754	 ~  ~ Surface
5755	 ~  ~ Comp Pin
5756	 ~  ~ To continue please enter the Password
5757	 ~  ~ File Name
5758	 ~  ~ Date Modified
5759	 ~  ~ Generating CD Image...
5760	 ~  ~ Select Language:
5761	 ~  ~ Get Refill Password
5762	 ~  ~ CD Image Refills:
5763	 ~  ~ Layout Component Details
5764	 ~  ~ Layout Component Viewer - 
5765	 ~  ~ Fit to window
5766	 ~  ~ Open Artwork...
5767	 ~  ~ Open Artwork File
5768	 ~  ~ Open Artwork File for display
5769	 ~  ~ Artwork Viewer
5770	 ~  ~ Schematic Node Missing
5771	 ~  ~ Hierarchial symbol
5772	 ~  ~ Invalid symbol name

#FILE = E2KMMGenM.DLL 'Simulation Model Generators'

581 ~  ~ MM Generator
582 ~  ~ Give function description before continuing.
583 ~  ~ Give function description.
584 ~  ~ Give Simulation Function before continuing.
585 ~  ~ Give Simulation Function.
586 ~  ~ Building Model, Please wait....
587 ~  ~ Model is constructed without errors
588 ~  ~ Model is constructed with warnings
589 ~  ~ MMM Builder 
5810 ~  ~ Do you want to delete all global parameters?
5811 ~  ~ Do you want to delete all parameters of this gate?
5812 ~  ~ VHDL Source path
5813 ~  ~ VHDL Source File name
5814 ~  ~ Netlist Source path
5815 ~  ~ Netlist Source File
5816 ~  ~ Output path
5817 ~  ~ Create DLL for the model
5818 ~  ~ Create part for the model
5819 ~  ~ Edit part after creation
5820 ~  ~ MM Simulation Function(15000 - 16000)
5821 ~  ~ MM Function description
5822 ~  ~ Wirelist save error
5823 ~  ~ Illegal argument while calling the MMModelGenerator_Generate exportable function
5824 ~  ~ There are errors in the WRS file
5825 ~  ~ Constructed with no errors
5826 ~  ~ There are warnings in the WRS file
5827 ~  ~ File access error
5828 ~  ~ Part 
5829 ~  ~ Could not create symbol
5830 ~  ~ Could not create entry
5831 ~  ~ Could not save symbol
5832 ~  ~ Could not save part
5833 ~  ~ Could not create part
5834 ~  ~ No pin(s) is defined. Could not create symbol/part
5835 ~  ~ No symbol/part name is defined. Could not create symbol/part
5836 ~  ~ No valid Simulation Function is found. Could not create symbol/part
5837 ~  ~ MM Model Generator
5838 ~  ~ Path to VHDL library
5839 ~  ~ Select Source Netlist file
5840 ~  ~ Select Source VHDL file
5841 ~  ~ Model Generator for Mixed Mode Simulator
5842 ~  ~ Model Generator
5843 ~  ~ Add global parameter
5844 ~  ~ Add gate parameter for: 
5845 ~  ~ Format: Name[,unit]
5846 ~  ~ MM Simulator Modules Library folder
5847 ~  ~ Folder to store generated Model Project
5848 ~  ~ Assign Simulation Function.
5849 ~  ~ MM Simulation Function.
5850 ~  ~ Simulation Function outside allowed range
5851 ~  ~ Simulation Function already assigned to
5852 ~  ~ Assign Function Description
5853 ~  ~ Model Project
5854 ~  ~ Gates Parameters
5855 ~  ~ Ignore warnings
5856 ~  ~ Transition
5857 ~  ~ Control Net
5858 ~  ~ Test Net
5859 ~  ~ Timing
5860 ~  ~ Set Global Parameter
5861 ~  ~ Add Parameter
5862 ~  ~ Apply to all gates of the same type
5863 ~  ~ Remove All Parameters
5864 ~  ~ Remove Parameter
5865 ~  ~ Select Test Nets:
5866 ~  ~ No valid Simulation Function is found. Could not create symbol/part
5867 ~  ~ EDS Model Generator
5868 ~  ~ EDS Builder
5869 ~  ~ The name of model can't begin with number
5870 ~  ~ EDS Model Name.
5871 ~  ~ Library path
5872 ~  ~ MM Simulation Function (16000 - 17000)
5873 ~  ~ Function description
5874 ~  ~ Part: 
5875 ~  ~ Symbol: 
5876 ~  ~ File
5877 ~  ~ Model Generator for EDSpice Simulator
5878 ~  ~ Assign Function Description.
5879 ~  ~ MM Function Description.
5880 ~  ~ EDS Generator

5881 ~  ~ Select ALTERA EDF Source file
5882 ~  ~ ALTERA EDF library folder
5883 ~  ~ ALTERA EDF Converter
5884 ~  ~ ALTERA EDF Source path
5885 ~  ~ ALTERA EDF Source File name
5886 ~  ~ Path to System library
5887 ~  ~ Import ALTERA EDF
5888 ~  ~ Illegal argument while calling the exportable function
5889 ~  ~ There are errors in the ALTERA EDF file
5890 ~  ~ There are warnings in the ALTERA EDF file 	
5891 ~  ~ Model
5892 ~  ~ currently in use by simulator
5893 ~  ~ Change Project Name
5894 ~  ~ Model currently in use
5895 ~  ~ Necessary Netlist file rename failed
5896 ~  ~ Changing Project Name
5897 ~  ~ Constructed with warnings
5898 ~  ~ Enter name of source (.sbc) file before continuing
5899 ~  ~ Converting Sub-circuit, Please wait....
58100 ~  ~ Model DLL source generated without errors
58101 ~  ~ Select Spice Sub-circuit Source file
58102 ~  ~ Source SPICE sub-circuit path
58103 ~  ~ Source SPICE sub-circuit file
58104 ~  ~ Sub-circuit I/O node
58105 ~  ~ Entry Sim. Name
58106 ~  ~ Model Project (Analog)
58107 ~  ~ Node map
58108 ~  ~ Illegal argument while calling the SpiceConverter_Convert exportable function
58109 ~  ~ There are errors in the SBC file
58110 ~  ~ DLL source generated with no errors
58111 ~  ~ DLL source generated with warnings
58112 ~  ~ Illegal argument while calling the DllMaker_Build exportable function
58113 ~  ~ There are errors in DLL source file
58114 ~  ~ Selected source file is not properly formated sub-circuit file
58115 ~  ~ Select model type


#FILE = EDWVHDL.EXE 'VHDL Editor'

591 ~  ~ Read &Only
592 ~  ~ BookMarks
593 ~  ~ BookMark
594 ~  ~ Goto Bookmark
595 ~  ~ More BookMarks
596 ~  ~ Toggle Bookmark
597 ~  ~ Next Bookmark
598 ~  ~ Previous Bookmark
599 ~  ~ Clear All Bookmarks
5910 ~  ~ Compile && &Import 
5911 ~  ~ Create MM Model
5912 ~  ~ Create XILINX Output
5913 ~  ~ Create CUPL Output
5914 ~  ~ Status Bar
5915 ~  ~ New Window
5916 ~  ~ Tile
5917 ~  ~  VHDL Editor
5918 ~  ~ &OutPut
5919 ~  ~ &Arrange Icons
5920 ~  ~ Find Previous
5921 ~  ~ Switch Off Compile Errors
5922 ~  ~ &Build
5923 ~  ~ &Compile
5924 ~  ~ Create EDSpice &Model
5925 ~  ~ Create &JEDEC Output
5926 ~  ~ Line : 
5927 ~  ~ Compiled with no errors; Generated :
5928 ~  ~ Exporting to 
5929 ~  ~ Exporting to  Mixed Mode Model Generator
5930 ~  ~ Exporting to  EDSpice Model Generator
5931 ~  ~ Exporting to  XILINX Converter
5932 ~  ~ Exporting to  CUPL Converter
5933 ~  ~ Exporting to  JEDEC Converter
5934 ~  ~ Compiled with warnings ; Generated : 
5935 ~  ~ Edit Include String
5936 ~  ~ Delete Selection
5937 ~  ~ Typing
5938 ~  ~ Backspace
5939 ~  ~ Indent
5940 ~  ~ Drag And Drop
5941 ~  ~ Auto Indent
5942 ~  ~ Match &whole word only
5943 ~  ~ Fi&nd what:
5944 ~  ~ &Up
5945 ~  ~ &Down
5946 ~  ~ &Selection
5947 ~  ~ Wh&ole file

#FILE = SIMWIN.TXT   'SIMWIN STRINGS'

601 ~    ~  * Overline
602 ~    ~  Customized Diagram settings
603 ~    ~  Not less than
604 ~    ~  Absolute width
605 ~    ~  Line Widths 
606 ~    ~  Page notes text 
607 ~    ~  Page notes graphics 
608 ~    ~  Design notes text 
609 ~    ~  Design notes graphics 
6010 ~    ~  Net/Bus labels 
6011 ~    ~  Incomplete Element Description	
6012 ~    ~  Element Incomplete	
6013 ~    ~  Suitable Symbol:	
6014 ~    ~  for Element :	
6015 ~    ~  incompatible with Element :	
6016 ~    ~  Can't find Element:	
6017 ~    ~  Element not found	
6018 ~    ~  Can't load Element:	
6019 ~    ~  T&utorial	
6020 ~    ~  On the Web	
6021 ~    ~  Select a group in Navigator	
6022 ~    ~  Element with Same Name already Exists with this group	
6023 ~    ~  Added Element:	
6024 ~    ~  Do you want to Restore Default Settings?	
6025 ~    ~  Restored Element Bin Default :	
6026 ~    ~  Select Item in Navigator to Delete	
6027 ~    ~  Deleted :	
6028 ~    ~  Added Group:	
6029 ~    ~  Group Name Already Exists,type another name	
6030 ~    ~  Quick Name Already Exists,type another name	
6031 ~    ~   in 	
6032 ~    ~  Model/SubCircuit	
6033 ~    ~  Simfunction	
6034 ~    ~  Enter Name/Description :	
6035 ~    ~  Character '|' Not Allowed for search :	
6036 ~    ~  Symbol -	
6037 ~    ~  Restored Element Bin :	
6038 ~    ~  Select Element from Library to Add	
6039 ~    ~  Element with Same Name already Exists with this group,Type Different Quick Name	
6040 ~    ~  Add Selected Element	
6041 ~    ~  Add/Create New Group of Element	
6042 ~    ~  Delete Selected Item in Navigator	
6043 ~    ~  Undo Editing and Reset	
6044 ~    ~  Accept changes and Exit	
6045 ~    ~  Cancel changes and Exit	
6046 ~    ~  Select Element to Add	
6047 ~    ~  Do you want to save Settings?	
6048 ~    ~  Hot Key	
6049 ~    ~  Save As PWL Source	
6050 ~    ~  Save As Digital Source	
6051 ~    ~  Save Output as PWL Source	
6052 ~    ~  Save Output as Digital Source	
6053 ~    ~  Add to Group ->	
6054 ~    ~  Net is already set to HIGH	
6055 ~    ~  Net is already set to LOW	
6056 ~    ~  Clock pattern not set...	
6057 ~    ~  Updating... Please wait...	
6058 ~    ~  Delete All Markers	
6059 ~    ~  Delete all Markers inside the Block	
6060 ~    ~  Spice Netlist Tag cannot be edited...	
6061 ~    ~  Instruments	
6062 ~    ~  Spice Component Tag cannot be edited...	
6063 ~    ~  Over line	
6064 ~    ~  Browser	
6065 ~    ~  On/Off Browser	
6066 ~    ~  Elements	
6067 ~    ~  Tools to work with Elements	
6068 ~    ~  Connections	
6069 ~    ~  Tools to work with Connections	
6070 ~    ~  Tools to work with Instruments	
6071 ~    ~  Block Edit	
6072 ~    ~  Notes & Graphics	
6073 ~    ~  &Edit Element	
6074 ~    ~  Can't read Element:	
6075 ~    ~  Can't assign loc:
6076 ~    ~  Spice Modelcode	
6077 ~    ~  Spice Library Subcircuits	
6078 ~    ~  Group Topology	
6079 ~    ~  Group components	
6080 ~    ~  connected to selected bus	
6081 ~    ~  No Busses on the page	
6082 ~    ~  connected to selected net	
6083 ~    ~  No Nets in the circuit	
6084 ~    ~  This mode requires all components to be placed in bins outside of the page.	
6085 ~    ~  Do you wish to continue?	
6086 ~    ~  Cannot preset GND Node!	
6087 ~    ~  Current Marker should be placed on Element Node	
6088 ~    ~  Preset high Logic State marker	
6089 ~    ~  Preset low Logic State marker	
6090 ~    ~  Preset Clock Generator marker	
6091 ~    ~  EDSpice Node Tag:	
6092 ~    ~  Enter Element name to create Circuit Element	
6093 ~    ~  Element Name, [X], [Y], [Rotation]	
6094 ~    ~  Missing group(s) in Element:	
6095 ~    ~  Can't read group in Element:	
6096 ~    ~  Can't read pin in Element:	
6097 ~    ~  'Component Groups Bin' not empty!	
6098 ~    ~  Clear bin or use 'Append to Group' option	
6099 ~    ~  Invalid clock pattern	
60100 ~    ~  First Letter of the clock pattern must be H / L / U / Z / {	
60101 ~    ~  Invalid letter found	
60102 ~    ~  .New Circuit File...	
60103 ~    ~  TODO: Write your code here...	
60104 ~    ~  New EDSpice Circuit File	
60105 ~    ~  Open EDSpice Circuit File	
60106 ~    ~  EDSpice Command Interpreter	
60107 ~    ~  Can't assign Element:	
60108 ~    ~  Element Description	
60109 ~    ~  Elements Information	
60110 ~    ~  Elements :	
60111 ~    ~  Delete all unused Elements	
60112 ~    ~  &Elements	
60113 ~    ~  Print with current page setup	
60114 ~    ~  Topological placement	
60115 ~    ~  Sequence	
60116 ~    ~  Pre-place at start	
60117 ~    ~  Autoplace remaining components	
60118 ~    ~  Component X clearance	
60119 ~    ~  Component Y clearance	
60120 ~    ~  both 'Input' and 'Output' side components	
60121 ~    ~  only 'Input' side components	
60122 ~    ~  only 'Output' side components	
60123 ~    ~  using 'Input' side component as hubs	
60124 ~    ~  using 'Output' side component as hubs	
60125 ~    ~  selecting hubs by number of connections	
60126 ~    ~  selecting hubs by shortest distance	
60127 ~    ~  attempting to follow signal flow	
60128 ~    ~  using pre-placed components as hubs	
60129 ~    ~  on input nets side	
60130 ~    ~  on output nets side	
60131 ~    ~  on top page side	
60132 ~    ~  on bottom page side	
60133 ~    ~  Placing	
60134 ~    ~  Preprocess failed. Could not load Oscillograph...	
60135 ~    ~  Preprocess failed. Could not load Logic Analyzer...	
60136 ~    ~  View Waveforms in Separate Axes	
60137 ~    ~  Selected Curve	
60138 ~    ~  Pattern	
60139 ~    ~  State	
60140 ~    ~  Enter clock pattern	
60141 ~    ~  Do you want to Restore Settings?	
60142 ~    ~  Could not save file	
60143 ~    ~  Could not assign Curve to Bit	
60144 ~    ~  Could not assign Curve	
60145 ~    ~  Click here to remove Variable assignment	
60146 ~    ~  Double Click here to remove Variable assignment	
60147 ~    ~  Double Click here to assign Variable to selected Bit	
60148 ~    ~  Click here to assign Variable to selected Bit	
60149 ~    ~  Select Word Size	
60150 ~    ~  left from vertical bus line	
60151 ~    ~  right from vertical bus line	
60152 ~    ~  below horizontal bus line	
60153 ~    ~  above horizontal bus line	
60154 ~    ~  as first in the group	
60155 ~    ~  LARGE COMPONENTS BIN	
60156 ~    ~  MEDIUM COMPONENTS BIN	
60157 ~    ~  SMALL COMPONENTS BIN	
60158 ~    ~  COMPONENT GROUPS BIN	
60159 ~    ~  'DO NOT PLACE' BIN	
60160 ~    ~  from output nets side	
60161 ~    ~  from input nets side	
60162 ~    ~  Unable to load Element	
60163 ~    ~  Notes and Graphics	
60164 ~    ~  Tools to work with Notes and Graphics	
60165 ~    ~  Cannot rename element	
60166 ~    ~  Update in &Search	
60167 ~    ~  &Element Library	
60168 ~    ~  Element(s) found	
60169 ~    ~  Permanently Delete Selected Element(s)?	
60170 ~    ~  Element is already stored in lib:	
60171 ~    ~  Selected Element Used in Project	
60172 ~    ~  is not used in any Element	
60173 ~    ~  Element with name:	
60174 ~    ~  Can't delete Element:	
60175 ~    ~  Can't save Element:	
60176 ~    ~  No Element File selected	
60177 ~    ~  Element Registered Types	
60178 ~    ~  Element Details	
60179 ~    ~  Constituent Symbol Group 	
60180 ~    ~  Not valid Element. 	
60181 ~    ~  &Delete Symbol	
60182 ~    ~  Add a Symbol Group to Element	
60183 ~    ~  Element Text Edit - Syntax Error	
60184 ~    ~  Element Description Text Invalid	
60185 ~    ~  Can't delete - Element used by component(s) in hier:	
60186 ~    ~  Can't copy to existing Element:	
60187 ~    ~  Can't create Element:	
60188 ~    ~  Can't create group in Element:	
60189 ~    ~  Can't create P/S pin in Element:	
60190 ~    ~  Can't create signal pin in Element:	
60191 ~    ~  Failed to update Element:	
60192 ~    ~  Can't save Element to system libraries	
60193 ~    ~  Element name not mentioned.Element details incomplete	
60194 ~    ~  Symbol not found. Cannot load Element	
60195 ~    ~  Element details incomplete. Cannot load Element	
60196 ~    ~  Element cannot have more than one group with no package mentioned	
60197 ~    ~  Element name not specified
60198 ~    ~  Element prefix not specified
	
#FILE = E2KODBimp

611 ~    ~ ODB++ Job Import
612 ~    ~ ODB++ Job 
613 ~    ~ Steps
614 ~    ~ Layers
615 ~    ~ Import
616 ~    ~ Job Input Path
617 ~    ~ Job Name
618 ~    ~ EDWin Project Name
619 ~    ~ ODB++ format version
6110 ~    ~ attributes
6111 ~    ~ Step Name
6112 ~    ~ Import as circuit
6113 ~    ~ X Origin
6114 ~    ~ Y Origin
6115 ~    ~ X-Datum
6116 ~    ~ Y-Datum
6117 ~    ~ Name
6118 ~    ~ Context
6119 ~    ~ Type
6120 ~    ~ Polarity
6121 ~    ~ From Layer
6122 ~    ~ To Layer
6123 ~    ~ Assigned Edwin Layer
6124 ~    ~ Air gap for traces
6125 ~    ~ Air gap for PMD pads
6126 ~    ~ Air gap for SMD pads
6127 ~    ~ Import eda package outline records
6128 ~    ~ Generate component names
6129 ~    ~ Skip reconstruction
6130 ~    ~ Present Project will be deleted
6131 ~    ~ ODB++ Job info incomplete
6132 ~    ~ ODB++ Job Step info incomplete
6133 ~    ~ ODB++ Job Profile info incomplete"
6134 ~    ~ cannot be reconstructed
6135 ~    ~ Board Outline
6136 ~    ~ Packages and Netlist
6137 ~    ~ Components
6138 ~    ~ Processing
6139 ~    ~ Reconstructing Connections
6140 ~    ~ Reconstructing connections for
6141 ~    ~ Reconstructing Copper
6142 ~    ~ Reconstructing Copper for

621 ~   ~ &File
622 ~   ~ New
623 ~   ~ -
624 ~   ~ &Print...
625 ~   ~ Copy Screen to Clipboard
626 ~   ~ Copy Block to Clipboard
627 ~   ~ E&xit
628 ~   ~ PCB &Layer
629 ~   ~ Select to view ..
6210 ~   ~ c1
6211 ~   ~ c2
6212 ~   ~ c3
6213 ~   ~ c4
6214 ~   ~ c5
6215 ~   ~ c6
6216 ~   ~ c7
6217 ~   ~ c8
6218 ~   ~ c9
6219 ~   ~ c10
6220 ~   ~ c11
6221 ~   ~ c12
6222 ~   ~ c13
6223 ~   ~ c14
6224 ~   ~ c15
6225 ~   ~ c16
6226 ~   ~ c17
6227 ~   ~ c18
6228 ~   ~ Add inner layer
6229 ~   ~ Remove
6230 ~   ~ &Tools
6231 ~   ~ &Fabrication Editor
6232 ~   ~ &Import Artworks&&Drilling
6233 ~   ~ Mirror Current Layer along &X-axis
6234 ~   ~ Mirror Current Layer along &Y-axis
6235 ~   ~ Import &Categories for editing
6236 ~   ~ P&references
6237 ~   ~ Zoom In/Out Factor...
6238 ~   ~ Calibrate Ruler
6239 ~   ~ Auto
6240 ~   ~ Fixed
6241 ~   ~ Grid
6242 ~   ~ Custom...
6243 ~   ~ X/Y Coords:
6244 ~   ~ &Centre
6245 ~   ~ &Board Datum
6246 ~   ~ &Reference Point
6247 ~   ~ Co&lors...
6248 ~   ~ &Lock Toolbar
6249 ~   ~ &View
6250 ~   ~ Toolbar
6251 ~   ~ Viewing Function Tools
6252 ~   ~ Viewing Option Tools
6253 ~   ~ Tasks
6254 ~   ~ Standard
6255 ~   ~ Position
6256 ~   ~ Board View
6257 ~   ~ Layers
6258 ~   ~ &Unit
6259 ~   ~ &Inches
6260 ~   ~ &Millimeters
6261 ~   ~ &Project
6262 ~   ~ Layer Visibility
6263 ~   ~ &True Size
6264 ~   ~ Pad &Frames
6265 ~   ~ &Pad Positions
6266 ~   ~ &Mirror
6267 ~   ~ Mono&chrome
6268 ~   ~ Scroll Bars
6269 ~   ~ &Tooltip Text
6270 ~   ~ &Ruler
6271 ~   ~ Long &Cursor
6272 ~   ~ 
6273 ~   ~ Yes
6274 ~   ~ No
6275 ~   ~ Options
6276 ~   ~ &Help
6277 ~   ~ Alignment vector
6278 ~   ~ Distance =
6279 ~   ~ Add
6280 ~   ~ New Artwork Layer
6281 ~   ~ Added layer
6282 ~   ~ Clear all layers?
6283 ~   ~ Viewer
6284 ~   ~ Removing Artwork Layer
6285 ~   ~ Set ruler calibration : (Range = 1 to 10)
6286 ~   ~ (Range = 1 to 10)
6287 ~   ~ Select Box Copy Area
6288 ~   ~ Set Zoom In/Out Factor : (Range = 1.1 to 10)
6289 ~   ~ (Range = 1.1 to 10)
6290 ~   ~ Selected raster cannot be displayed in current precision. Raster interval adjusted
6291 ~   ~ Select Next Item(s)
6292 ~   ~ Ref.point X,Y (
6293 ~   ~ Format: x,y[,D]
6294 ~   ~ D for x,y displacement from board datum.
6295 ~   ~ Scale Block by:
6296 ~   ~ Block:
6297 ~   ~ Vector: X=
6298 ~   ~ rot=
6299 ~   ~ Select Box Zoom Area
62100 ~   ~ Select Object
62101 ~   ~ Clear all elements
62102 ~   ~ Distance:
62103 ~   ~ Shortcut:
62104 ~   ~ Fabrication Graphics Viewer
62105 ~   ~ Esc
62106 ~   ~ Click to cancel current operation
62107 ~   ~ Precision
62108 ~   ~ Select/display current value for precision
62109 ~   ~ Zoom In
62110 ~   ~ Increase current precision
62111 ~   ~ Zoom Out
62112 ~   ~ Decrease current precision
62113 ~   ~ Block Zoom
62114 ~   ~ Select a block to zoom
62115 ~   ~ Redraw
62116 ~   ~ Redraw in currently selected mode
62117 ~   ~ Raster On/Off
62118 ~   ~ Select/toggle display of raster
62119 ~   ~ Raster interval
62120 ~   ~ Select/display current value for raster interval
62121 ~   ~ Select line raster
62122 ~   ~ Select dot raster
62123 ~   ~ Select cross raster
62124 ~   ~ Redraw in current precision
62125 ~   ~ Redraw and pan to center in current precision
62126 ~   ~ Redraw to fit and show entire Project
62127 ~   ~ Units
62128 ~   ~ Set current working unit
62129 ~   ~ Measure distance
62130 ~   ~ Measure distance from selected object
62131 ~   ~ Coordinates
62132 ~   ~ Set current coordinates (XY/Distance)
62133 ~   ~ View units in inches
62134 ~   ~ View units in millimeters
62135 ~   ~ Set current coordinates in XY
62136 ~   ~ Set current coordinates in Distance
62137 ~   ~ Discard current layer database and start new one
62138 ~   ~ Import artworks & drilling
62139 ~   ~ Mirror layer (Y)
62140 ~   ~ Mirror currently edited layer around Y-axis
62141 ~   ~ Mirror layer (X)
62142 ~   ~ Mirror currently edited layer around X-axis
62143 ~   ~ Import Categories
62144 ~   ~ Convert imports to categories for editing and reconstruction
62145 ~   ~ Layer visibility
62146 ~   ~ Set layer visibility and display sequence
62147 ~   ~ True size
62148 ~   ~ View artwork elements in true size
62149 ~   ~ Pad positions
62150 ~   ~ View pad positions
62151 ~   ~ Pad position frames
62152 ~   ~ View pasition frames
62153 ~   ~ Mirror
62154 ~   ~ View artworks in mirror(Horizontal flipping) mode
62155 ~   ~ Monochrome
62156 ~   ~ View monochrome for printing
62157 ~   ~ Ruler
62158 ~   ~ View ruler in current units
62159 ~   ~ Tool tips
62160 ~   ~ View tool tips
62161 ~   ~ Active layer
62162 ~   ~ Layer currently selected for editing
62163 ~   ~ Add inner artwork layer
62164 ~   ~ Viewing Tools
62165 ~   ~ Option Tools
62166 ~   ~ Tools
62167 ~   ~ PCB Artwork View
62168 ~   ~ Line Raster
62169 ~   ~ Dot Raster
62170 ~   ~ Cross Raster
62171 ~   ~ Current
62172 ~   ~ Center
62173 ~   ~ Board
62174 ~   ~ Inches
62175 ~   ~ Millimeters
62176 ~   ~ XY
62177 ~   ~ Distance
62178 ~   ~ Import artworks && drilling
62179 ~   ~ Mirror Layer (Y)
62180 ~   ~ Mirror Layer (X)
62181 ~   ~ Import Categories for editing
62182 ~   ~ Cancelled
62183 ~   ~ Select File for Display
62184 ~   ~ Select File for Import
62185 ~   ~ Redraw in progress....
62186 ~   ~ Aperture Tables
62187 ~   ~ Cancel
62188 ~   ~ Accept
62189 ~   ~ Current Aperture Table:
62190 ~   ~ Save Aperture Table
62191 ~   ~ Insert Size
62192 ~   ~ mm
62193 ~   ~ inch
62194 ~   ~ Delete Size
62195 ~   ~ Named As :
62196 ~   ~ List of Aperture Tables:
62197 ~   ~ Sizes:
62198 ~   ~ D-Codes:
62199 ~   ~ Current Aperture Table has been changed
62200 ~   ~ Do You wish to save changes ?
62201 ~   ~ Lines
62202 ~   ~ Round
62203 ~   ~ Square
62204 ~   ~ Are you sure you want to delete the entry
62205 ~   ~ Size to insert
62206 ~   ~ Aperture Table
62207 ~   ~ Monocolors Setup for Printing
62208 ~   ~ Solid Colors
62209 ~   ~ Custom Colors
62210 ~   ~ Palette
62211 ~   ~ ITEM
62212 ~   ~ COLOR
62213 ~   ~ Background Color
62214 ~   ~ Draw Color
62215 ~   ~ CP & Ref Points
62216 ~   ~ Highlight
62217 ~   ~ Select the color
62218 ~   ~ Apertures & Sizes
62219 ~   ~ Create Aperture File && Return
62220 ~   ~ Close
62221 ~   ~ Update Artwork File && Return
62222 ~   ~ Modifiers:
62223 ~   ~ Special Apertures:
62224 ~   ~ Click on aperture to view/change modifiers:
62225 ~   ~ Y
62226 ~   ~ X
62227 ~   ~ Square Pad Apertures:
62228 ~   ~ Line Apertures:
62229 ~   ~ Round Pad Apertures:
62230 ~   ~ Click Column to change Apeture Size (inch/mm)
62231 ~   ~ See square
62232 ~   ~ See macro
62233 ~   ~ Circle
62234 ~   ~ Rectangle
62235 ~   ~ Obround
62236 ~   ~ Reg.polygon
62237 ~   ~ Macro
62238 ~   ~ Undef.
62239 ~   ~ Standard Apertures
62240 ~   ~ Special Apertures
62241 ~   ~ Dcode
62242 ~   ~ Number
62243 ~   ~ Item:
62244 ~   ~ Offset
62245 ~   ~ Type
62246 ~   ~ Primitive
62247 ~   ~ Item
62248 ~   ~ Aperture & Sizes Display
62249 ~   ~ Modifiers for:
62250 ~   ~ Exposure
62251 ~   ~ Diameter
62252 ~   ~ X centre
62253 ~   ~ Y centre
62254 ~   ~ Width
62255 ~   ~ X start
62256 ~   ~ Y start
62257 ~   ~ X end
62258 ~   ~ Y end
62259 ~   ~ Rotation
62260 ~   ~ Height
62261 ~   ~ Y LLP
62262 ~   ~ X LLP
62263 ~   ~ No of Points
62264 ~   ~ X Vertex
62265 ~   ~ Y Vertex
62266 ~   ~ Vertices
62267 ~   ~ Outside Diam.
62268 ~   ~ Circle lWidth
62269 ~   ~ Gap
62270 ~   ~ No.Circles
62271 ~   ~ CH Width
62272 ~   ~ CH Lenght
62273 ~   ~ Inside Diam.
62274 ~   ~ Size
62275 ~   ~ Hole X-Size
62276 ~   ~ Hole Y-Size
62277 ~   ~ XSize
62278 ~   ~ YSize
62279 ~   ~ Sides
62280 ~   ~ Default
62281 ~   ~ Selected from palette
62282 ~   ~ Use default layer color
62283 ~   ~ Import file name
62284 ~   ~ Change display color
62285 ~   ~ Layer
62286 ~   ~ Contents
62287 ~   ~ Filled Rectangles
62288 ~   ~ Open Rectangles
62289 ~   ~ Arcs
62290 ~   ~ Filled circles
62291 ~   ~ Open circles
62292 ~   ~ Filled triangles
62293 ~   ~ Open triangles
62294 ~   ~ Polygons
62295 ~   ~ Texts
62296 ~   ~ Drilled holes
62297 ~   ~ Tool List(Hole Count)
62298 ~   ~ Diameters
62299 ~   ~ Aperture list
62300 ~   ~ Count
62301 ~   ~ Property
62302 ~   ~ Value
62303 ~   ~ Layer properties
62304 ~   ~ PCB Layers
62305 ~   ~ Set visibility and display order
62306 ~   ~ Select &All
62307 ~   ~ &UnSelect All
62308 ~   ~ Select &Not Empty
62309 ~   ~ Clear
62310 ~   ~ Details
62311 ~   ~ View
62312 ~   ~ File
62313 ~   ~ Open for Import
62314 ~   ~ Open for View
62315 ~   ~ Unit
62316 ~   ~ Show Filters
62317 ~   ~ Hide Filters
62318 ~   ~ Import Parameters
62319 ~   ~ Import failed
62320 ~   ~ Import successful
62321 ~   ~ Line
62322 ~   ~ Sqr.
62323 ~   ~ Rnd.Pad
62324 ~   ~ Sqr.Pad
62325 ~   ~ Special
62326 ~   ~ Clear before import
62327 ~   ~ Append
62328 ~   ~ Trailing
62329 ~   ~ Leading
62330 ~   ~ Metric
62331 ~   ~ adjusted to aperture size
62332 ~   ~ explicit apeture size
62333 ~   ~ Import file type
62334 ~   ~ Format
62335 ~   ~ Info
62336 ~   ~ Enter format paremeters below:
62337 ~   ~ Omitted Zeroes
62338 ~   ~ Scale Factor X
62339 ~   ~ Scale Factor Y
62340 ~   ~ Precision Format X
62341 ~   ~ Precision Format Y
62342 ~   ~ Apertures used
62343 ~   ~ Precision Format XY
62344 ~   ~ Layer Import
62345 ~   ~ Setup
62346 ~   ~ Import to layer
62347 ~   ~ Reconstruct polygons for Outline/Cut-outs
62348 ~   ~ Import in color
62349 ~   ~ Image X Offset
62350 ~   ~ Image Y Offset
62351 ~   ~ Mirror Image
62352 ~   ~ Imported Elements
62353 ~   ~ UnCheck to ignore with import
62354 ~   ~ Pads
62355 ~   ~ Macros&Special Apertures
62356 ~   ~ Pad/Hole positions
62357 ~   ~ Import mixed polarity
62358 ~   ~ Apertures (click to highlight)
62359 ~   ~ Hole Diameters
62360 ~   ~ Aperture Codes (click to highlight)
62361 ~   ~ Mapped Hole Diameters
62362 ~   ~ Tool Code(Hole Count)
62363 ~   ~ Import File
62364 ~   ~ Specification
62365 ~   ~ Embedded
62366 ~   ~ Click for info & setup
62367 ~   ~ Click to select
62368 ~   ~ Artwork GERBER RS-274-X
62369 ~   ~ Artwork GERBER RS-274-D
62370 ~   ~ Drilling GERBER RS-274-X
62371 ~   ~ Drilling GERBER RS-274-D
62372 ~   ~ Drilling EXCELLON Format Two
62373 ~   ~ Drilling EXCELLON Format One
62374 ~   ~ AutoCAD DXF file
62375 ~   ~ HPGL Format file
62376 ~   ~ Hide View
62377 ~   ~ Reconstruct polygons for Outline/Cut-outs?
62378 ~   ~ Processing Board Outline/Cut-outs Import
62379 ~   ~ Range Error - format:
62380 ~   ~ Artwork File - Incorrect format
62381 ~   ~ Can't load local vector font, default assumed.
62382 ~   ~ Can't load
62383 ~   ~ Save of
62384 ~   ~ failed
62385 ~   ~ Coordinates outside limits
62386 ~   ~ Check parameters for GERBER file and import again.
62387 ~   ~ aperture not found in the list during import.
62388 ~   ~ Select proper Aperture Table and import again.
62389 ~   ~ Check parameters for
62390 ~   ~ file and import again.
62391 ~   ~ import of files in this format is not supported
62392 ~   ~ this is not Format 2 File.
62393 ~   ~ Format parameters and/or tools sizes might need adjustment for correct import
62394 ~   ~ Polygon with intersecting or invalid boundaries
62395 ~   ~ Polygon to complex
62396 ~   ~ This path is not a closed shape
62397 ~   ~ No available layers
62398 ~   ~ No data to output
62399 ~   ~ Completed
62400 ~   ~ Incorrect stepping parameters
62401 ~   ~ Set Point(s) to define rotation.
62402 ~   ~ Out of Range
62403 ~   ~ Unknown Error
62404 ~   ~ Via hole pad positions filter
62405 ~   ~ Select D-Code associated with via holes
62406 ~   ~ Board Outline
62407 ~   ~ Board Cutouts
62408 ~   ~ Silkscreen Comp.Side
62409 ~   ~ Thrupads Positions
62410 ~   ~ SMD Pads Positions Comp.Side
62411 ~   ~ Thrupads Padstacks
62412 ~   ~ SMD Padstacks Comp.Side
62413 ~   ~ Via Positions
62414 ~   ~ Via Padstacks
62415 ~   ~ Trace Master
62416 ~   ~ Copper Planes Master
62417 ~   ~ SMD Padstacks Solder Side
62418 ~   ~ SMD Pads Positions Solder Side
62419 ~   ~ Silkscreen Solder Side
62420 ~   ~ Template Outlines
62421 ~   ~ elements
62422 ~   ~ Empty
62423 ~   ~ Silkscreen Top
62424 ~   ~ Mask Top Layer
62425 ~   ~ Artwork Top Layer
62426 ~   ~ Artwork Bottom Layer
62427 ~   ~ Mask Bottom Layer
62428 ~   ~ Silkscreen Bottom
62429 ~   ~ Artwork Inner Layer (A)
62430 ~   ~ Artwork Inner Layer (B)
62431 ~   ~ Artwork Inner Layer (C)
62432 ~   ~ Artwork Inner Layer (D)
62433 ~   ~ Artwork Inner Layer (E)
62434 ~   ~ Artwork Inner Layer (F)
62435 ~   ~ Artwork Inner Layer (G)
62436 ~   ~ Artwork Inner Layer (H)
62437 ~   ~ Artwork Inner Layer (I)
62438 ~   ~ Artwork Inner Layer (J)
62439 ~   ~ Board Outline/Cut-outs
62440 ~   ~ Drill Template
62441 ~   ~ Processing
62442 ~   ~ Preprocessed
62443 ~   ~ Can't create project
62444 ~   ~ Zoom In/Out Factor
62445 ~   ~ Path:
62446 ~   ~ not available
62447 ~   ~ This file already exists.
62448 ~   ~ Replace Existing File?
62449 ~   ~ Project:
62450 ~   ~ Fabrication Graphics (Gerber/Excellon/DXF/HPGL) Viewer & Import
62451 ~   ~ Can't read file:
62452 ~   ~ Can't create/write to file:
